]> rtime.felk.cvut.cz Git - zynq/linux.git/commitdiff
net: axienet: Fix coding style violations
authorKedareswara rao Appana <appana.durga.rao@xilinx.com>
Thu, 23 Mar 2017 14:14:19 +0000 (19:44 +0530)
committerMichal Simek <michal.simek@xilinx.com>
Thu, 15 Mar 2018 14:18:06 +0000 (15:18 +0100)
This patch fixes the checpatch pl warnings in the
driver.

Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
drivers/net/ethernet/xilinx/xilinx_axienet_main.c
drivers/net/ethernet/xilinx/xilinx_axienet_mdio.c

index 14260389dfd7d2df2e57172a291eb875efe5bc2b..6397251bc6582521155a2f8d9ded9c80fbfdfa71 100644 (file)
@@ -738,8 +738,8 @@ static void axienet_adjust_link(struct net_device *ndev)
                                emmc_reg |= XAE_EMMC_LINKSPD_10;
                                break;
                        default:
-                               dev_err(&ndev->dev, "Speed other than 10, 100 "
-                                       "or 1Gbps is not supported\n");
+                               dev_err(&ndev->dev, "Speed other than 10, 100 ");
+                               dev_err(&ndev->dev, "or 1Gbps is not supported\n");
                                break;
                        }
 
@@ -1127,10 +1127,12 @@ static int axienet_start_xmit(struct sk_buff *skb, struct net_device *ndev)
                                if (lp->tstamp_config.tx_type ==
                                        HWTSTAMP_TX_ONESTEP_SYNC) {
                                        axienet_create_tsheader(tmp,
-                                                               TX_TS_OP_ONESTEP, q);
+                                                               TX_TS_OP_ONESTEP
+                                                               , q);
                                } else {
                                        axienet_create_tsheader(tmp,
-                                                               TX_TS_OP_TWOSTEP, q);
+                                                               TX_TS_OP_TWOSTEP
+                                                               , q);
                                        skb_shinfo(skb)->tx_flags
                                                        |= SKBTX_IN_PROGRESS;
                                        cur_p->ptp_tx_skb =
@@ -1353,7 +1355,7 @@ static int axienet_recv(struct net_device *ndev, int budget,
                                             DMA_FROM_DEVICE);
                cur_p->cntrl = lp->max_frm_size;
                cur_p->status = 0;
-               cur_p->sw_id_offset = (phys_addr_t) new_skb;
+               cur_p->sw_id_offset = (phys_addr_t)new_skb;
 
                ++q->rx_bd_ci;
                q->rx_bd_ci %= RX_BD_NUM;
@@ -1657,7 +1659,8 @@ static int axienet_open(struct net_device *ndev)
                } else if ((lp->axienet_config->mactype == XAXIENET_1G) ||
                             (lp->axienet_config->mactype == XAXIENET_2_5G)) {
                        phydev = of_phy_connect(lp->ndev, lp->phy_node,
-                                               axienet_adjust_link, lp->phy_flags,
+                                               axienet_adjust_link,
+                                               lp->phy_flags,
                                                lp->phy_interface);
                }
 
@@ -2352,7 +2355,7 @@ static void axienet_dma_err_handler(unsigned long data)
                                          XAXIDMA_BD_CTRL_LENGTH_MASK),
                                         DMA_TO_DEVICE);
                if (cur_p->tx_skb)
-                       dev_kfree_skb_irq((struct sk_buff *) cur_p->tx_skb);
+                       dev_kfree_skb_irq((struct sk_buff *)cur_p->tx_skb);
                cur_p->phys = 0;
                cur_p->cntrl = 0;
                cur_p->status = 0;
index 64486c2f6f1745cc023af575faef8063dc653d19..f4f0316f5028fe8ec7248d71b4a87857266d493f 100644 (file)
@@ -101,7 +101,7 @@ static int axienet_mdio_write(struct mii_bus *bus, int phy_id, int reg,
        if (ret < 0)
                return ret;
 
-       axienet_iow(lp, XAE_MDIO_MWD_OFFSET, (u32) val);
+       axienet_iow(lp, XAE_MDIO_MWD_OFFSET, (u32)val);
        axienet_iow(lp, XAE_MDIO_MCR_OFFSET,
                    (((phy_id << XAE_MDIO_MCR_PHYAD_SHIFT) &
                      XAE_MDIO_MCR_PHYAD_MASK) |
@@ -169,9 +169,9 @@ int axienet_mdio_setup(struct axienet_local *lp, struct device_node *np)
        }
        if (!npp) {
                dev_warn(lp->dev,
-                       "Could not find ethernet controller device node.");
+                        "Could not find ethernet controller device node.");
                dev_warn(lp->dev, "Setting MDIO clock divisor to default %d\n",
-                      DEFAULT_CLOCK_DIVISOR);
+                        DEFAULT_CLOCK_DIVISOR);
                clk_div = DEFAULT_CLOCK_DIVISOR;
        } else {
                if (of_property_read_u32(npp, "clock-frequency", &host_clock)) {
@@ -191,10 +191,10 @@ int axienet_mdio_setup(struct axienet_local *lp, struct device_node *np)
                         */
                        if (host_clock % (MAX_MDIO_FREQ * 2))
                                clk_div++;
-                       dev_dbg(lp->dev,
-                               "Setting MDIO clock divisor to %u "
-                               "based on %u Hz host clock.\n",
-                               clk_div, host_clock);
+                       dev_dbg(lp->dev, "Setting MDIO clock divisor to %u ",
+                               clk_div);
+                       dev_dbg(lp->dev, "based on %u Hz host clock.\n",
+                               host_clock);
                }
                of_node_put(npp);
        }
@@ -212,7 +212,7 @@ int axienet_mdio_setup(struct axienet_local *lp, struct device_node *np)
 
        of_address_to_resource(npp, 0, &res);
        snprintf(bus->id, MII_BUS_ID_SIZE, "%.8llx",
-                (unsigned long long) res.start);
+                (unsigned long long)res.start);
 
        bus->priv = lp;
        bus->name = "Xilinx Axi Ethernet MDIO";