drivers: net: ethernet: xilinx: Adding num queue support for TSN IP

Adding support for user configurable parameter, which can configure
the number of TSN queues.

Signed-off-by: Saurabh Sengar <saurabhs@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet.h b/drivers/net/ethernet/xilinx/xilinx_axienet.h
index 5f7c7119fc83b10de50a22125871a9d50d35ed0b..77d95f6f75c3dad4659e569cdd016f3bb9f96e87 100644 (file)
--- a/drivers/net/ethernet/xilinx/xilinx_axienet.h
+++ b/drivers/net/ethernet/xilinx/xilinx_axienet.h
@@ -468,6 +468,7 @@ enum XAE_QUEUE {
  * @num_queues: Total number of DMA queues
  * @dq:                DMA queues data
  * @is_tsn:    Denotes a tsn port
+ * @num_q:     Denotes number of queue in current TSN design
  * @temac_no:  Denotes the port number in TSN IP
  * @timer_priv: PTP timer private data pointer
  * @ptp_tx_irq: PTP tx irq
@@ -527,6 +528,8 @@ struct axienet_local {
        u16    num_queues;      /* Number of DMA queues */
        struct axienet_dma_q *dq[XAE_MAX_QUEUES];       /* DAM queue data*/
        bool is_tsn;
+#ifdef CONFIG_XILINX_TSN
+       int num_q;
 #ifdef CONFIG_XILINX_TSN_PTP
        void *timer_priv;
        int ptp_tx_irq;
@@ -538,6 +541,7 @@ struct axienet_local {
        struct sk_buff_head ptp_txq;
        struct work_struct tx_tstamp_work;
        spinlock_t ptp_tx_lock;         /* TSN PTP tx lock*/
+#endif
 #endif
        int eth_irq;
        u32 phy_type;

diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
index 4ffe79abafd5279159e2c66a0f83dbad799fc079..badddb3440a25fd05d1886f9d2e8921abc86fc8d 100644 (file)
--- a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
+++ b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
@@ -2676,6 +2676,9 @@ static int axienet_probe(struct platform_device *pdev)
        }
 
 #ifdef CONFIG_XILINX_TSN
+       of_property_read_u32(pdev->dev.of_node, "xlnx,num-queue", &lp->num_q);
+       pr_info("Number of TSN priority queues: %d\n", lp->num_q);
+
        slave = of_property_read_bool(pdev->dev.of_node,
                                      "xlnx,tsn-slave");
        if (slave)

diff --git a/drivers/net/ethernet/xilinx/xilinx_tsn_shaper.c b/drivers/net/ethernet/xilinx/xilinx_tsn_shaper.c
index ca325ff9566af84298913720001d803c2c6a4574..3233732cb31fb79ea5b40dbfdac3bd4b5d8d80cb 100644 (file)
--- a/drivers/net/ethernet/xilinx/xilinx_tsn_shaper.c
+++ b/drivers/net/ethernet/xilinx/xilinx_tsn_shaper.c
@@ -22,6 +22,7 @@ static int __axienet_set_schedule(struct net_device *ndev, struct qbv_info *qbv)
 {
        struct axienet_local *lp = netdev_priv(ndev);
        int i;
+       unsigned int acl_bit_map = 0;
        u32 u_config_change = 0;
        u8 port = qbv->port;
 
@@ -51,8 +52,11 @@ static int __axienet_set_schedule(struct net_device *ndev, struct qbv_info *qbv)
 
        /* program each list */
        for (i = 0; i < qbv->list_length; i++) {
+               acl_bit_map = qbv->acl_gate_state[i];
+               if ((lp->num_q == 2) && (acl_bit_map == 4)) /* for 2 quese ST */
+                       acl_bit_map = 2;
                axienet_iow(lp,  ADMIN_CTRL_LIST(port, i),
-                           (qbv->acl_gate_state[i] & (ACL_GATE_STATE_MASK)) <<
+                           (acl_bit_map & (ACL_GATE_STATE_MASK)) <<
                            ACL_GATE_STATE_SHIFT);
 
            /* set the time for each entry */