misc: xilinx-sdfec: Add new version DT binding file

Introduces a new DT binding file as compatibility is broken with previous
version by introducing the following changes to the DT properties.
- Updates the compatible string to sd-fec-1.1.
- Removes the op-mode property.
- Adds mandatory AXI Stream propterties.
-   din-words.
-   din-width.
-   dout-words.
-   dout-width.
Also specifies interrupt as an optional property.

Signed-off-by: Derek Kiernan <derek.kiernan@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

diff --git a/Documentation/devicetree/bindings/misc/xlnx,fec-engine.txt b/Documentation/devicetree/bindings/misc/xlnx,fec-engine.txt
deleted file mode 100644 (file)
index b705a3f..0000000
--- a/Documentation/devicetree/bindings/misc/xlnx,fec-engine.txt
+++ /dev/null
@@ -1,29 +0,0 @@
-* Xilinx SDFEC(16nm) IP *
-
-The Soft Decision Forward Error Correction (SDFEC) Engine is a Hard IP block
-which provides high-throughput LDPC and Turbo Code implementations.
-The LDPC decode & encode functionality is capable of covering a range of
-customer specified Quasi-cyclic (QC) codes. The Turbo decode functionality
-principally covers codes used by LTE. The FEC Engine offers significant
-power and area savings versus implementations done in the FPGA fabric.
-
-Required properties:
-- compatible: Must be "xlnx,fec-engine"
-- reg: Should contain Xilinx SDFEC 16nm Hardened IP block registers
-  location and length.
-- interrupt-parent: Must be core interrupt controller
-- interrupts: should contain SDFEC interrupt number
-- xlnx,sdfec-code : Should contain "ldpc" or "turbo" to describe the codes
-  being used.
-- xlnx,sdfec-op-mode : Should contain "encode" or "decode"
-
-Example
----------------------------------------
-       fec_engine_0: fec_engine@a0040000 {
-               compatible = "xlnx,fec-engine";
-               reg = <0x0 0xa0040000 0x0 0x40000>;
-               interrupt-parent = <&gic>;
-               interrupts = <0 89 4>;
-               xlnx,sdfec-op-mode = "decode";
-               xlnx,sdfec-code = "ldpc";
-       };

diff --git a/Documentation/devicetree/bindings/misc/xlnx,sd-fec.txt b/Documentation/devicetree/bindings/misc/xlnx,sd-fec.txt
new file mode 100644 (file)
index 0000000..c642d7f
--- /dev/null
+++ b/Documentation/devicetree/bindings/misc/xlnx,sd-fec.txt
@@ -0,0 +1,46 @@
+* Xilinx SDFEC(16nm) IP *
+
+The Soft Decision Forward Error Correction (SDFEC) Engine is a Hard IP block
+which provides high-throughput LDPC and Turbo Code implementations.
+The LDPC decode & encode functionality is capable of covering a range of
+customer specified Quasi-cyclic (QC) codes. The Turbo decode functionality
+principally covers codes used by LTE. The FEC Engine offers significant
+power and area savings versus implementations done in the FPGA fabric.
+
+
+Required properties:
+- compatible: Must be "xlnx,sd-fec-1.1”
+- reg: Should contain Xilinx SDFEC 16nm Hardened IP block registers
+  location and length.
+- xlnx,sdfec-code : Should contain "ldpc" or "turbo" to describe the codes
+  being used.
+- xlnx,sdfec-din-words : A value 0 indicates that the DIN_WORDS interface is
+  driven with a fixed value and is not present on the device, a value of 1
+  configures the DIN_WORDS to be block based, while a value of 2 configures the
+  DIN_WORDS input to be supplied for each AXI transaction.
+- xlnx,sdfec-din-width : Configures the DIN AXI stream where a value of 1
+  configures a width of "1x128b", 2 a width of "2x128b" and 4 configures a width
+  of "4x128b".
+- xlnx,sdfec-dout-words : A value 0 indicates that the DOUT_WORDS interface is
+  driven with a fixed value and is not present on the device, a value of 1
+  configures the DOUT_WORDS to be block based, while a value of 2 configures the
+  DOUT_WORDS input to be supplied for each AXI transaction.
+- xlnx,sdfec-dout-width : Configures the DOUT AXI stream where a value of 1
+  configures a width of "1x128b", 2 a width of "2x128b" and 4 configures a width
+  of "4x128b".
+Optional properties:
+- interrupts: should contain SDFEC interrupt number
+
+Example
+---------------------------------------
+       sd_fec_0: sd-fec@a0040000 {
+               compatible = "xlnx,sd-fec-1.1";
+               reg = <0x0 0xa0040000 0x0 0x40000>;
+               interrupt-parent = <&gic>;
+               interrupts = <0 89 4>;
+               xlnx,sdfec-code = "ldpc";
+               xlnx,sdfec-din-words = <0>;
+               xlnx,sdfec-din-width = <2>;
+               xlnx,sdfec-dout-words = <0>;
+               xlnx,sdfec-dout-width = <1>;
+       };