drivers/tty/serial/uartlite.c

   1 /*
   2  * uartlite.c: Serial driver for Xilinx uartlite serial controller
   3  *
   4  * Copyright (C) 2006 Peter Korsgaard <jacmet@sunsite.dk>
   5  * Copyright (C) 2007 Secret Lab Technologies Ltd.
   6  *
   7  * This file is licensed under the terms of the GNU General Public License
   8  * version 2.  This program is licensed "as is" without any warranty of any
   9  * kind, whether express or implied.
  10  */
  11
  12 #include <linux/platform_device.h>
  13 #include <linux/module.h>
  14 #include <linux/console.h>
  15 #include <linux/serial.h>
  16 #include <linux/serial_core.h>
  17 #include <linux/tty.h>
  18 #include <linux/tty_flip.h>
  19 #include <linux/delay.h>
  20 #include <linux/interrupt.h>
  21 #include <linux/init.h>
  22 #include <linux/io.h>
  23 #include <linux/of.h>
  24 #include <linux/of_address.h>
  25 #include <linux/of_device.h>
  26 #include <linux/of_platform.h>
  27 #include <linux/clk.h>
  28 #include <linux/pm_runtime.h>
  29
  30 #define ULITE_NAME              "ttyUL"
  31 #define ULITE_MAJOR             204
  32 #define ULITE_MINOR             187
  33 #define ULITE_NR_UARTS          CONFIG_SERIAL_UARTLITE_NR_UARTS
  34
  35 /* ---------------------------------------------------------------------
  36  * Register definitions
  37  *
  38  * For register details see datasheet:
  39  * http://www.xilinx.com/support/documentation/ip_documentation/opb_uartlite.pdf
  40  */
  41
  42 #define ULITE_RX                0x00
  43 #define ULITE_TX                0x04
  44 #define ULITE_STATUS            0x08
  45 #define ULITE_CONTROL           0x0c
  46
  47 #define ULITE_REGION            16
  48
  49 #define ULITE_STATUS_RXVALID    0x01
  50 #define ULITE_STATUS_RXFULL     0x02
  51 #define ULITE_STATUS_TXEMPTY    0x04
  52 #define ULITE_STATUS_TXFULL     0x08
  53 #define ULITE_STATUS_IE         0x10
  54 #define ULITE_STATUS_OVERRUN    0x20
  55 #define ULITE_STATUS_FRAME      0x40
  56 #define ULITE_STATUS_PARITY     0x80
  57
  58 #define ULITE_CONTROL_RST_TX    0x01
  59 #define ULITE_CONTROL_RST_RX    0x02
  60 #define ULITE_CONTROL_IE        0x10
  61 #define UART_AUTOSUSPEND_TIMEOUT        3000
  62
  63 /* Static pointer to console port */
  64 #ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
  65 static struct uart_port *console_port;
  66 #endif
  67
  68 struct uartlite_data {
  69         const struct uartlite_reg_ops *reg_ops;
  70         struct clk *clk;
  71         struct uart_driver *ulite_uart_driver;
  72 };
  73
  74 struct uartlite_reg_ops {
  75         u32 (*in)(void __iomem *addr);
  76         void (*out)(u32 val, void __iomem *addr);
  77 };
  78
  79 static u32 uartlite_inbe32(void __iomem *addr)
  80 {
  81         return ioread32be(addr);
  82 }
  83
  84 static void uartlite_outbe32(u32 val, void __iomem *addr)
  85 {
  86         iowrite32be(val, addr);
  87 }
  88
  89 static const struct uartlite_reg_ops uartlite_be = {
  90         .in = uartlite_inbe32,
  91         .out = uartlite_outbe32,
  92 };
  93
  94 static u32 uartlite_inle32(void __iomem *addr)
  95 {
  96         return ioread32(addr);
  97 }
  98
  99 static void uartlite_outle32(u32 val, void __iomem *addr)
 100 {
 101         iowrite32(val, addr);
 102 }
 103
 104 static const struct uartlite_reg_ops uartlite_le = {
 105         .in = uartlite_inle32,
 106         .out = uartlite_outle32,
 107 };
 108
 109 static inline u32 uart_in32(u32 offset, struct uart_port *port)
 110 {
 111         struct uartlite_data *pdata = port->private_data;
 112
 113         return pdata->reg_ops->in(port->membase + offset);
 114 }
 115
 116 static inline void uart_out32(u32 val, u32 offset, struct uart_port *port)
 117 {
 118         struct uartlite_data *pdata = port->private_data;
 119
 120         pdata->reg_ops->out(val, port->membase + offset);
 121 }
 122
 123 static struct uart_port ulite_ports[ULITE_NR_UARTS];
 124
 125 /* ---------------------------------------------------------------------
 126  * Core UART driver operations
 127  */
 128
 129 static int ulite_receive(struct uart_port *port, int stat)
 130 {
 131         struct tty_port *tport = &port->state->port;
 132         unsigned char ch = 0;
 133         char flag = TTY_NORMAL;
 134
 135         if ((stat & (ULITE_STATUS_RXVALID | ULITE_STATUS_OVERRUN
 136                      | ULITE_STATUS_FRAME)) == 0)
 137                 return 0;
 138
 139         /* stats */
 140         if (stat & ULITE_STATUS_RXVALID) {
 141                 port->icount.rx++;
 142                 ch = uart_in32(ULITE_RX, port);
 143
 144                 if (stat & ULITE_STATUS_PARITY)
 145                         port->icount.parity++;
 146         }
 147
 148         if (stat & ULITE_STATUS_OVERRUN)
 149                 port->icount.overrun++;
 150
 151         if (stat & ULITE_STATUS_FRAME)
 152                 port->icount.frame++;
 153
 154
 155         /* drop byte with parity error if IGNPAR specificed */
 156         if (stat & port->ignore_status_mask & ULITE_STATUS_PARITY)
 157                 stat &= ~ULITE_STATUS_RXVALID;
 158
 159         stat &= port->read_status_mask;
 160
 161         if (stat & ULITE_STATUS_PARITY)
 162                 flag = TTY_PARITY;
 163
 164
 165         stat &= ~port->ignore_status_mask;
 166
 167         if (stat & ULITE_STATUS_RXVALID)
 168                 tty_insert_flip_char(tport, ch, flag);
 169
 170         if (stat & ULITE_STATUS_FRAME)
 171                 tty_insert_flip_char(tport, 0, TTY_FRAME);
 172
 173         if (stat & ULITE_STATUS_OVERRUN)
 174                 tty_insert_flip_char(tport, 0, TTY_OVERRUN);
 175
 176         return 1;
 177 }
 178
 179 static int ulite_transmit(struct uart_port *port, int stat)
 180 {
 181         struct circ_buf *xmit  = &port->state->xmit;
 182
 183         if (stat & ULITE_STATUS_TXFULL)
 184                 return 0;
 185
 186         if (port->x_char) {
 187                 uart_out32(port->x_char, ULITE_TX, port);
 188                 port->x_char = 0;
 189                 port->icount.tx++;
 190                 return 1;
 191         }
 192
 193         if (uart_circ_empty(xmit) || uart_tx_stopped(port))
 194                 return 0;
 195
 196         uart_out32(xmit->buf[xmit->tail], ULITE_TX, port);
 197         xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE-1);
 198         port->icount.tx++;
 199
 200         /* wake up */
 201         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 202                 uart_write_wakeup(port);
 203
 204         return 1;
 205 }
 206
 207 static irqreturn_t ulite_isr(int irq, void *dev_id)
 208 {
 209         struct uart_port *port = dev_id;
 210         int stat, busy, n = 0;
 211         unsigned long flags;
 212
 213         do {
 214                 spin_lock_irqsave(&port->lock, flags);
 215                 stat = uart_in32(ULITE_STATUS, port);
 216                 busy  = ulite_receive(port, stat);
 217                 busy |= ulite_transmit(port, stat);
 218                 spin_unlock_irqrestore(&port->lock, flags);
 219                 n++;
 220         } while (busy);
 221
 222         /* work done? */
 223         if (n > 1) {
 224                 tty_flip_buffer_push(&port->state->port);
 225                 return IRQ_HANDLED;
 226         } else {
 227                 return IRQ_NONE;
 228         }
 229 }
 230
 231 static unsigned int ulite_tx_empty(struct uart_port *port)
 232 {
 233         unsigned long flags;
 234         unsigned int ret;
 235
 236         spin_lock_irqsave(&port->lock, flags);
 237         ret = uart_in32(ULITE_STATUS, port);
 238         spin_unlock_irqrestore(&port->lock, flags);
 239
 240         return ret & ULITE_STATUS_TXEMPTY ? TIOCSER_TEMT : 0;
 241 }
 242
 243 static unsigned int ulite_get_mctrl(struct uart_port *port)
 244 {
 245         return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
 246 }
 247
 248 static void ulite_set_mctrl(struct uart_port *port, unsigned int mctrl)
 249 {
 250         /* N/A */
 251 }
 252
 253 static void ulite_stop_tx(struct uart_port *port)
 254 {
 255         /* N/A */
 256 }
 257
 258 static void ulite_start_tx(struct uart_port *port)
 259 {
 260         ulite_transmit(port, uart_in32(ULITE_STATUS, port));
 261 }
 262
 263 static void ulite_stop_rx(struct uart_port *port)
 264 {
 265         /* don't forward any more data (like !CREAD) */
 266         port->ignore_status_mask = ULITE_STATUS_RXVALID | ULITE_STATUS_PARITY
 267                 | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
 268 }
 269
 270 static void ulite_break_ctl(struct uart_port *port, int ctl)
 271 {
 272         /* N/A */
 273 }
 274
 275 static int ulite_startup(struct uart_port *port)
 276 {
 277         struct uartlite_data *pdata = port->private_data;
 278         int ret;
 279
 280         ret = clk_enable(pdata->clk);
 281         if (ret) {
 282                 dev_err(port->dev, "Failed to enable clock\n");
 283                 return ret;
 284         }
 285
 286         ret = request_irq(port->irq, ulite_isr, IRQF_SHARED | IRQF_TRIGGER_RISING,
 287                           "uartlite", port);
 288         if (ret)
 289                 return ret;
 290
 291         uart_out32(ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX,
 292                 ULITE_CONTROL, port);
 293         uart_out32(ULITE_CONTROL_IE, ULITE_CONTROL, port);
 294
 295         return 0;
 296 }
 297
 298 static void ulite_shutdown(struct uart_port *port)
 299 {
 300         struct uartlite_data *pdata = port->private_data;
 301
 302         uart_out32(0, ULITE_CONTROL, port);
 303         uart_in32(ULITE_CONTROL, port); /* dummy */
 304         free_irq(port->irq, port);
 305         clk_disable(pdata->clk);
 306 }
 307
 308 static void ulite_set_termios(struct uart_port *port, struct ktermios *termios,
 309                               struct ktermios *old)
 310 {
 311         unsigned long flags;
 312         unsigned int baud;
 313
 314         spin_lock_irqsave(&port->lock, flags);
 315
 316         port->read_status_mask = ULITE_STATUS_RXVALID | ULITE_STATUS_OVERRUN
 317                 | ULITE_STATUS_TXFULL;
 318
 319         if (termios->c_iflag & INPCK)
 320                 port->read_status_mask |=
 321                         ULITE_STATUS_PARITY | ULITE_STATUS_FRAME;
 322
 323         port->ignore_status_mask = 0;
 324         if (termios->c_iflag & IGNPAR)
 325                 port->ignore_status_mask |= ULITE_STATUS_PARITY
 326                         | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
 327
 328         /* ignore all characters if CREAD is not set */
 329         if ((termios->c_cflag & CREAD) == 0)
 330                 port->ignore_status_mask |=
 331                         ULITE_STATUS_RXVALID | ULITE_STATUS_PARITY
 332                         | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
 333
 334         /* update timeout */
 335         baud = uart_get_baud_rate(port, termios, old, 0, 460800);
 336         uart_update_timeout(port, termios->c_cflag, baud);
 337
 338         spin_unlock_irqrestore(&port->lock, flags);
 339 }
 340
 341 static const char *ulite_type(struct uart_port *port)
 342 {
 343         return port->type == PORT_UARTLITE ? "uartlite" : NULL;
 344 }
 345
 346 static void ulite_release_port(struct uart_port *port)
 347 {
 348         release_mem_region(port->mapbase, ULITE_REGION);
 349         iounmap(port->membase);
 350         port->membase = NULL;
 351 }
 352
 353 static int ulite_request_port(struct uart_port *port)
 354 {
 355         struct uartlite_data *pdata = port->private_data;
 356         int ret;
 357
 358         pr_debug("ulite console: port=%p; port->mapbase=%llx\n",
 359                  port, (unsigned long long) port->mapbase);
 360
 361         if (!request_mem_region(port->mapbase, ULITE_REGION, "uartlite")) {
 362                 dev_err(port->dev, "Memory region busy\n");
 363                 return -EBUSY;
 364         }
 365
 366         port->membase = ioremap(port->mapbase, ULITE_REGION);
 367         if (!port->membase) {
 368                 dev_err(port->dev, "Unable to map registers\n");
 369                 release_mem_region(port->mapbase, ULITE_REGION);
 370                 return -EBUSY;
 371         }
 372
 373         pdata->reg_ops = &uartlite_be;
 374         ret = uart_in32(ULITE_CONTROL, port);
 375         uart_out32(ULITE_CONTROL_RST_TX, ULITE_CONTROL, port);
 376         ret = uart_in32(ULITE_STATUS, port);
 377         /* Endianess detection */
 378         if ((ret & ULITE_STATUS_TXEMPTY) != ULITE_STATUS_TXEMPTY)
 379                 pdata->reg_ops = &uartlite_le;
 380
 381         return 0;
 382 }
 383
 384 static void ulite_config_port(struct uart_port *port, int flags)
 385 {
 386         if (!ulite_request_port(port))
 387                 port->type = PORT_UARTLITE;
 388 }
 389
 390 static int ulite_verify_port(struct uart_port *port, struct serial_struct *ser)
 391 {
 392         /* we don't want the core code to modify any port params */
 393         return -EINVAL;
 394 }
 395
 396 static void ulite_pm(struct uart_port *port, unsigned int state,
 397               unsigned int oldstate)
 398 {
 399         if (!state) {
 400                 pm_runtime_get_sync(port->dev);
 401         } else {
 402                 pm_runtime_mark_last_busy(port->dev);
 403                 pm_runtime_put_autosuspend(port->dev);
 404         }
 405 }
 406
 407 #ifdef CONFIG_CONSOLE_POLL
 408 static int ulite_get_poll_char(struct uart_port *port)
 409 {
 410         if (!(uart_in32(ULITE_STATUS, port) & ULITE_STATUS_RXVALID))
 411                 return NO_POLL_CHAR;
 412
 413         return uart_in32(ULITE_RX, port);
 414 }
 415
 416 static void ulite_put_poll_char(struct uart_port *port, unsigned char ch)
 417 {
 418         while (uart_in32(ULITE_STATUS, port) & ULITE_STATUS_TXFULL)
 419                 cpu_relax();
 420
 421         /* write char to device */
 422         uart_out32(ch, ULITE_TX, port);
 423 }
 424 #endif
 425
 426 static const struct uart_ops ulite_ops = {
 427         .tx_empty       = ulite_tx_empty,
 428         .set_mctrl      = ulite_set_mctrl,
 429         .get_mctrl      = ulite_get_mctrl,
 430         .stop_tx        = ulite_stop_tx,
 431         .start_tx       = ulite_start_tx,
 432         .stop_rx        = ulite_stop_rx,
 433         .break_ctl      = ulite_break_ctl,
 434         .startup        = ulite_startup,
 435         .shutdown       = ulite_shutdown,
 436         .set_termios    = ulite_set_termios,
 437         .type           = ulite_type,
 438         .release_port   = ulite_release_port,
 439         .request_port   = ulite_request_port,
 440         .config_port    = ulite_config_port,
 441         .verify_port    = ulite_verify_port,
 442         .pm             = ulite_pm,
 443 #ifdef CONFIG_CONSOLE_POLL
 444         .poll_get_char  = ulite_get_poll_char,
 445         .poll_put_char  = ulite_put_poll_char,
 446 #endif
 447 };
 448
 449 /* ---------------------------------------------------------------------
 450  * Console driver operations
 451  */
 452
 453 #ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
 454 static void ulite_console_wait_tx(struct uart_port *port)
 455 {
 456         u8 val;
 457         unsigned long timeout;
 458
 459         /*
 460          * Spin waiting for TX fifo to have space available.
 461          * When using the Microblaze Debug Module this can take up to 1s
 462          */
 463         timeout = jiffies + msecs_to_jiffies(1000);
 464         while (1) {
 465                 val = uart_in32(ULITE_STATUS, port);
 466                 if ((val & ULITE_STATUS_TXFULL) == 0)
 467                         break;
 468                 if (time_after(jiffies, timeout)) {
 469                         dev_warn(port->dev,
 470                                  "timeout waiting for TX buffer empty\n");
 471                         break;
 472                 }
 473                 cpu_relax();
 474         }
 475 }
 476
 477 static void ulite_console_putchar(struct uart_port *port, int ch)
 478 {
 479         ulite_console_wait_tx(port);
 480         uart_out32(ch, ULITE_TX, port);
 481 }
 482
 483 static void ulite_console_write(struct console *co, const char *s,
 484                                 unsigned int count)
 485 {
 486         struct uart_port *port = console_port;
 487         unsigned long flags;
 488         unsigned int ier;
 489         int locked = 1;
 490
 491         if (oops_in_progress) {
 492                 locked = spin_trylock_irqsave(&port->lock, flags);
 493         } else
 494                 spin_lock_irqsave(&port->lock, flags);
 495
 496         /* save and disable interrupt */
 497         ier = uart_in32(ULITE_STATUS, port) & ULITE_STATUS_IE;
 498         uart_out32(0, ULITE_CONTROL, port);
 499
 500         uart_console_write(port, s, count, ulite_console_putchar);
 501
 502         ulite_console_wait_tx(port);
 503
 504         /* restore interrupt state */
 505         if (ier)
 506                 uart_out32(ULITE_CONTROL_IE, ULITE_CONTROL, port);
 507
 508         if (locked)
 509                 spin_unlock_irqrestore(&port->lock, flags);
 510 }
 511
 512 static int ulite_console_setup(struct console *co, char *options)
 513 {
 514         struct uart_port *port;
 515         int baud = 9600;
 516         int bits = 8;
 517         int parity = 'n';
 518         int flow = 'n';
 519
 520
 521         port = console_port;
 522
 523         /* Has the device been initialized yet? */
 524         if (!port->mapbase) {
 525                 pr_debug("console on ttyUL%i not present\n", co->index);
 526                 return -ENODEV;
 527         }
 528
 529         /* not initialized yet? */
 530         if (!port->membase) {
 531                 if (ulite_request_port(port))
 532                         return -ENODEV;
 533         }
 534
 535         if (options)
 536                 uart_parse_options(options, &baud, &parity, &bits, &flow);
 537
 538         return uart_set_options(port, co, baud, parity, bits, flow);
 539 }
 540
 541 static struct uart_driver ulite_uart_driver;
 542
 543 static struct console ulite_console = {
 544         .name   = ULITE_NAME,
 545         .write  = ulite_console_write,
 546         .device = uart_console_device,
 547         .setup  = ulite_console_setup,
 548         .flags  = CON_PRINTBUFFER,
 549         .index  = -1, /* Specified on the cmdline (e.g. console=ttyUL0 ) */
 550         .data   = &ulite_uart_driver,
 551 };
 552
 553 static void early_uartlite_putc(struct uart_port *port, int c)
 554 {
 555         /*
 556          * Limit how many times we'll spin waiting for TX FIFO status.
 557          * This will prevent lockups if the base address is incorrectly
 558          * set, or any other issue on the UARTLITE.
 559          * This limit is pretty arbitrary, unless we are at about 10 baud
 560          * we'll never timeout on a working UART.
 561          */
 562
 563         unsigned retries = 1000000;
 564         /* read status bit - 0x8 offset */
 565         while (--retries && (readl(port->membase + 8) & (1 << 3)))
 566                 ;
 567
 568         /* Only attempt the iowrite if we didn't timeout */
 569         /* write to TX_FIFO - 0x4 offset */
 570         if (retries)
 571                 writel(c & 0xff, port->membase + 4);
 572 }
 573
 574 static void early_uartlite_write(struct console *console,
 575                                  const char *s, unsigned n)
 576 {
 577         struct earlycon_device *device = console->data;
 578         uart_console_write(&device->port, s, n, early_uartlite_putc);
 579 }
 580
 581 static int __init early_uartlite_setup(struct earlycon_device *device,
 582                                        const char *options)
 583 {
 584         if (!device->port.membase)
 585                 return -ENODEV;
 586
 587         device->con->write = early_uartlite_write;
 588         return 0;
 589 }
 590 EARLYCON_DECLARE(uartlite, early_uartlite_setup);
 591 OF_EARLYCON_DECLARE(uartlite_b, "xlnx,opb-uartlite-1.00.b", early_uartlite_setup);
 592 OF_EARLYCON_DECLARE(uartlite_a, "xlnx,xps-uartlite-1.00.a", early_uartlite_setup);
 593
 594 #endif /* CONFIG_SERIAL_UARTLITE_CONSOLE */
 595
 596 static struct uart_driver ulite_uart_driver = {
 597         .owner          = THIS_MODULE,
 598         .driver_name    = "uartlite",
 599         .dev_name       = ULITE_NAME,
 600         .major          = ULITE_MAJOR,
 601         .minor          = ULITE_MINOR,
 602         .nr             = ULITE_NR_UARTS,
 603 #ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
 604         .cons           = &ulite_console,
 605 #endif
 606 };
 607
 608 /* ---------------------------------------------------------------------
 609  * Port assignment functions (mapping devices to uart_port structures)
 610  */
 611
 612 /** ulite_assign: register a uartlite device with the driver
 613  *
 614  * @dev: pointer to device structure
 615  * @id: requested id number.  Pass -1 for automatic port assignment
 616  * @base: base address of uartlite registers
 617  * @irq: irq number for uartlite
 618  * @pdata: private data for uartlite
 619  *
 620  * Returns: 0 on success, <0 otherwise
 621  */
 622 static int ulite_assign(struct device *dev, int id, u32 base, int irq,
 623                 struct uartlite_data *pdata)
 624 {
 625         struct uart_port *port;
 626         int rc;
 627
 628         /* if id = -1; then scan for a free id and use that */
 629         if (id < 0) {
 630                 for (id = 0; id < ULITE_NR_UARTS; id++)
 631                         if (ulite_ports[id].mapbase == 0)
 632                                 break;
 633         }
 634         if (id < 0 || id >= ULITE_NR_UARTS) {
 635                 dev_err(dev, "%s%i too large\n", ULITE_NAME, id);
 636                 return -EINVAL;
 637         }
 638
 639         if ((ulite_ports[id].mapbase) && (ulite_ports[id].mapbase != base)) {
 640                 dev_err(dev, "cannot assign to %s%i; it is already in use\n",
 641                         ULITE_NAME, id);
 642                 return -EBUSY;
 643         }
 644
 645         port = &ulite_ports[id];
 646
 647         spin_lock_init(&port->lock);
 648         port->fifosize = 16;
 649         port->regshift = 2;
 650         port->iotype = UPIO_MEM;
 651         port->iobase = 1; /* mark port in use */
 652         port->mapbase = base;
 653         port->membase = NULL;
 654         port->ops = &ulite_ops;
 655         port->irq = irq;
 656         port->flags = UPF_BOOT_AUTOCONF;
 657         port->dev = dev;
 658         port->type = PORT_UNKNOWN;
 659         port->line = id;
 660         port->private_data = pdata;
 661
 662         dev_set_drvdata(dev, port);
 663
 664 #ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
 665         /*
 666          * If console hasn't been found yet try to assign this port
 667          * because it is required to be assigned for console setup function.
 668          * If register_console() don't assign value, then console_port pointer
 669          * is cleanup.
 670          */
 671         if (!console_port)
 672                 console_port = port;
 673 #endif
 674
 675         /* Register the port */
 676         rc = uart_add_one_port(&ulite_uart_driver, port);
 677         if (rc) {
 678                 dev_err(dev, "uart_add_one_port() failed; err=%i\n", rc);
 679                 port->mapbase = 0;
 680                 dev_set_drvdata(dev, NULL);
 681                 return rc;
 682         }
 683
 684 #ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
 685         /* This is not port which is used for console that's why clean it up */
 686         if (console_port == port &&
 687             !(ulite_uart_driver->cons->flags & CON_ENABLED))
 688                 console_port = NULL;
 689 #endif
 690
 691         return 0;
 692 }
 693
 694 /** ulite_release: register a uartlite device with the driver
 695  *
 696  * @dev: pointer to device structure
 697  */
 698 static int ulite_release(struct device *dev)
 699 {
 700         struct uart_port *port = dev_get_drvdata(dev);
 701         struct uartlite_data *pdata = port->private_data;
 702         int rc = 0;
 703
 704         if (port) {
 705                 rc = uart_remove_one_port(pdata->ulite_uart_driver, port);
 706                 dev_set_drvdata(dev, NULL);
 707                 port->mapbase = 0;
 708         }
 709
 710         return rc;
 711 }
 712
 713 /**
 714  * ulite_suspend - Stop the device.
 715  *
 716  * @dev: handle to the device structure.
 717  * Return: 0 always.
 718  */
 719 static int __maybe_unused ulite_suspend(struct device *dev)
 720 {
 721         struct uart_port *port = dev_get_drvdata(dev);
 722         struct uartlite_data *pdata = port->private_data;
 723
 724         if (port)
 725                 uart_suspend_port(pdata->ulite_uart_driver, port);
 726
 727         return 0;
 728 }
 729
 730 /**
 731  * ulite_resume - Resume the device.
 732  *
 733  * @dev: handle to the device structure.
 734  * Return: 0 on success, errno otherwise.
 735  */
 736 static int __maybe_unused ulite_resume(struct device *dev)
 737 {
 738         struct uart_port *port = dev_get_drvdata(dev);
 739         struct uartlite_data *pdata = port->private_data;
 740
 741         if (port)
 742                 uart_resume_port(pdata->ulite_uart_driver, port);
 743
 744         return 0;
 745 }
 746
 747 static int __maybe_unused ulite_runtime_suspend(struct device *dev)
 748 {
 749         struct uart_port *port = dev_get_drvdata(dev);
 750         struct uartlite_data *pdata = port->private_data;
 751
 752         clk_disable(pdata->clk);
 753         return 0;
 754 };
 755
 756 static int __maybe_unused ulite_runtime_resume(struct device *dev)
 757 {
 758         struct uart_port *port = dev_get_drvdata(dev);
 759         struct uartlite_data *pdata = port->private_data;
 760
 761         clk_enable(pdata->clk);
 762         return 0;
 763 }
 764 /* ---------------------------------------------------------------------
 765  * Platform bus binding
 766  */
 767
 768 static const struct dev_pm_ops ulite_pm_ops = {
 769         SET_SYSTEM_SLEEP_PM_OPS(ulite_suspend, ulite_resume)
 770         SET_RUNTIME_PM_OPS(ulite_runtime_suspend,
 771                            ulite_runtime_resume, NULL)
 772 };
 773
 774 #if defined(CONFIG_OF)
 775 /* Match table for of_platform binding */
 776 static const struct of_device_id ulite_of_match[] = {
 777         { .compatible = "xlnx,opb-uartlite-1.00.b", },
 778         { .compatible = "xlnx,xps-uartlite-1.00.a", },
 779         {}
 780 };
 781 MODULE_DEVICE_TABLE(of, ulite_of_match);
 782 #endif /* CONFIG_OF */
 783
 784 static int ulite_probe(struct platform_device *pdev)
 785 {
 786         struct resource *res;
 787         struct uartlite_data *pdata;
 788         int irq, ret;
 789         int id = pdev->id;
 790 #ifdef CONFIG_OF
 791         const __be32 *prop;
 792
 793         prop = of_get_property(pdev->dev.of_node, "port-number", NULL);
 794         if (prop)
 795                 id = be32_to_cpup(prop);
 796 #endif
 797         if (id < 0) {
 798                 /* Look for a serialN alias */
 799                 id = of_alias_get_id(pdev->dev.of_node, "serial");
 800                 if (id < 0)
 801                         id = 0;
 802         }
 803
 804         if (!ulite_uart_driver.state) {
 805                 dev_dbg(&pdev->dev, "uartlite: calling uart_register_driver()\n");
 806                 ret = uart_register_driver(&ulite_uart_driver);
 807                 if (ret < 0) {
 808                         dev_err(&pdev->dev, "Failed to register driver\n");
 809                         return ret;
 810                 }
 811         }
 812
 813         pdata = devm_kzalloc(&pdev->dev, sizeof(struct uartlite_data),
 814                         GFP_KERNEL);
 815         if (!pdata)
 816                 return -ENOMEM;
 817
 818         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 819         if (!res)
 820                 return -ENODEV;
 821
 822         irq = platform_get_irq(pdev, 0);
 823         if (irq <= 0)
 824                 return -ENXIO;
 825
 826         pdata->clk = devm_clk_get(&pdev->dev, "s_axi_aclk");
 827         if (IS_ERR(pdata->clk)) {
 828                 if (PTR_ERR(pdata->clk) != -ENOENT)
 829                         return PTR_ERR(pdata->clk);
 830
 831                 /*
 832                  * Clock framework support is optional, continue on
 833                  * anyways if we don't find a matching clock.
 834                  */
 835                 pdata->clk = NULL;
 836         }
 837
 838         pdata->ulite_uart_driver = &ulite_uart_driver;
 839         ret = clk_prepare_enable(pdata->clk);
 840         if (ret) {
 841                 dev_err(&pdev->dev, "Failed to prepare clock\n");
 842                 return ret;
 843         }
 844
 845         pm_runtime_use_autosuspend(&pdev->dev);
 846         pm_runtime_set_autosuspend_delay(&pdev->dev, UART_AUTOSUSPEND_TIMEOUT);
 847         pm_runtime_set_active(&pdev->dev);
 848         pm_runtime_enable(&pdev->dev);
 849
 850         ret = ulite_assign(&pdev->dev, id, res->start, irq, pdata);
 851
 852         pm_runtime_mark_last_busy(&pdev->dev);
 853         pm_runtime_put_autosuspend(&pdev->dev);
 854
 855         return ret;
 856 }
 857
 858 static int ulite_remove(struct platform_device *pdev)
 859 {
 860         struct uart_port *port = dev_get_drvdata(&pdev->dev);
 861         struct uartlite_data *pdata = port->private_data;
 862         int rc;
 863
 864         clk_unprepare(pdata->clk);
 865         rc = ulite_release(&pdev->dev);
 866 #ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
 867         if (console_port == port)
 868                 console_port = NULL;
 869 #endif
 870
 871         pm_runtime_disable(&pdev->dev);
 872         pm_runtime_set_suspended(&pdev->dev);
 873         pm_runtime_dont_use_autosuspend(&pdev->dev);
 874         return rc;
 875 }
 876
 877 /* work with hotplug and coldplug */
 878 MODULE_ALIAS("platform:uartlite");
 879
 880 static struct platform_driver ulite_platform_driver = {
 881         .probe = ulite_probe,
 882         .remove = ulite_remove,
 883         .driver = {
 884                 .name  = "uartlite",
 885                 .of_match_table = of_match_ptr(ulite_of_match),
 886                 .pm = &ulite_pm_ops,
 887         },
 888 };
 889
 890 /* ---------------------------------------------------------------------
 891  * Module setup/teardown
 892  */
 893
 894 static int __init ulite_init(void)
 895 {
 896         pr_debug("uartlite: calling platform_driver_register()\n");
 897         return platform_driver_register(&ulite_platform_driver);
 898 }
 899
 900 static void __exit ulite_exit(void)
 901 {
 902         platform_driver_unregister(&ulite_platform_driver);
 903         uart_unregister_driver(&ulite_uart_driver);
 904 }
 905
 906 module_init(ulite_init);
 907 module_exit(ulite_exit);
 908
 909 MODULE_AUTHOR("Peter Korsgaard <jacmet@sunsite.dk>");
 910 MODULE_DESCRIPTION("Xilinx uartlite serial driver");
 911 MODULE_LICENSE("GPL");