arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30 #include "assigned-dev.h"
  31 #include "pmu.h"
  32 #include "hyperv.h"
  33
  34 #include <linux/clocksource.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/kvm.h>
  37 #include <linux/fs.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/export.h>
  40 #include <linux/moduleparam.h>
  41 #include <linux/mman.h>
  42 #include <linux/highmem.h>
  43 #include <linux/iommu.h>
  44 #include <linux/intel-iommu.h>
  45 #include <linux/cpufreq.h>
  46 #include <linux/user-return-notifier.h>
  47 #include <linux/srcu.h>
  48 #include <linux/slab.h>
  49 #include <linux/perf_event.h>
  50 #include <linux/uaccess.h>
  51 #include <linux/hash.h>
  52 #include <linux/pci.h>
  53 #include <linux/timekeeper_internal.h>
  54 #include <linux/pvclock_gtod.h>
  55 #include <linux/kvm_irqfd.h>
  56 #include <linux/irqbypass.h>
  57 #include <trace/events/kvm.h>
  58
  59 #include <asm/debugreg.h>
  60 #include <asm/msr.h>
  61 #include <asm/desc.h>
  62 #include <asm/mce.h>
  63 #include <linux/kernel_stat.h>
  64 #include <asm/fpu/internal.h> /* Ugh! */
  65 #include <asm/pvclock.h>
  66 #include <asm/div64.h>
  67 #include <asm/irq_remapping.h>
  68
  69 #define CREATE_TRACE_POINTS
  70 #include "trace.h"
  71
  72 #define MAX_IO_MSRS 256
  73 #define KVM_MAX_MCE_BANKS 32
  74 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  75 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  76
  77 #define emul_to_vcpu(ctxt) \
  78         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  79
  80 /* EFER defaults:
  81  * - enable syscall per default because its emulated by KVM
  82  * - enable LME and LMA per default on 64 bit KVM
  83  */
  84 #ifdef CONFIG_X86_64
  85 static
  86 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  87 #else
  88 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  89 #endif
  90
  91 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  92 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  93
  94 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
  95                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
  96
  97 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  98 static void process_nmi(struct kvm_vcpu *vcpu);
  99 static void enter_smm(struct kvm_vcpu *vcpu);
 100 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 101
 102 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
 103 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 104
 105 static bool __read_mostly ignore_msrs = 0;
 106 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 107
 108 unsigned int min_timer_period_us = 500;
 109 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 110
 111 static bool __read_mostly kvmclock_periodic_sync = true;
 112 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 113
 114 bool __read_mostly kvm_has_tsc_control;
 115 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 116 u32  __read_mostly kvm_max_guest_tsc_khz;
 117 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 118 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 119 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 120 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 121 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 122 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 123 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 124
 125 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 126 static u32 __read_mostly tsc_tolerance_ppm = 250;
 127 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 128
 129 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
 130 unsigned int __read_mostly lapic_timer_advance_ns = 0;
 131 module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
 132
 133 static bool __read_mostly vector_hashing = true;
 134 module_param(vector_hashing, bool, S_IRUGO);
 135
 136 static bool __read_mostly backwards_tsc_observed = false;
 137
 138 #define KVM_NR_SHARED_MSRS 16
 139
 140 struct kvm_shared_msrs_global {
 141         int nr;
 142         u32 msrs[KVM_NR_SHARED_MSRS];
 143 };
 144
 145 struct kvm_shared_msrs {
 146         struct user_return_notifier urn;
 147         bool registered;
 148         struct kvm_shared_msr_values {
 149                 u64 host;
 150                 u64 curr;
 151         } values[KVM_NR_SHARED_MSRS];
 152 };
 153
 154 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 155 static struct kvm_shared_msrs __percpu *shared_msrs;
 156
 157 struct kvm_stats_debugfs_item debugfs_entries[] = {
 158         { "pf_fixed", VCPU_STAT(pf_fixed) },
 159         { "pf_guest", VCPU_STAT(pf_guest) },
 160         { "tlb_flush", VCPU_STAT(tlb_flush) },
 161         { "invlpg", VCPU_STAT(invlpg) },
 162         { "exits", VCPU_STAT(exits) },
 163         { "io_exits", VCPU_STAT(io_exits) },
 164         { "mmio_exits", VCPU_STAT(mmio_exits) },
 165         { "signal_exits", VCPU_STAT(signal_exits) },
 166         { "irq_window", VCPU_STAT(irq_window_exits) },
 167         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 168         { "halt_exits", VCPU_STAT(halt_exits) },
 169         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 170         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
 171         { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) },
 172         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 173         { "hypercalls", VCPU_STAT(hypercalls) },
 174         { "request_irq", VCPU_STAT(request_irq_exits) },
 175         { "irq_exits", VCPU_STAT(irq_exits) },
 176         { "host_state_reload", VCPU_STAT(host_state_reload) },
 177         { "efer_reload", VCPU_STAT(efer_reload) },
 178         { "fpu_reload", VCPU_STAT(fpu_reload) },
 179         { "insn_emulation", VCPU_STAT(insn_emulation) },
 180         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 181         { "irq_injections", VCPU_STAT(irq_injections) },
 182         { "nmi_injections", VCPU_STAT(nmi_injections) },
 183         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 184         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 185         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 186         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 187         { "mmu_flooded", VM_STAT(mmu_flooded) },
 188         { "mmu_recycled", VM_STAT(mmu_recycled) },
 189         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 190         { "mmu_unsync", VM_STAT(mmu_unsync) },
 191         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 192         { "largepages", VM_STAT(lpages) },
 193         { NULL }
 194 };
 195
 196 u64 __read_mostly host_xcr0;
 197
 198 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 199
 200 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 201 {
 202         int i;
 203         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 204                 vcpu->arch.apf.gfns[i] = ~0;
 205 }
 206
 207 static void kvm_on_user_return(struct user_return_notifier *urn)
 208 {
 209         unsigned slot;
 210         struct kvm_shared_msrs *locals
 211                 = container_of(urn, struct kvm_shared_msrs, urn);
 212         struct kvm_shared_msr_values *values;
 213         unsigned long flags;
 214
 215         /*
 216          * Disabling irqs at this point since the following code could be
 217          * interrupted and executed through kvm_arch_hardware_disable()
 218          */
 219         local_irq_save(flags);
 220         if (locals->registered) {
 221                 locals->registered = false;
 222                 user_return_notifier_unregister(urn);
 223         }
 224         local_irq_restore(flags);
 225         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 226                 values = &locals->values[slot];
 227                 if (values->host != values->curr) {
 228                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 229                         values->curr = values->host;
 230                 }
 231         }
 232 }
 233
 234 static void shared_msr_update(unsigned slot, u32 msr)
 235 {
 236         u64 value;
 237         unsigned int cpu = smp_processor_id();
 238         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 239
 240         /* only read, and nobody should modify it at this time,
 241          * so don't need lock */
 242         if (slot >= shared_msrs_global.nr) {
 243                 printk(KERN_ERR "kvm: invalid MSR slot!");
 244                 return;
 245         }
 246         rdmsrl_safe(msr, &value);
 247         smsr->values[slot].host = value;
 248         smsr->values[slot].curr = value;
 249 }
 250
 251 void kvm_define_shared_msr(unsigned slot, u32 msr)
 252 {
 253         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 254         shared_msrs_global.msrs[slot] = msr;
 255         if (slot >= shared_msrs_global.nr)
 256                 shared_msrs_global.nr = slot + 1;
 257 }
 258 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 259
 260 static void kvm_shared_msr_cpu_online(void)
 261 {
 262         unsigned i;
 263
 264         for (i = 0; i < shared_msrs_global.nr; ++i)
 265                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 266 }
 267
 268 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 269 {
 270         unsigned int cpu = smp_processor_id();
 271         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 272         int err;
 273
 274         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 275                 return 0;
 276         smsr->values[slot].curr = value;
 277         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 278         if (err)
 279                 return 1;
 280
 281         if (!smsr->registered) {
 282                 smsr->urn.on_user_return = kvm_on_user_return;
 283                 user_return_notifier_register(&smsr->urn);
 284                 smsr->registered = true;
 285         }
 286         return 0;
 287 }
 288 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 289
 290 static void drop_user_return_notifiers(void)
 291 {
 292         unsigned int cpu = smp_processor_id();
 293         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 294
 295         if (smsr->registered)
 296                 kvm_on_user_return(&smsr->urn);
 297 }
 298
 299 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 300 {
 301         return vcpu->arch.apic_base;
 302 }
 303 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 304
 305 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 306 {
 307         u64 old_state = vcpu->arch.apic_base &
 308                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 309         u64 new_state = msr_info->data &
 310                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 311         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) |
 312                 0x2ff | (guest_cpuid_has_x2apic(vcpu) ? 0 : X2APIC_ENABLE);
 313
 314         if (!msr_info->host_initiated &&
 315             ((msr_info->data & reserved_bits) != 0 ||
 316              new_state == X2APIC_ENABLE ||
 317              (new_state == MSR_IA32_APICBASE_ENABLE &&
 318               old_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) ||
 319              (new_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE) &&
 320               old_state == 0)))
 321                 return 1;
 322
 323         kvm_lapic_set_base(vcpu, msr_info->data);
 324         return 0;
 325 }
 326 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 327
 328 asmlinkage __visible void kvm_spurious_fault(void)
 329 {
 330         /* Fault while not rebooting.  We want the trace. */
 331         BUG();
 332 }
 333 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 334
 335 #define EXCPT_BENIGN            0
 336 #define EXCPT_CONTRIBUTORY      1
 337 #define EXCPT_PF                2
 338
 339 static int exception_class(int vector)
 340 {
 341         switch (vector) {
 342         case PF_VECTOR:
 343                 return EXCPT_PF;
 344         case DE_VECTOR:
 345         case TS_VECTOR:
 346         case NP_VECTOR:
 347         case SS_VECTOR:
 348         case GP_VECTOR:
 349                 return EXCPT_CONTRIBUTORY;
 350         default:
 351                 break;
 352         }
 353         return EXCPT_BENIGN;
 354 }
 355
 356 #define EXCPT_FAULT             0
 357 #define EXCPT_TRAP              1
 358 #define EXCPT_ABORT             2
 359 #define EXCPT_INTERRUPT         3
 360
 361 static int exception_type(int vector)
 362 {
 363         unsigned int mask;
 364
 365         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 366                 return EXCPT_INTERRUPT;
 367
 368         mask = 1 << vector;
 369
 370         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 371         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 372                 return EXCPT_TRAP;
 373
 374         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 375                 return EXCPT_ABORT;
 376
 377         /* Reserved exceptions will result in fault */
 378         return EXCPT_FAULT;
 379 }
 380
 381 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 382                 unsigned nr, bool has_error, u32 error_code,
 383                 bool reinject)
 384 {
 385         u32 prev_nr;
 386         int class1, class2;
 387
 388         kvm_make_request(KVM_REQ_EVENT, vcpu);
 389
 390         if (!vcpu->arch.exception.pending) {
 391         queue:
 392                 if (has_error && !is_protmode(vcpu))
 393                         has_error = false;
 394                 vcpu->arch.exception.pending = true;
 395                 vcpu->arch.exception.has_error_code = has_error;
 396                 vcpu->arch.exception.nr = nr;
 397                 vcpu->arch.exception.error_code = error_code;
 398                 vcpu->arch.exception.reinject = reinject;
 399                 return;
 400         }
 401
 402         /* to check exception */
 403         prev_nr = vcpu->arch.exception.nr;
 404         if (prev_nr == DF_VECTOR) {
 405                 /* triple fault -> shutdown */
 406                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 407                 return;
 408         }
 409         class1 = exception_class(prev_nr);
 410         class2 = exception_class(nr);
 411         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 412                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 413                 /* generate double fault per SDM Table 5-5 */
 414                 vcpu->arch.exception.pending = true;
 415                 vcpu->arch.exception.has_error_code = true;
 416                 vcpu->arch.exception.nr = DF_VECTOR;
 417                 vcpu->arch.exception.error_code = 0;
 418         } else
 419                 /* replace previous exception with a new one in a hope
 420                    that instruction re-execution will regenerate lost
 421                    exception */
 422                 goto queue;
 423 }
 424
 425 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 426 {
 427         kvm_multiple_exception(vcpu, nr, false, 0, false);
 428 }
 429 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 430
 431 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 432 {
 433         kvm_multiple_exception(vcpu, nr, false, 0, true);
 434 }
 435 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 436
 437 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 438 {
 439         if (err)
 440                 kvm_inject_gp(vcpu, 0);
 441         else
 442                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 443 }
 444 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 445
 446 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 447 {
 448         ++vcpu->stat.pf_guest;
 449         vcpu->arch.cr2 = fault->address;
 450         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 451 }
 452 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 453
 454 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 455 {
 456         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 457                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 458         else
 459                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 460
 461         return fault->nested_page_fault;
 462 }
 463
 464 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 465 {
 466         atomic_inc(&vcpu->arch.nmi_queued);
 467         kvm_make_request(KVM_REQ_NMI, vcpu);
 468 }
 469 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 470
 471 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 472 {
 473         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 474 }
 475 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 476
 477 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 478 {
 479         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 480 }
 481 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 482
 483 /*
 484  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 485  * a #GP and return false.
 486  */
 487 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 488 {
 489         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 490                 return true;
 491         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 492         return false;
 493 }
 494 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 495
 496 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 497 {
 498         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 499                 return true;
 500
 501         kvm_queue_exception(vcpu, UD_VECTOR);
 502         return false;
 503 }
 504 EXPORT_SYMBOL_GPL(kvm_require_dr);
 505
 506 /*
 507  * This function will be used to read from the physical memory of the currently
 508  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 509  * can read from guest physical or from the guest's guest physical memory.
 510  */
 511 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 512                             gfn_t ngfn, void *data, int offset, int len,
 513                             u32 access)
 514 {
 515         struct x86_exception exception;
 516         gfn_t real_gfn;
 517         gpa_t ngpa;
 518
 519         ngpa     = gfn_to_gpa(ngfn);
 520         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 521         if (real_gfn == UNMAPPED_GVA)
 522                 return -EFAULT;
 523
 524         real_gfn = gpa_to_gfn(real_gfn);
 525
 526         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 527 }
 528 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 529
 530 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 531                                void *data, int offset, int len, u32 access)
 532 {
 533         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 534                                        data, offset, len, access);
 535 }
 536
 537 /*
 538  * Load the pae pdptrs.  Return true is they are all valid.
 539  */
 540 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 541 {
 542         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 543         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 544         int i;
 545         int ret;
 546         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 547
 548         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 549                                       offset * sizeof(u64), sizeof(pdpte),
 550                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 551         if (ret < 0) {
 552                 ret = 0;
 553                 goto out;
 554         }
 555         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 556                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 557                     (pdpte[i] &
 558                      vcpu->arch.mmu.guest_rsvd_check.rsvd_bits_mask[0][2])) {
 559                         ret = 0;
 560                         goto out;
 561                 }
 562         }
 563         ret = 1;
 564
 565         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 566         __set_bit(VCPU_EXREG_PDPTR,
 567                   (unsigned long *)&vcpu->arch.regs_avail);
 568         __set_bit(VCPU_EXREG_PDPTR,
 569                   (unsigned long *)&vcpu->arch.regs_dirty);
 570 out:
 571
 572         return ret;
 573 }
 574 EXPORT_SYMBOL_GPL(load_pdptrs);
 575
 576 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 577 {
 578         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 579         bool changed = true;
 580         int offset;
 581         gfn_t gfn;
 582         int r;
 583
 584         if (is_long_mode(vcpu) || !is_pae(vcpu))
 585                 return false;
 586
 587         if (!test_bit(VCPU_EXREG_PDPTR,
 588                       (unsigned long *)&vcpu->arch.regs_avail))
 589                 return true;
 590
 591         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 592         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 593         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 594                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 595         if (r < 0)
 596                 goto out;
 597         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 598 out:
 599
 600         return changed;
 601 }
 602
 603 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 604 {
 605         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 606         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 607
 608         cr0 |= X86_CR0_ET;
 609
 610 #ifdef CONFIG_X86_64
 611         if (cr0 & 0xffffffff00000000UL)
 612                 return 1;
 613 #endif
 614
 615         cr0 &= ~CR0_RESERVED_BITS;
 616
 617         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 618                 return 1;
 619
 620         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 621                 return 1;
 622
 623         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 624 #ifdef CONFIG_X86_64
 625                 if ((vcpu->arch.efer & EFER_LME)) {
 626                         int cs_db, cs_l;
 627
 628                         if (!is_pae(vcpu))
 629                                 return 1;
 630                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 631                         if (cs_l)
 632                                 return 1;
 633                 } else
 634 #endif
 635                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 636                                                  kvm_read_cr3(vcpu)))
 637                         return 1;
 638         }
 639
 640         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 641                 return 1;
 642
 643         kvm_x86_ops->set_cr0(vcpu, cr0);
 644
 645         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 646                 kvm_clear_async_pf_completion_queue(vcpu);
 647                 kvm_async_pf_hash_reset(vcpu);
 648         }
 649
 650         if ((cr0 ^ old_cr0) & update_bits)
 651                 kvm_mmu_reset_context(vcpu);
 652
 653         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 654             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 655             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 656                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 657
 658         return 0;
 659 }
 660 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 661
 662 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 663 {
 664         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 665 }
 666 EXPORT_SYMBOL_GPL(kvm_lmsw);
 667
 668 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 669 {
 670         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 671                         !vcpu->guest_xcr0_loaded) {
 672                 /* kvm_set_xcr() also depends on this */
 673                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 674                 vcpu->guest_xcr0_loaded = 1;
 675         }
 676 }
 677
 678 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 679 {
 680         if (vcpu->guest_xcr0_loaded) {
 681                 if (vcpu->arch.xcr0 != host_xcr0)
 682                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 683                 vcpu->guest_xcr0_loaded = 0;
 684         }
 685 }
 686
 687 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 688 {
 689         u64 xcr0 = xcr;
 690         u64 old_xcr0 = vcpu->arch.xcr0;
 691         u64 valid_bits;
 692
 693         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 694         if (index != XCR_XFEATURE_ENABLED_MASK)
 695                 return 1;
 696         if (!(xcr0 & XFEATURE_MASK_FP))
 697                 return 1;
 698         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 699                 return 1;
 700
 701         /*
 702          * Do not allow the guest to set bits that we do not support
 703          * saving.  However, xcr0 bit 0 is always set, even if the
 704          * emulated CPU does not support XSAVE (see fx_init).
 705          */
 706         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 707         if (xcr0 & ~valid_bits)
 708                 return 1;
 709
 710         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 711             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 712                 return 1;
 713
 714         if (xcr0 & XFEATURE_MASK_AVX512) {
 715                 if (!(xcr0 & XFEATURE_MASK_YMM))
 716                         return 1;
 717                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 718                         return 1;
 719         }
 720         vcpu->arch.xcr0 = xcr0;
 721
 722         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 723                 kvm_update_cpuid(vcpu);
 724         return 0;
 725 }
 726
 727 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 728 {
 729         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 730             __kvm_set_xcr(vcpu, index, xcr)) {
 731                 kvm_inject_gp(vcpu, 0);
 732                 return 1;
 733         }
 734         return 0;
 735 }
 736 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 737
 738 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 739 {
 740         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 741         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 742                                    X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
 743
 744         if (cr4 & CR4_RESERVED_BITS)
 745                 return 1;
 746
 747         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 748                 return 1;
 749
 750         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 751                 return 1;
 752
 753         if (!guest_cpuid_has_smap(vcpu) && (cr4 & X86_CR4_SMAP))
 754                 return 1;
 755
 756         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_FSGSBASE))
 757                 return 1;
 758
 759         if (!guest_cpuid_has_pku(vcpu) && (cr4 & X86_CR4_PKE))
 760                 return 1;
 761
 762         if (is_long_mode(vcpu)) {
 763                 if (!(cr4 & X86_CR4_PAE))
 764                         return 1;
 765         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 766                    && ((cr4 ^ old_cr4) & pdptr_bits)
 767                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 768                                    kvm_read_cr3(vcpu)))
 769                 return 1;
 770
 771         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 772                 if (!guest_cpuid_has_pcid(vcpu))
 773                         return 1;
 774
 775                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 776                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 777                         return 1;
 778         }
 779
 780         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 781                 return 1;
 782
 783         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 784             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 785                 kvm_mmu_reset_context(vcpu);
 786
 787         if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
 788                 kvm_update_cpuid(vcpu);
 789
 790         return 0;
 791 }
 792 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 793
 794 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 795 {
 796 #ifdef CONFIG_X86_64
 797         cr3 &= ~CR3_PCID_INVD;
 798 #endif
 799
 800         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 801                 kvm_mmu_sync_roots(vcpu);
 802                 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 803                 return 0;
 804         }
 805
 806         if (is_long_mode(vcpu)) {
 807                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 808                         return 1;
 809         } else if (is_pae(vcpu) && is_paging(vcpu) &&
 810                    !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 811                 return 1;
 812
 813         vcpu->arch.cr3 = cr3;
 814         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 815         kvm_mmu_new_cr3(vcpu);
 816         return 0;
 817 }
 818 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 819
 820 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 821 {
 822         if (cr8 & CR8_RESERVED_BITS)
 823                 return 1;
 824         if (lapic_in_kernel(vcpu))
 825                 kvm_lapic_set_tpr(vcpu, cr8);
 826         else
 827                 vcpu->arch.cr8 = cr8;
 828         return 0;
 829 }
 830 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 831
 832 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 833 {
 834         if (lapic_in_kernel(vcpu))
 835                 return kvm_lapic_get_cr8(vcpu);
 836         else
 837                 return vcpu->arch.cr8;
 838 }
 839 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 840
 841 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
 842 {
 843         int i;
 844
 845         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 846                 for (i = 0; i < KVM_NR_DB_REGS; i++)
 847                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
 848                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
 849         }
 850 }
 851
 852 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
 853 {
 854         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 855                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
 856 }
 857
 858 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 859 {
 860         unsigned long dr7;
 861
 862         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 863                 dr7 = vcpu->arch.guest_debug_dr7;
 864         else
 865                 dr7 = vcpu->arch.dr7;
 866         kvm_x86_ops->set_dr7(vcpu, dr7);
 867         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
 868         if (dr7 & DR7_BP_EN_MASK)
 869                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
 870 }
 871
 872 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
 873 {
 874         u64 fixed = DR6_FIXED_1;
 875
 876         if (!guest_cpuid_has_rtm(vcpu))
 877                 fixed |= DR6_RTM;
 878         return fixed;
 879 }
 880
 881 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 882 {
 883         switch (dr) {
 884         case 0 ... 3:
 885                 vcpu->arch.db[dr] = val;
 886                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 887                         vcpu->arch.eff_db[dr] = val;
 888                 break;
 889         case 4:
 890                 /* fall through */
 891         case 6:
 892                 if (val & 0xffffffff00000000ULL)
 893                         return -1; /* #GP */
 894                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
 895                 kvm_update_dr6(vcpu);
 896                 break;
 897         case 5:
 898                 /* fall through */
 899         default: /* 7 */
 900                 if (val & 0xffffffff00000000ULL)
 901                         return -1; /* #GP */
 902                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 903                 kvm_update_dr7(vcpu);
 904                 break;
 905         }
 906
 907         return 0;
 908 }
 909
 910 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 911 {
 912         if (__kvm_set_dr(vcpu, dr, val)) {
 913                 kvm_inject_gp(vcpu, 0);
 914                 return 1;
 915         }
 916         return 0;
 917 }
 918 EXPORT_SYMBOL_GPL(kvm_set_dr);
 919
 920 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 921 {
 922         switch (dr) {
 923         case 0 ... 3:
 924                 *val = vcpu->arch.db[dr];
 925                 break;
 926         case 4:
 927                 /* fall through */
 928         case 6:
 929                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 930                         *val = vcpu->arch.dr6;
 931                 else
 932                         *val = kvm_x86_ops->get_dr6(vcpu);
 933                 break;
 934         case 5:
 935                 /* fall through */
 936         default: /* 7 */
 937                 *val = vcpu->arch.dr7;
 938                 break;
 939         }
 940         return 0;
 941 }
 942 EXPORT_SYMBOL_GPL(kvm_get_dr);
 943
 944 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 945 {
 946         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 947         u64 data;
 948         int err;
 949
 950         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
 951         if (err)
 952                 return err;
 953         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 954         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 955         return err;
 956 }
 957 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 958
 959 /*
 960  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 961  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 962  *
 963  * This list is modified at module load time to reflect the
 964  * capabilities of the host cpu. This capabilities test skips MSRs that are
 965  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
 966  * may depend on host virtualization features rather than host cpu features.
 967  */
 968
 969 static u32 msrs_to_save[] = {
 970         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 971         MSR_STAR,
 972 #ifdef CONFIG_X86_64
 973         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 974 #endif
 975         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
 976         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
 977 };
 978
 979 static unsigned num_msrs_to_save;
 980
 981 static u32 emulated_msrs[] = {
 982         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 983         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 984         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 985         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
 986         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
 987         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
 988         HV_X64_MSR_RESET,
 989         HV_X64_MSR_VP_INDEX,
 990         HV_X64_MSR_VP_RUNTIME,
 991         HV_X64_MSR_SCONTROL,
 992         HV_X64_MSR_STIMER0_CONFIG,
 993         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 994         MSR_KVM_PV_EOI_EN,
 995
 996         MSR_IA32_TSC_ADJUST,
 997         MSR_IA32_TSCDEADLINE,
 998         MSR_IA32_MISC_ENABLE,
 999         MSR_IA32_MCG_STATUS,
1000         MSR_IA32_MCG_CTL,
1001         MSR_IA32_MCG_EXT_CTL,
1002         MSR_IA32_SMBASE,
1003 };
1004
1005 static unsigned num_emulated_msrs;
1006
1007 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1008 {
1009         if (efer & efer_reserved_bits)
1010                 return false;
1011
1012         if (efer & EFER_FFXSR) {
1013                 struct kvm_cpuid_entry2 *feat;
1014
1015                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
1016                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
1017                         return false;
1018         }
1019
1020         if (efer & EFER_SVME) {
1021                 struct kvm_cpuid_entry2 *feat;
1022
1023                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
1024                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
1025                         return false;
1026         }
1027
1028         return true;
1029 }
1030 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1031
1032 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
1033 {
1034         u64 old_efer = vcpu->arch.efer;
1035
1036         if (!kvm_valid_efer(vcpu, efer))
1037                 return 1;
1038
1039         if (is_paging(vcpu)
1040             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1041                 return 1;
1042
1043         efer &= ~EFER_LMA;
1044         efer |= vcpu->arch.efer & EFER_LMA;
1045
1046         kvm_x86_ops->set_efer(vcpu, efer);
1047
1048         /* Update reserved bits */
1049         if ((efer ^ old_efer) & EFER_NX)
1050                 kvm_mmu_reset_context(vcpu);
1051
1052         return 0;
1053 }
1054
1055 void kvm_enable_efer_bits(u64 mask)
1056 {
1057        efer_reserved_bits &= ~mask;
1058 }
1059 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1060
1061 /*
1062  * Writes msr value into into the appropriate "register".
1063  * Returns 0 on success, non-0 otherwise.
1064  * Assumes vcpu_load() was already called.
1065  */
1066 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1067 {
1068         switch (msr->index) {
1069         case MSR_FS_BASE:
1070         case MSR_GS_BASE:
1071         case MSR_KERNEL_GS_BASE:
1072         case MSR_CSTAR:
1073         case MSR_LSTAR:
1074                 if (is_noncanonical_address(msr->data))
1075                         return 1;
1076                 break;
1077         case MSR_IA32_SYSENTER_EIP:
1078         case MSR_IA32_SYSENTER_ESP:
1079                 /*
1080                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1081                  * non-canonical address is written on Intel but not on
1082                  * AMD (which ignores the top 32-bits, because it does
1083                  * not implement 64-bit SYSENTER).
1084                  *
1085                  * 64-bit code should hence be able to write a non-canonical
1086                  * value on AMD.  Making the address canonical ensures that
1087                  * vmentry does not fail on Intel after writing a non-canonical
1088                  * value, and that something deterministic happens if the guest
1089                  * invokes 64-bit SYSENTER.
1090                  */
1091                 msr->data = get_canonical(msr->data);
1092         }
1093         return kvm_x86_ops->set_msr(vcpu, msr);
1094 }
1095 EXPORT_SYMBOL_GPL(kvm_set_msr);
1096
1097 /*
1098  * Adapt set_msr() to msr_io()'s calling convention
1099  */
1100 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1101 {
1102         struct msr_data msr;
1103         int r;
1104
1105         msr.index = index;
1106         msr.host_initiated = true;
1107         r = kvm_get_msr(vcpu, &msr);
1108         if (r)
1109                 return r;
1110
1111         *data = msr.data;
1112         return 0;
1113 }
1114
1115 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1116 {
1117         struct msr_data msr;
1118
1119         msr.data = *data;
1120         msr.index = index;
1121         msr.host_initiated = true;
1122         return kvm_set_msr(vcpu, &msr);
1123 }
1124
1125 #ifdef CONFIG_X86_64
1126 struct pvclock_gtod_data {
1127         seqcount_t      seq;
1128
1129         struct { /* extract of a clocksource struct */
1130                 int vclock_mode;
1131                 cycle_t cycle_last;
1132                 cycle_t mask;
1133                 u32     mult;
1134                 u32     shift;
1135         } clock;
1136
1137         u64             boot_ns;
1138         u64             nsec_base;
1139 };
1140
1141 static struct pvclock_gtod_data pvclock_gtod_data;
1142
1143 static void update_pvclock_gtod(struct timekeeper *tk)
1144 {
1145         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1146         u64 boot_ns;
1147
1148         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1149
1150         write_seqcount_begin(&vdata->seq);
1151
1152         /* copy pvclock gtod data */
1153         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1154         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1155         vdata->clock.mask               = tk->tkr_mono.mask;
1156         vdata->clock.mult               = tk->tkr_mono.mult;
1157         vdata->clock.shift              = tk->tkr_mono.shift;
1158
1159         vdata->boot_ns                  = boot_ns;
1160         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1161
1162         write_seqcount_end(&vdata->seq);
1163 }
1164 #endif
1165
1166 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1167 {
1168         /*
1169          * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1170          * vcpu_enter_guest.  This function is only called from
1171          * the physical CPU that is running vcpu.
1172          */
1173         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1174 }
1175
1176 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1177 {
1178         int version;
1179         int r;
1180         struct pvclock_wall_clock wc;
1181         struct timespec64 boot;
1182
1183         if (!wall_clock)
1184                 return;
1185
1186         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1187         if (r)
1188                 return;
1189
1190         if (version & 1)
1191                 ++version;  /* first time write, random junk */
1192
1193         ++version;
1194
1195         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1196                 return;
1197
1198         /*
1199          * The guest calculates current wall clock time by adding
1200          * system time (updated by kvm_guest_time_update below) to the
1201          * wall clock specified here.  guest system time equals host
1202          * system time for us, thus we must fill in host boot time here.
1203          */
1204         getboottime64(&boot);
1205
1206         if (kvm->arch.kvmclock_offset) {
1207                 struct timespec64 ts = ns_to_timespec64(kvm->arch.kvmclock_offset);
1208                 boot = timespec64_sub(boot, ts);
1209         }
1210         wc.sec = (u32)boot.tv_sec; /* overflow in 2106 guest time */
1211         wc.nsec = boot.tv_nsec;
1212         wc.version = version;
1213
1214         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1215
1216         version++;
1217         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1218 }
1219
1220 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1221 {
1222         do_shl32_div32(dividend, divisor);
1223         return dividend;
1224 }
1225
1226 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
1227                                s8 *pshift, u32 *pmultiplier)
1228 {
1229         uint64_t scaled64;
1230         int32_t  shift = 0;
1231         uint64_t tps64;
1232         uint32_t tps32;
1233
1234         tps64 = base_hz;
1235         scaled64 = scaled_hz;
1236         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1237                 tps64 >>= 1;
1238                 shift--;
1239         }
1240
1241         tps32 = (uint32_t)tps64;
1242         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1243                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1244                         scaled64 >>= 1;
1245                 else
1246                         tps32 <<= 1;
1247                 shift++;
1248         }
1249
1250         *pshift = shift;
1251         *pmultiplier = div_frac(scaled64, tps32);
1252
1253         pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1254                  __func__, base_hz, scaled_hz, shift, *pmultiplier);
1255 }
1256
1257 #ifdef CONFIG_X86_64
1258 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1259 #endif
1260
1261 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1262 static unsigned long max_tsc_khz;
1263
1264 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1265 {
1266         u64 v = (u64)khz * (1000000 + ppm);
1267         do_div(v, 1000000);
1268         return v;
1269 }
1270
1271 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1272 {
1273         u64 ratio;
1274
1275         /* Guest TSC same frequency as host TSC? */
1276         if (!scale) {
1277                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1278                 return 0;
1279         }
1280
1281         /* TSC scaling supported? */
1282         if (!kvm_has_tsc_control) {
1283                 if (user_tsc_khz > tsc_khz) {
1284                         vcpu->arch.tsc_catchup = 1;
1285                         vcpu->arch.tsc_always_catchup = 1;
1286                         return 0;
1287                 } else {
1288                         WARN(1, "user requested TSC rate below hardware speed\n");
1289                         return -1;
1290                 }
1291         }
1292
1293         /* TSC scaling required  - calculate ratio */
1294         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1295                                 user_tsc_khz, tsc_khz);
1296
1297         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1298                 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1299                           user_tsc_khz);
1300                 return -1;
1301         }
1302
1303         vcpu->arch.tsc_scaling_ratio = ratio;
1304         return 0;
1305 }
1306
1307 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
1308 {
1309         u32 thresh_lo, thresh_hi;
1310         int use_scaling = 0;
1311
1312         /* tsc_khz can be zero if TSC calibration fails */
1313         if (user_tsc_khz == 0) {
1314                 /* set tsc_scaling_ratio to a safe value */
1315                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1316                 return -1;
1317         }
1318
1319         /* Compute a scale to convert nanoseconds in TSC cycles */
1320         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
1321                            &vcpu->arch.virtual_tsc_shift,
1322                            &vcpu->arch.virtual_tsc_mult);
1323         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
1324
1325         /*
1326          * Compute the variation in TSC rate which is acceptable
1327          * within the range of tolerance and decide if the
1328          * rate being applied is within that bounds of the hardware
1329          * rate.  If so, no scaling or compensation need be done.
1330          */
1331         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1332         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1333         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
1334                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
1335                 use_scaling = 1;
1336         }
1337         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
1338 }
1339
1340 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1341 {
1342         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1343                                       vcpu->arch.virtual_tsc_mult,
1344                                       vcpu->arch.virtual_tsc_shift);
1345         tsc += vcpu->arch.this_tsc_write;
1346         return tsc;
1347 }
1348
1349 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1350 {
1351 #ifdef CONFIG_X86_64
1352         bool vcpus_matched;
1353         struct kvm_arch *ka = &vcpu->kvm->arch;
1354         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1355
1356         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1357                          atomic_read(&vcpu->kvm->online_vcpus));
1358
1359         /*
1360          * Once the masterclock is enabled, always perform request in
1361          * order to update it.
1362          *
1363          * In order to enable masterclock, the host clocksource must be TSC
1364          * and the vcpus need to have matched TSCs.  When that happens,
1365          * perform request to enable masterclock.
1366          */
1367         if (ka->use_master_clock ||
1368             (gtod->clock.vclock_mode == VCLOCK_TSC && vcpus_matched))
1369                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1370
1371         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1372                             atomic_read(&vcpu->kvm->online_vcpus),
1373                             ka->use_master_clock, gtod->clock.vclock_mode);
1374 #endif
1375 }
1376
1377 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1378 {
1379         u64 curr_offset = vcpu->arch.tsc_offset;
1380         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1381 }
1382
1383 /*
1384  * Multiply tsc by a fixed point number represented by ratio.
1385  *
1386  * The most significant 64-N bits (mult) of ratio represent the
1387  * integral part of the fixed point number; the remaining N bits
1388  * (frac) represent the fractional part, ie. ratio represents a fixed
1389  * point number (mult + frac * 2^(-N)).
1390  *
1391  * N equals to kvm_tsc_scaling_ratio_frac_bits.
1392  */
1393 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1394 {
1395         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1396 }
1397
1398 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1399 {
1400         u64 _tsc = tsc;
1401         u64 ratio = vcpu->arch.tsc_scaling_ratio;
1402
1403         if (ratio != kvm_default_tsc_scaling_ratio)
1404                 _tsc = __scale_tsc(ratio, tsc);
1405
1406         return _tsc;
1407 }
1408 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1409
1410 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1411 {
1412         u64 tsc;
1413
1414         tsc = kvm_scale_tsc(vcpu, rdtsc());
1415
1416         return target_tsc - tsc;
1417 }
1418
1419 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1420 {
1421         return vcpu->arch.tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
1422 }
1423 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1424
1425 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
1426 {
1427         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1428         vcpu->arch.tsc_offset = offset;
1429 }
1430
1431 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1432 {
1433         struct kvm *kvm = vcpu->kvm;
1434         u64 offset, ns, elapsed;
1435         unsigned long flags;
1436         s64 usdiff;
1437         bool matched;
1438         bool already_matched;
1439         u64 data = msr->data;
1440
1441         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1442         offset = kvm_compute_tsc_offset(vcpu, data);
1443         ns = ktime_get_boot_ns();
1444         elapsed = ns - kvm->arch.last_tsc_nsec;
1445
1446         if (vcpu->arch.virtual_tsc_khz) {
1447                 int faulted = 0;
1448
1449                 /* n.b - signed multiplication and division required */
1450                 usdiff = data - kvm->arch.last_tsc_write;
1451 #ifdef CONFIG_X86_64
1452                 usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1453 #else
1454                 /* do_div() only does unsigned */
1455                 asm("1: idivl %[divisor]\n"
1456                     "2: xor %%edx, %%edx\n"
1457                     "   movl $0, %[faulted]\n"
1458                     "3:\n"
1459                     ".section .fixup,\"ax\"\n"
1460                     "4: movl $1, %[faulted]\n"
1461                     "   jmp  3b\n"
1462                     ".previous\n"
1463
1464                 _ASM_EXTABLE(1b, 4b)
1465
1466                 : "=A"(usdiff), [faulted] "=r" (faulted)
1467                 : "A"(usdiff * 1000), [divisor] "rm"(vcpu->arch.virtual_tsc_khz));
1468
1469 #endif
1470                 do_div(elapsed, 1000);
1471                 usdiff -= elapsed;
1472                 if (usdiff < 0)
1473                         usdiff = -usdiff;
1474
1475                 /* idivl overflow => difference is larger than USEC_PER_SEC */
1476                 if (faulted)
1477                         usdiff = USEC_PER_SEC;
1478         } else
1479                 usdiff = USEC_PER_SEC; /* disable TSC match window below */
1480
1481         /*
1482          * Special case: TSC write with a small delta (1 second) of virtual
1483          * cycle time against real time is interpreted as an attempt to
1484          * synchronize the CPU.
1485          *
1486          * For a reliable TSC, we can match TSC offsets, and for an unstable
1487          * TSC, we add elapsed time in this computation.  We could let the
1488          * compensation code attempt to catch up if we fall behind, but
1489          * it's better to try to match offsets from the beginning.
1490          */
1491         if (usdiff < USEC_PER_SEC &&
1492             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1493                 if (!check_tsc_unstable()) {
1494                         offset = kvm->arch.cur_tsc_offset;
1495                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1496                 } else {
1497                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1498                         data += delta;
1499                         offset = kvm_compute_tsc_offset(vcpu, data);
1500                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1501                 }
1502                 matched = true;
1503                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1504         } else {
1505                 /*
1506                  * We split periods of matched TSC writes into generations.
1507                  * For each generation, we track the original measured
1508                  * nanosecond time, offset, and write, so if TSCs are in
1509                  * sync, we can match exact offset, and if not, we can match
1510                  * exact software computation in compute_guest_tsc()
1511                  *
1512                  * These values are tracked in kvm->arch.cur_xxx variables.
1513                  */
1514                 kvm->arch.cur_tsc_generation++;
1515                 kvm->arch.cur_tsc_nsec = ns;
1516                 kvm->arch.cur_tsc_write = data;
1517                 kvm->arch.cur_tsc_offset = offset;
1518                 matched = false;
1519                 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1520                          kvm->arch.cur_tsc_generation, data);
1521         }
1522
1523         /*
1524          * We also track th most recent recorded KHZ, write and time to
1525          * allow the matching interval to be extended at each write.
1526          */
1527         kvm->arch.last_tsc_nsec = ns;
1528         kvm->arch.last_tsc_write = data;
1529         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1530
1531         vcpu->arch.last_guest_tsc = data;
1532
1533         /* Keep track of which generation this VCPU has synchronized to */
1534         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1535         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1536         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1537
1538         if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1539                 update_ia32_tsc_adjust_msr(vcpu, offset);
1540         kvm_vcpu_write_tsc_offset(vcpu, offset);
1541         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1542
1543         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1544         if (!matched) {
1545                 kvm->arch.nr_vcpus_matched_tsc = 0;
1546         } else if (!already_matched) {
1547                 kvm->arch.nr_vcpus_matched_tsc++;
1548         }
1549
1550         kvm_track_tsc_matching(vcpu);
1551         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1552 }
1553
1554 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1555
1556 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1557                                            s64 adjustment)
1558 {
1559         kvm_vcpu_write_tsc_offset(vcpu, vcpu->arch.tsc_offset + adjustment);
1560 }
1561
1562 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1563 {
1564         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1565                 WARN_ON(adjustment < 0);
1566         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1567         adjust_tsc_offset_guest(vcpu, adjustment);
1568 }
1569
1570 #ifdef CONFIG_X86_64
1571
1572 static cycle_t read_tsc(void)
1573 {
1574         cycle_t ret = (cycle_t)rdtsc_ordered();
1575         u64 last = pvclock_gtod_data.clock.cycle_last;
1576
1577         if (likely(ret >= last))
1578                 return ret;
1579
1580         /*
1581          * GCC likes to generate cmov here, but this branch is extremely
1582          * predictable (it's just a function of time and the likely is
1583          * very likely) and there's a data dependence, so force GCC
1584          * to generate a branch instead.  I don't barrier() because
1585          * we don't actually need a barrier, and if this function
1586          * ever gets inlined it will generate worse code.
1587          */
1588         asm volatile ("");
1589         return last;
1590 }
1591
1592 static inline u64 vgettsc(cycle_t *cycle_now)
1593 {
1594         long v;
1595         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1596
1597         *cycle_now = read_tsc();
1598
1599         v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1600         return v * gtod->clock.mult;
1601 }
1602
1603 static int do_monotonic_boot(s64 *t, cycle_t *cycle_now)
1604 {
1605         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1606         unsigned long seq;
1607         int mode;
1608         u64 ns;
1609
1610         do {
1611                 seq = read_seqcount_begin(&gtod->seq);
1612                 mode = gtod->clock.vclock_mode;
1613                 ns = gtod->nsec_base;
1614                 ns += vgettsc(cycle_now);
1615                 ns >>= gtod->clock.shift;
1616                 ns += gtod->boot_ns;
1617         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1618         *t = ns;
1619
1620         return mode;
1621 }
1622
1623 /* returns true if host is using tsc clocksource */
1624 static bool kvm_get_time_and_clockread(s64 *kernel_ns, cycle_t *cycle_now)
1625 {
1626         /* checked again under seqlock below */
1627         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1628                 return false;
1629
1630         return do_monotonic_boot(kernel_ns, cycle_now) == VCLOCK_TSC;
1631 }
1632 #endif
1633
1634 /*
1635  *
1636  * Assuming a stable TSC across physical CPUS, and a stable TSC
1637  * across virtual CPUs, the following condition is possible.
1638  * Each numbered line represents an event visible to both
1639  * CPUs at the next numbered event.
1640  *
1641  * "timespecX" represents host monotonic time. "tscX" represents
1642  * RDTSC value.
1643  *
1644  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1645  *
1646  * 1.  read timespec0,tsc0
1647  * 2.                                   | timespec1 = timespec0 + N
1648  *                                      | tsc1 = tsc0 + M
1649  * 3. transition to guest               | transition to guest
1650  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1651  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1652  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1653  *
1654  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1655  *
1656  *      - ret0 < ret1
1657  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1658  *              ...
1659  *      - 0 < N - M => M < N
1660  *
1661  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1662  * always the case (the difference between two distinct xtime instances
1663  * might be smaller then the difference between corresponding TSC reads,
1664  * when updating guest vcpus pvclock areas).
1665  *
1666  * To avoid that problem, do not allow visibility of distinct
1667  * system_timestamp/tsc_timestamp values simultaneously: use a master
1668  * copy of host monotonic time values. Update that master copy
1669  * in lockstep.
1670  *
1671  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1672  *
1673  */
1674
1675 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1676 {
1677 #ifdef CONFIG_X86_64
1678         struct kvm_arch *ka = &kvm->arch;
1679         int vclock_mode;
1680         bool host_tsc_clocksource, vcpus_matched;
1681
1682         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1683                         atomic_read(&kvm->online_vcpus));
1684
1685         /*
1686          * If the host uses TSC clock, then passthrough TSC as stable
1687          * to the guest.
1688          */
1689         host_tsc_clocksource = kvm_get_time_and_clockread(
1690                                         &ka->master_kernel_ns,
1691                                         &ka->master_cycle_now);
1692
1693         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1694                                 && !backwards_tsc_observed
1695                                 && !ka->boot_vcpu_runs_old_kvmclock;
1696
1697         if (ka->use_master_clock)
1698                 atomic_set(&kvm_guest_has_master_clock, 1);
1699
1700         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1701         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1702                                         vcpus_matched);
1703 #endif
1704 }
1705
1706 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
1707 {
1708         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
1709 }
1710
1711 static void kvm_gen_update_masterclock(struct kvm *kvm)
1712 {
1713 #ifdef CONFIG_X86_64
1714         int i;
1715         struct kvm_vcpu *vcpu;
1716         struct kvm_arch *ka = &kvm->arch;
1717
1718         spin_lock(&ka->pvclock_gtod_sync_lock);
1719         kvm_make_mclock_inprogress_request(kvm);
1720         /* no guest entries from this point */
1721         pvclock_update_vm_gtod_copy(kvm);
1722
1723         kvm_for_each_vcpu(i, vcpu, kvm)
1724                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1725
1726         /* guest entries allowed */
1727         kvm_for_each_vcpu(i, vcpu, kvm)
1728                 clear_bit(KVM_REQ_MCLOCK_INPROGRESS, &vcpu->requests);
1729
1730         spin_unlock(&ka->pvclock_gtod_sync_lock);
1731 #endif
1732 }
1733
1734 static u64 __get_kvmclock_ns(struct kvm *kvm)
1735 {
1736         struct kvm_arch *ka = &kvm->arch;
1737         struct pvclock_vcpu_time_info hv_clock;
1738
1739         spin_lock(&ka->pvclock_gtod_sync_lock);
1740         if (!ka->use_master_clock) {
1741                 spin_unlock(&ka->pvclock_gtod_sync_lock);
1742                 return ktime_get_boot_ns() + ka->kvmclock_offset;
1743         }
1744
1745         hv_clock.tsc_timestamp = ka->master_cycle_now;
1746         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
1747         spin_unlock(&ka->pvclock_gtod_sync_lock);
1748
1749         kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
1750                            &hv_clock.tsc_shift,
1751                            &hv_clock.tsc_to_system_mul);
1752         return __pvclock_read_cycles(&hv_clock, rdtsc());
1753 }
1754
1755 u64 get_kvmclock_ns(struct kvm *kvm)
1756 {
1757         unsigned long flags;
1758         s64 ns;
1759
1760         local_irq_save(flags);
1761         ns = __get_kvmclock_ns(kvm);
1762         local_irq_restore(flags);
1763
1764         return ns;
1765 }
1766
1767 static void kvm_setup_pvclock_page(struct kvm_vcpu *v)
1768 {
1769         struct kvm_vcpu_arch *vcpu = &v->arch;
1770         struct pvclock_vcpu_time_info guest_hv_clock;
1771
1772         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1773                 &guest_hv_clock, sizeof(guest_hv_clock))))
1774                 return;
1775
1776         /* This VCPU is paused, but it's legal for a guest to read another
1777          * VCPU's kvmclock, so we really have to follow the specification where
1778          * it says that version is odd if data is being modified, and even after
1779          * it is consistent.
1780          *
1781          * Version field updates must be kept separate.  This is because
1782          * kvm_write_guest_cached might use a "rep movs" instruction, and
1783          * writes within a string instruction are weakly ordered.  So there
1784          * are three writes overall.
1785          *
1786          * As a small optimization, only write the version field in the first
1787          * and third write.  The vcpu->pv_time cache is still valid, because the
1788          * version field is the first in the struct.
1789          */
1790         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
1791
1792         vcpu->hv_clock.version = guest_hv_clock.version + 1;
1793         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1794                                 &vcpu->hv_clock,
1795                                 sizeof(vcpu->hv_clock.version));
1796
1797         smp_wmb();
1798
1799         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1800         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1801
1802         if (vcpu->pvclock_set_guest_stopped_request) {
1803                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
1804                 vcpu->pvclock_set_guest_stopped_request = false;
1805         }
1806
1807         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
1808
1809         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1810                                 &vcpu->hv_clock,
1811                                 sizeof(vcpu->hv_clock));
1812
1813         smp_wmb();
1814
1815         vcpu->hv_clock.version++;
1816         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1817                                 &vcpu->hv_clock,
1818                                 sizeof(vcpu->hv_clock.version));
1819 }
1820
1821 static int kvm_guest_time_update(struct kvm_vcpu *v)
1822 {
1823         unsigned long flags, tgt_tsc_khz;
1824         struct kvm_vcpu_arch *vcpu = &v->arch;
1825         struct kvm_arch *ka = &v->kvm->arch;
1826         s64 kernel_ns;
1827         u64 tsc_timestamp, host_tsc;
1828         u8 pvclock_flags;
1829         bool use_master_clock;
1830
1831         kernel_ns = 0;
1832         host_tsc = 0;
1833
1834         /*
1835          * If the host uses TSC clock, then passthrough TSC as stable
1836          * to the guest.
1837          */
1838         spin_lock(&ka->pvclock_gtod_sync_lock);
1839         use_master_clock = ka->use_master_clock;
1840         if (use_master_clock) {
1841                 host_tsc = ka->master_cycle_now;
1842                 kernel_ns = ka->master_kernel_ns;
1843         }
1844         spin_unlock(&ka->pvclock_gtod_sync_lock);
1845
1846         /* Keep irq disabled to prevent changes to the clock */
1847         local_irq_save(flags);
1848         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
1849         if (unlikely(tgt_tsc_khz == 0)) {
1850                 local_irq_restore(flags);
1851                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1852                 return 1;
1853         }
1854         if (!use_master_clock) {
1855                 host_tsc = rdtsc();
1856                 kernel_ns = ktime_get_boot_ns();
1857         }
1858
1859         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
1860
1861         /*
1862          * We may have to catch up the TSC to match elapsed wall clock
1863          * time for two reasons, even if kvmclock is used.
1864          *   1) CPU could have been running below the maximum TSC rate
1865          *   2) Broken TSC compensation resets the base at each VCPU
1866          *      entry to avoid unknown leaps of TSC even when running
1867          *      again on the same CPU.  This may cause apparent elapsed
1868          *      time to disappear, and the guest to stand still or run
1869          *      very slowly.
1870          */
1871         if (vcpu->tsc_catchup) {
1872                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1873                 if (tsc > tsc_timestamp) {
1874                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1875                         tsc_timestamp = tsc;
1876                 }
1877         }
1878
1879         local_irq_restore(flags);
1880
1881         /* With all the info we got, fill in the values */
1882
1883         if (kvm_has_tsc_control)
1884                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
1885
1886         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
1887                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
1888                                    &vcpu->hv_clock.tsc_shift,
1889                                    &vcpu->hv_clock.tsc_to_system_mul);
1890                 vcpu->hw_tsc_khz = tgt_tsc_khz;
1891         }
1892
1893         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1894         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1895         vcpu->last_guest_tsc = tsc_timestamp;
1896
1897         /* If the host uses TSC clocksource, then it is stable */
1898         pvclock_flags = 0;
1899         if (use_master_clock)
1900                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1901
1902         vcpu->hv_clock.flags = pvclock_flags;
1903
1904         if (vcpu->pv_time_enabled)
1905                 kvm_setup_pvclock_page(v);
1906         if (v == kvm_get_vcpu(v->kvm, 0))
1907                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
1908         return 0;
1909 }
1910
1911 /*
1912  * kvmclock updates which are isolated to a given vcpu, such as
1913  * vcpu->cpu migration, should not allow system_timestamp from
1914  * the rest of the vcpus to remain static. Otherwise ntp frequency
1915  * correction applies to one vcpu's system_timestamp but not
1916  * the others.
1917  *
1918  * So in those cases, request a kvmclock update for all vcpus.
1919  * We need to rate-limit these requests though, as they can
1920  * considerably slow guests that have a large number of vcpus.
1921  * The time for a remote vcpu to update its kvmclock is bound
1922  * by the delay we use to rate-limit the updates.
1923  */
1924
1925 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1926
1927 static void kvmclock_update_fn(struct work_struct *work)
1928 {
1929         int i;
1930         struct delayed_work *dwork = to_delayed_work(work);
1931         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1932                                            kvmclock_update_work);
1933         struct kvm *kvm = container_of(ka, struct kvm, arch);
1934         struct kvm_vcpu *vcpu;
1935
1936         kvm_for_each_vcpu(i, vcpu, kvm) {
1937                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1938                 kvm_vcpu_kick(vcpu);
1939         }
1940 }
1941
1942 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
1943 {
1944         struct kvm *kvm = v->kvm;
1945
1946         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1947         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
1948                                         KVMCLOCK_UPDATE_DELAY);
1949 }
1950
1951 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1952
1953 static void kvmclock_sync_fn(struct work_struct *work)
1954 {
1955         struct delayed_work *dwork = to_delayed_work(work);
1956         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1957                                            kvmclock_sync_work);
1958         struct kvm *kvm = container_of(ka, struct kvm, arch);
1959
1960         if (!kvmclock_periodic_sync)
1961                 return;
1962
1963         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
1964         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
1965                                         KVMCLOCK_SYNC_PERIOD);
1966 }
1967
1968 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1969 {
1970         u64 mcg_cap = vcpu->arch.mcg_cap;
1971         unsigned bank_num = mcg_cap & 0xff;
1972
1973         switch (msr) {
1974         case MSR_IA32_MCG_STATUS:
1975                 vcpu->arch.mcg_status = data;
1976                 break;
1977         case MSR_IA32_MCG_CTL:
1978                 if (!(mcg_cap & MCG_CTL_P))
1979                         return 1;
1980                 if (data != 0 && data != ~(u64)0)
1981                         return -1;
1982                 vcpu->arch.mcg_ctl = data;
1983                 break;
1984         default:
1985                 if (msr >= MSR_IA32_MC0_CTL &&
1986                     msr < MSR_IA32_MCx_CTL(bank_num)) {
1987                         u32 offset = msr - MSR_IA32_MC0_CTL;
1988                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1989                          * some Linux kernels though clear bit 10 in bank 4 to
1990                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1991                          * this to avoid an uncatched #GP in the guest
1992                          */
1993                         if ((offset & 0x3) == 0 &&
1994                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1995                                 return -1;
1996                         vcpu->arch.mce_banks[offset] = data;
1997                         break;
1998                 }
1999                 return 1;
2000         }
2001         return 0;
2002 }
2003
2004 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
2005 {
2006         struct kvm *kvm = vcpu->kvm;
2007         int lm = is_long_mode(vcpu);
2008         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
2009                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
2010         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
2011                 : kvm->arch.xen_hvm_config.blob_size_32;
2012         u32 page_num = data & ~PAGE_MASK;
2013         u64 page_addr = data & PAGE_MASK;
2014         u8 *page;
2015         int r;
2016
2017         r = -E2BIG;
2018         if (page_num >= blob_size)
2019                 goto out;
2020         r = -ENOMEM;
2021         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
2022         if (IS_ERR(page)) {
2023                 r = PTR_ERR(page);
2024                 goto out;
2025         }
2026         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
2027                 goto out_free;
2028         r = 0;
2029 out_free:
2030         kfree(page);
2031 out:
2032         return r;
2033 }
2034
2035 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2036 {
2037         gpa_t gpa = data & ~0x3f;
2038
2039         /* Bits 2:5 are reserved, Should be zero */
2040         if (data & 0x3c)
2041                 return 1;
2042
2043         vcpu->arch.apf.msr_val = data;
2044
2045         if (!(data & KVM_ASYNC_PF_ENABLED)) {
2046                 kvm_clear_async_pf_completion_queue(vcpu);
2047                 kvm_async_pf_hash_reset(vcpu);
2048                 return 0;
2049         }
2050
2051         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2052                                         sizeof(u32)))
2053                 return 1;
2054
2055         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2056         kvm_async_pf_wakeup_all(vcpu);
2057         return 0;
2058 }
2059
2060 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2061 {
2062         vcpu->arch.pv_time_enabled = false;
2063 }
2064
2065 static void record_steal_time(struct kvm_vcpu *vcpu)
2066 {
2067         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2068                 return;
2069
2070         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2071                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2072                 return;
2073
2074         if (vcpu->arch.st.steal.version & 1)
2075                 vcpu->arch.st.steal.version += 1;  /* first time write, random junk */
2076
2077         vcpu->arch.st.steal.version += 1;
2078
2079         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2080                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2081
2082         smp_wmb();
2083
2084         vcpu->arch.st.steal.steal += current->sched_info.run_delay -
2085                 vcpu->arch.st.last_steal;
2086         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2087
2088         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2089                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2090
2091         smp_wmb();
2092
2093         vcpu->arch.st.steal.version += 1;
2094
2095         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2096                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2097 }
2098
2099 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2100 {
2101         bool pr = false;
2102         u32 msr = msr_info->index;
2103         u64 data = msr_info->data;
2104
2105         switch (msr) {
2106         case MSR_AMD64_NB_CFG:
2107         case MSR_IA32_UCODE_REV:
2108         case MSR_IA32_UCODE_WRITE:
2109         case MSR_VM_HSAVE_PA:
2110         case MSR_AMD64_PATCH_LOADER:
2111         case MSR_AMD64_BU_CFG2:
2112                 break;
2113
2114         case MSR_EFER:
2115                 return set_efer(vcpu, data);
2116         case MSR_K7_HWCR:
2117                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2118                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2119                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2120                 data &= ~(u64)0x40000;  /* ignore Mc status write enable */
2121                 if (data != 0) {
2122                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2123                                     data);
2124                         return 1;
2125                 }
2126                 break;
2127         case MSR_FAM10H_MMIO_CONF_BASE:
2128                 if (data != 0) {
2129                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2130                                     "0x%llx\n", data);
2131                         return 1;
2132                 }
2133                 break;
2134         case MSR_IA32_DEBUGCTLMSR:
2135                 if (!data) {
2136                         /* We support the non-activated case already */
2137                         break;
2138                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2139                         /* Values other than LBR and BTF are vendor-specific,
2140                            thus reserved and should throw a #GP */
2141                         return 1;
2142                 }
2143                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2144                             __func__, data);
2145                 break;
2146         case 0x200 ... 0x2ff:
2147                 return kvm_mtrr_set_msr(vcpu, msr, data);
2148         case MSR_IA32_APICBASE:
2149                 return kvm_set_apic_base(vcpu, msr_info);
2150         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2151                 return kvm_x2apic_msr_write(vcpu, msr, data);
2152         case MSR_IA32_TSCDEADLINE:
2153                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2154                 break;
2155         case MSR_IA32_TSC_ADJUST:
2156                 if (guest_cpuid_has_tsc_adjust(vcpu)) {
2157                         if (!msr_info->host_initiated) {
2158                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2159                                 adjust_tsc_offset_guest(vcpu, adj);
2160                         }
2161                         vcpu->arch.ia32_tsc_adjust_msr = data;
2162                 }
2163                 break;
2164         case MSR_IA32_MISC_ENABLE:
2165                 vcpu->arch.ia32_misc_enable_msr = data;
2166                 break;
2167         case MSR_IA32_SMBASE:
2168                 if (!msr_info->host_initiated)
2169                         return 1;
2170                 vcpu->arch.smbase = data;
2171                 break;
2172         case MSR_KVM_WALL_CLOCK_NEW:
2173         case MSR_KVM_WALL_CLOCK:
2174                 vcpu->kvm->arch.wall_clock = data;
2175                 kvm_write_wall_clock(vcpu->kvm, data);
2176                 break;
2177         case MSR_KVM_SYSTEM_TIME_NEW:
2178         case MSR_KVM_SYSTEM_TIME: {
2179                 u64 gpa_offset;
2180                 struct kvm_arch *ka = &vcpu->kvm->arch;
2181
2182                 kvmclock_reset(vcpu);
2183
2184                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2185                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2186
2187                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2188                                 set_bit(KVM_REQ_MASTERCLOCK_UPDATE,
2189                                         &vcpu->requests);
2190
2191                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2192                 }
2193
2194                 vcpu->arch.time = data;
2195                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2196
2197                 /* we verify if the enable bit is set... */
2198                 if (!(data & 1))
2199                         break;
2200
2201                 gpa_offset = data & ~(PAGE_MASK | 1);
2202
2203                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2204                      &vcpu->arch.pv_time, data & ~1ULL,
2205                      sizeof(struct pvclock_vcpu_time_info)))
2206                         vcpu->arch.pv_time_enabled = false;
2207                 else
2208                         vcpu->arch.pv_time_enabled = true;
2209
2210                 break;
2211         }
2212         case MSR_KVM_ASYNC_PF_EN:
2213                 if (kvm_pv_enable_async_pf(vcpu, data))
2214                         return 1;
2215                 break;
2216         case MSR_KVM_STEAL_TIME:
2217
2218                 if (unlikely(!sched_info_on()))
2219                         return 1;
2220
2221                 if (data & KVM_STEAL_RESERVED_MASK)
2222                         return 1;
2223
2224                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2225                                                 data & KVM_STEAL_VALID_BITS,
2226                                                 sizeof(struct kvm_steal_time)))
2227                         return 1;
2228
2229                 vcpu->arch.st.msr_val = data;
2230
2231                 if (!(data & KVM_MSR_ENABLED))
2232                         break;
2233
2234                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2235
2236                 break;
2237         case MSR_KVM_PV_EOI_EN:
2238                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2239                         return 1;
2240                 break;
2241
2242         case MSR_IA32_MCG_CTL:
2243         case MSR_IA32_MCG_STATUS:
2244         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2245                 return set_msr_mce(vcpu, msr, data);
2246
2247         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2248         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2249                 pr = true; /* fall through */
2250         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2251         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2252                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2253                         return kvm_pmu_set_msr(vcpu, msr_info);
2254
2255                 if (pr || data != 0)
2256                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2257                                     "0x%x data 0x%llx\n", msr, data);
2258                 break;
2259         case MSR_K7_CLK_CTL:
2260                 /*
2261                  * Ignore all writes to this no longer documented MSR.
2262                  * Writes are only relevant for old K7 processors,
2263                  * all pre-dating SVM, but a recommended workaround from
2264                  * AMD for these chips. It is possible to specify the
2265                  * affected processor models on the command line, hence
2266                  * the need to ignore the workaround.
2267                  */
2268                 break;
2269         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2270         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2271         case HV_X64_MSR_CRASH_CTL:
2272         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2273                 return kvm_hv_set_msr_common(vcpu, msr, data,
2274                                              msr_info->host_initiated);
2275         case MSR_IA32_BBL_CR_CTL3:
2276                 /* Drop writes to this legacy MSR -- see rdmsr
2277                  * counterpart for further detail.
2278                  */
2279                 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n", msr, data);
2280                 break;
2281         case MSR_AMD64_OSVW_ID_LENGTH:
2282                 if (!guest_cpuid_has_osvw(vcpu))
2283                         return 1;
2284                 vcpu->arch.osvw.length = data;
2285                 break;
2286         case MSR_AMD64_OSVW_STATUS:
2287                 if (!guest_cpuid_has_osvw(vcpu))
2288                         return 1;
2289                 vcpu->arch.osvw.status = data;
2290                 break;
2291         default:
2292                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2293                         return xen_hvm_config(vcpu, data);
2294                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2295                         return kvm_pmu_set_msr(vcpu, msr_info);
2296                 if (!ignore_msrs) {
2297                         vcpu_unimpl(vcpu, "unhandled wrmsr: 0x%x data 0x%llx\n",
2298                                     msr, data);
2299                         return 1;
2300                 } else {
2301                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
2302                                     msr, data);
2303                         break;
2304                 }
2305         }
2306         return 0;
2307 }
2308 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2309
2310
2311 /*
2312  * Reads an msr value (of 'msr_index') into 'pdata'.
2313  * Returns 0 on success, non-0 otherwise.
2314  * Assumes vcpu_load() was already called.
2315  */
2316 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2317 {
2318         return kvm_x86_ops->get_msr(vcpu, msr);
2319 }
2320 EXPORT_SYMBOL_GPL(kvm_get_msr);
2321
2322 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2323 {
2324         u64 data;
2325         u64 mcg_cap = vcpu->arch.mcg_cap;
2326         unsigned bank_num = mcg_cap & 0xff;
2327
2328         switch (msr) {
2329         case MSR_IA32_P5_MC_ADDR:
2330         case MSR_IA32_P5_MC_TYPE:
2331                 data = 0;
2332                 break;
2333         case MSR_IA32_MCG_CAP:
2334                 data = vcpu->arch.mcg_cap;
2335                 break;
2336         case MSR_IA32_MCG_CTL:
2337                 if (!(mcg_cap & MCG_CTL_P))
2338                         return 1;
2339                 data = vcpu->arch.mcg_ctl;
2340                 break;
2341         case MSR_IA32_MCG_STATUS:
2342                 data = vcpu->arch.mcg_status;
2343                 break;
2344         default:
2345                 if (msr >= MSR_IA32_MC0_CTL &&
2346                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2347                         u32 offset = msr - MSR_IA32_MC0_CTL;
2348                         data = vcpu->arch.mce_banks[offset];
2349                         break;
2350                 }
2351                 return 1;
2352         }
2353         *pdata = data;
2354         return 0;
2355 }
2356
2357 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2358 {
2359         switch (msr_info->index) {
2360         case MSR_IA32_PLATFORM_ID:
2361         case MSR_IA32_EBL_CR_POWERON:
2362         case MSR_IA32_DEBUGCTLMSR:
2363         case MSR_IA32_LASTBRANCHFROMIP:
2364         case MSR_IA32_LASTBRANCHTOIP:
2365         case MSR_IA32_LASTINTFROMIP:
2366         case MSR_IA32_LASTINTTOIP:
2367         case MSR_K8_SYSCFG:
2368         case MSR_K8_TSEG_ADDR:
2369         case MSR_K8_TSEG_MASK:
2370         case MSR_K7_HWCR:
2371         case MSR_VM_HSAVE_PA:
2372         case MSR_K8_INT_PENDING_MSG:
2373         case MSR_AMD64_NB_CFG:
2374         case MSR_FAM10H_MMIO_CONF_BASE:
2375         case MSR_AMD64_BU_CFG2:
2376         case MSR_IA32_PERF_CTL:
2377                 msr_info->data = 0;
2378                 break;
2379         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2380         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2381         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2382         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2383                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2384                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2385                 msr_info->data = 0;
2386                 break;
2387         case MSR_IA32_UCODE_REV:
2388                 msr_info->data = 0x100000000ULL;
2389                 break;
2390         case MSR_MTRRcap:
2391         case 0x200 ... 0x2ff:
2392                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2393         case 0xcd: /* fsb frequency */
2394                 msr_info->data = 3;
2395                 break;
2396                 /*
2397                  * MSR_EBC_FREQUENCY_ID
2398                  * Conservative value valid for even the basic CPU models.
2399                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2400                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2401                  * and 266MHz for model 3, or 4. Set Core Clock
2402                  * Frequency to System Bus Frequency Ratio to 1 (bits
2403                  * 31:24) even though these are only valid for CPU
2404                  * models > 2, however guests may end up dividing or
2405                  * multiplying by zero otherwise.
2406                  */
2407         case MSR_EBC_FREQUENCY_ID:
2408                 msr_info->data = 1 << 24;
2409                 break;
2410         case MSR_IA32_APICBASE:
2411                 msr_info->data = kvm_get_apic_base(vcpu);
2412                 break;
2413         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2414                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2415                 break;
2416         case MSR_IA32_TSCDEADLINE:
2417                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2418                 break;
2419         case MSR_IA32_TSC_ADJUST:
2420                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2421                 break;
2422         case MSR_IA32_MISC_ENABLE:
2423                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2424                 break;
2425         case MSR_IA32_SMBASE:
2426                 if (!msr_info->host_initiated)
2427                         return 1;
2428                 msr_info->data = vcpu->arch.smbase;
2429                 break;
2430         case MSR_IA32_PERF_STATUS:
2431                 /* TSC increment by tick */
2432                 msr_info->data = 1000ULL;
2433                 /* CPU multiplier */
2434                 msr_info->data |= (((uint64_t)4ULL) << 40);
2435                 break;
2436         case MSR_EFER:
2437                 msr_info->data = vcpu->arch.efer;
2438                 break;
2439         case MSR_KVM_WALL_CLOCK:
2440         case MSR_KVM_WALL_CLOCK_NEW:
2441                 msr_info->data = vcpu->kvm->arch.wall_clock;
2442                 break;
2443         case MSR_KVM_SYSTEM_TIME:
2444         case MSR_KVM_SYSTEM_TIME_NEW:
2445                 msr_info->data = vcpu->arch.time;
2446                 break;
2447         case MSR_KVM_ASYNC_PF_EN:
2448                 msr_info->data = vcpu->arch.apf.msr_val;
2449                 break;
2450         case MSR_KVM_STEAL_TIME:
2451                 msr_info->data = vcpu->arch.st.msr_val;
2452                 break;
2453         case MSR_KVM_PV_EOI_EN:
2454                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2455                 break;
2456         case MSR_IA32_P5_MC_ADDR:
2457         case MSR_IA32_P5_MC_TYPE:
2458         case MSR_IA32_MCG_CAP:
2459         case MSR_IA32_MCG_CTL:
2460         case MSR_IA32_MCG_STATUS:
2461         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2462                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data);
2463         case MSR_K7_CLK_CTL:
2464                 /*
2465                  * Provide expected ramp-up count for K7. All other
2466                  * are set to zero, indicating minimum divisors for
2467                  * every field.
2468                  *
2469                  * This prevents guest kernels on AMD host with CPU
2470                  * type 6, model 8 and higher from exploding due to
2471                  * the rdmsr failing.
2472                  */
2473                 msr_info->data = 0x20000000;
2474                 break;
2475         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2476         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2477         case HV_X64_MSR_CRASH_CTL:
2478         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2479                 return kvm_hv_get_msr_common(vcpu,
2480                                              msr_info->index, &msr_info->data);
2481                 break;
2482         case MSR_IA32_BBL_CR_CTL3:
2483                 /* This legacy MSR exists but isn't fully documented in current
2484                  * silicon.  It is however accessed by winxp in very narrow
2485                  * scenarios where it sets bit #19, itself documented as
2486                  * a "reserved" bit.  Best effort attempt to source coherent
2487                  * read data here should the balance of the register be
2488                  * interpreted by the guest:
2489                  *
2490                  * L2 cache control register 3: 64GB range, 256KB size,
2491                  * enabled, latency 0x1, configured
2492                  */
2493                 msr_info->data = 0xbe702111;
2494                 break;
2495         case MSR_AMD64_OSVW_ID_LENGTH:
2496                 if (!guest_cpuid_has_osvw(vcpu))
2497                         return 1;
2498                 msr_info->data = vcpu->arch.osvw.length;
2499                 break;
2500         case MSR_AMD64_OSVW_STATUS:
2501                 if (!guest_cpuid_has_osvw(vcpu))
2502                         return 1;
2503                 msr_info->data = vcpu->arch.osvw.status;
2504                 break;
2505         default:
2506                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2507                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2508                 if (!ignore_msrs) {
2509                         vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr_info->index);
2510                         return 1;
2511                 } else {
2512                         vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr_info->index);
2513                         msr_info->data = 0;
2514                 }
2515                 break;
2516         }
2517         return 0;
2518 }
2519 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2520
2521 /*
2522  * Read or write a bunch of msrs. All parameters are kernel addresses.
2523  *
2524  * @return number of msrs set successfully.
2525  */
2526 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2527                     struct kvm_msr_entry *entries,
2528                     int (*do_msr)(struct kvm_vcpu *vcpu,
2529                                   unsigned index, u64 *data))
2530 {
2531         int i, idx;
2532
2533         idx = srcu_read_lock(&vcpu->kvm->srcu);
2534         for (i = 0; i < msrs->nmsrs; ++i)
2535                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2536                         break;
2537         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2538
2539         return i;
2540 }
2541
2542 /*
2543  * Read or write a bunch of msrs. Parameters are user addresses.
2544  *
2545  * @return number of msrs set successfully.
2546  */
2547 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2548                   int (*do_msr)(struct kvm_vcpu *vcpu,
2549                                 unsigned index, u64 *data),
2550                   int writeback)
2551 {
2552         struct kvm_msrs msrs;
2553         struct kvm_msr_entry *entries;
2554         int r, n;
2555         unsigned size;
2556
2557         r = -EFAULT;
2558         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2559                 goto out;
2560
2561         r = -E2BIG;
2562         if (msrs.nmsrs >= MAX_IO_MSRS)
2563                 goto out;
2564
2565         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2566         entries = memdup_user(user_msrs->entries, size);
2567         if (IS_ERR(entries)) {
2568                 r = PTR_ERR(entries);
2569                 goto out;
2570         }
2571
2572         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2573         if (r < 0)
2574                 goto out_free;
2575
2576         r = -EFAULT;
2577         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2578                 goto out_free;
2579
2580         r = n;
2581
2582 out_free:
2583         kfree(entries);
2584 out:
2585         return r;
2586 }
2587
2588 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2589 {
2590         int r;
2591
2592         switch (ext) {
2593         case KVM_CAP_IRQCHIP:
2594         case KVM_CAP_HLT:
2595         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2596         case KVM_CAP_SET_TSS_ADDR:
2597         case KVM_CAP_EXT_CPUID:
2598         case KVM_CAP_EXT_EMUL_CPUID:
2599         case KVM_CAP_CLOCKSOURCE:
2600         case KVM_CAP_PIT:
2601         case KVM_CAP_NOP_IO_DELAY:
2602         case KVM_CAP_MP_STATE:
2603         case KVM_CAP_SYNC_MMU:
2604         case KVM_CAP_USER_NMI:
2605         case KVM_CAP_REINJECT_CONTROL:
2606         case KVM_CAP_IRQ_INJECT_STATUS:
2607         case KVM_CAP_IOEVENTFD:
2608         case KVM_CAP_IOEVENTFD_NO_LENGTH:
2609         case KVM_CAP_PIT2:
2610         case KVM_CAP_PIT_STATE2:
2611         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2612         case KVM_CAP_XEN_HVM:
2613         case KVM_CAP_VCPU_EVENTS:
2614         case KVM_CAP_HYPERV:
2615         case KVM_CAP_HYPERV_VAPIC:
2616         case KVM_CAP_HYPERV_SPIN:
2617         case KVM_CAP_HYPERV_SYNIC:
2618         case KVM_CAP_PCI_SEGMENT:
2619         case KVM_CAP_DEBUGREGS:
2620         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2621         case KVM_CAP_XSAVE:
2622         case KVM_CAP_ASYNC_PF:
2623         case KVM_CAP_GET_TSC_KHZ:
2624         case KVM_CAP_KVMCLOCK_CTRL:
2625         case KVM_CAP_READONLY_MEM:
2626         case KVM_CAP_HYPERV_TIME:
2627         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
2628         case KVM_CAP_TSC_DEADLINE_TIMER:
2629         case KVM_CAP_ENABLE_CAP_VM:
2630         case KVM_CAP_DISABLE_QUIRKS:
2631         case KVM_CAP_SET_BOOT_CPU_ID:
2632         case KVM_CAP_SPLIT_IRQCHIP:
2633 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2634         case KVM_CAP_ASSIGN_DEV_IRQ:
2635         case KVM_CAP_PCI_2_3:
2636 #endif
2637                 r = 1;
2638                 break;
2639         case KVM_CAP_ADJUST_CLOCK:
2640                 r = KVM_CLOCK_TSC_STABLE;
2641                 break;
2642         case KVM_CAP_X86_SMM:
2643                 /* SMBASE is usually relocated above 1M on modern chipsets,
2644                  * and SMM handlers might indeed rely on 4G segment limits,
2645                  * so do not report SMM to be available if real mode is
2646                  * emulated via vm86 mode.  Still, do not go to great lengths
2647                  * to avoid userspace's usage of the feature, because it is a
2648                  * fringe case that is not enabled except via specific settings
2649                  * of the module parameters.
2650                  */
2651                 r = kvm_x86_ops->cpu_has_high_real_mode_segbase();
2652                 break;
2653         case KVM_CAP_COALESCED_MMIO:
2654                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2655                 break;
2656         case KVM_CAP_VAPIC:
2657                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2658                 break;
2659         case KVM_CAP_NR_VCPUS:
2660                 r = KVM_SOFT_MAX_VCPUS;
2661                 break;
2662         case KVM_CAP_MAX_VCPUS:
2663                 r = KVM_MAX_VCPUS;
2664                 break;
2665         case KVM_CAP_NR_MEMSLOTS:
2666                 r = KVM_USER_MEM_SLOTS;
2667                 break;
2668         case KVM_CAP_PV_MMU:    /* obsolete */
2669                 r = 0;
2670                 break;
2671 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2672         case KVM_CAP_IOMMU:
2673                 r = iommu_present(&pci_bus_type);
2674                 break;
2675 #endif
2676         case KVM_CAP_MCE:
2677                 r = KVM_MAX_MCE_BANKS;
2678                 break;
2679         case KVM_CAP_XCRS:
2680                 r = boot_cpu_has(X86_FEATURE_XSAVE);
2681                 break;
2682         case KVM_CAP_TSC_CONTROL:
2683                 r = kvm_has_tsc_control;
2684                 break;
2685         case KVM_CAP_X2APIC_API:
2686                 r = KVM_X2APIC_API_VALID_FLAGS;
2687                 break;
2688         default:
2689                 r = 0;
2690                 break;
2691         }
2692         return r;
2693
2694 }
2695
2696 long kvm_arch_dev_ioctl(struct file *filp,
2697                         unsigned int ioctl, unsigned long arg)
2698 {
2699         void __user *argp = (void __user *)arg;
2700         long r;
2701
2702         switch (ioctl) {
2703         case KVM_GET_MSR_INDEX_LIST: {
2704                 struct kvm_msr_list __user *user_msr_list = argp;
2705                 struct kvm_msr_list msr_list;
2706                 unsigned n;
2707
2708                 r = -EFAULT;
2709                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2710                         goto out;
2711                 n = msr_list.nmsrs;
2712                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
2713                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2714                         goto out;
2715                 r = -E2BIG;
2716                 if (n < msr_list.nmsrs)
2717                         goto out;
2718                 r = -EFAULT;
2719                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2720                                  num_msrs_to_save * sizeof(u32)))
2721                         goto out;
2722                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2723                                  &emulated_msrs,
2724                                  num_emulated_msrs * sizeof(u32)))
2725                         goto out;
2726                 r = 0;
2727                 break;
2728         }
2729         case KVM_GET_SUPPORTED_CPUID:
2730         case KVM_GET_EMULATED_CPUID: {
2731                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2732                 struct kvm_cpuid2 cpuid;
2733
2734                 r = -EFAULT;
2735                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2736                         goto out;
2737
2738                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2739                                             ioctl);
2740                 if (r)
2741                         goto out;
2742
2743                 r = -EFAULT;
2744                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2745                         goto out;
2746                 r = 0;
2747                 break;
2748         }
2749         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2750                 r = -EFAULT;
2751                 if (copy_to_user(argp, &kvm_mce_cap_supported,
2752                                  sizeof(kvm_mce_cap_supported)))
2753                         goto out;
2754                 r = 0;
2755                 break;
2756         }
2757         default:
2758                 r = -EINVAL;
2759         }
2760 out:
2761         return r;
2762 }
2763
2764 static void wbinvd_ipi(void *garbage)
2765 {
2766         wbinvd();
2767 }
2768
2769 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2770 {
2771         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
2772 }
2773
2774 static inline void kvm_migrate_timers(struct kvm_vcpu *vcpu)
2775 {
2776         set_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests);
2777 }
2778
2779 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2780 {
2781         /* Address WBINVD may be executed by guest */
2782         if (need_emulate_wbinvd(vcpu)) {
2783                 if (kvm_x86_ops->has_wbinvd_exit())
2784                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2785                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2786                         smp_call_function_single(vcpu->cpu,
2787                                         wbinvd_ipi, NULL, 1);
2788         }
2789
2790         kvm_x86_ops->vcpu_load(vcpu, cpu);
2791
2792         /* Apply any externally detected TSC adjustments (due to suspend) */
2793         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2794                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2795                 vcpu->arch.tsc_offset_adjustment = 0;
2796                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2797         }
2798
2799         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2800                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2801                                 rdtsc() - vcpu->arch.last_host_tsc;
2802                 if (tsc_delta < 0)
2803                         mark_tsc_unstable("KVM discovered backwards TSC");
2804
2805                 if (check_tsc_unstable()) {
2806                         u64 offset = kvm_compute_tsc_offset(vcpu,
2807                                                 vcpu->arch.last_guest_tsc);
2808                         kvm_vcpu_write_tsc_offset(vcpu, offset);
2809                         vcpu->arch.tsc_catchup = 1;
2810                 }
2811                 if (kvm_lapic_hv_timer_in_use(vcpu) &&
2812                                 kvm_x86_ops->set_hv_timer(vcpu,
2813                                         kvm_get_lapic_tscdeadline_msr(vcpu)))
2814                         kvm_lapic_switch_to_sw_timer(vcpu);
2815                 /*
2816                  * On a host with synchronized TSC, there is no need to update
2817                  * kvmclock on vcpu->cpu migration
2818                  */
2819                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2820                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2821                 if (vcpu->cpu != cpu)
2822                         kvm_migrate_timers(vcpu);
2823                 vcpu->cpu = cpu;
2824         }
2825
2826         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2827 }
2828
2829 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2830 {
2831         kvm_x86_ops->vcpu_put(vcpu);
2832         kvm_put_guest_fpu(vcpu);
2833         vcpu->arch.last_host_tsc = rdtsc();
2834 }
2835
2836 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2837                                     struct kvm_lapic_state *s)
2838 {
2839         if (vcpu->arch.apicv_active)
2840                 kvm_x86_ops->sync_pir_to_irr(vcpu);
2841
2842         return kvm_apic_get_state(vcpu, s);
2843 }
2844
2845 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2846                                     struct kvm_lapic_state *s)
2847 {
2848         int r;
2849
2850         r = kvm_apic_set_state(vcpu, s);
2851         if (r)
2852                 return r;
2853         update_cr8_intercept(vcpu);
2854
2855         return 0;
2856 }
2857
2858 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
2859 {
2860         return (!lapic_in_kernel(vcpu) ||
2861                 kvm_apic_accept_pic_intr(vcpu));
2862 }
2863
2864 /*
2865  * if userspace requested an interrupt window, check that the
2866  * interrupt window is open.
2867  *
2868  * No need to exit to userspace if we already have an interrupt queued.
2869  */
2870 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
2871 {
2872         return kvm_arch_interrupt_allowed(vcpu) &&
2873                 !kvm_cpu_has_interrupt(vcpu) &&
2874                 !kvm_event_needs_reinjection(vcpu) &&
2875                 kvm_cpu_accept_dm_intr(vcpu);
2876 }
2877
2878 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2879                                     struct kvm_interrupt *irq)
2880 {
2881         if (irq->irq >= KVM_NR_INTERRUPTS)
2882                 return -EINVAL;
2883
2884         if (!irqchip_in_kernel(vcpu->kvm)) {
2885                 kvm_queue_interrupt(vcpu, irq->irq, false);
2886                 kvm_make_request(KVM_REQ_EVENT, vcpu);
2887                 return 0;
2888         }
2889
2890         /*
2891          * With in-kernel LAPIC, we only use this to inject EXTINT, so
2892          * fail for in-kernel 8259.
2893          */
2894         if (pic_in_kernel(vcpu->kvm))
2895                 return -ENXIO;
2896
2897         if (vcpu->arch.pending_external_vector != -1)
2898                 return -EEXIST;
2899
2900         vcpu->arch.pending_external_vector = irq->irq;
2901         kvm_make_request(KVM_REQ_EVENT, vcpu);
2902         return 0;
2903 }
2904
2905 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2906 {
2907         kvm_inject_nmi(vcpu);
2908
2909         return 0;
2910 }
2911
2912 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
2913 {
2914         kvm_make_request(KVM_REQ_SMI, vcpu);
2915
2916         return 0;
2917 }
2918
2919 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2920                                            struct kvm_tpr_access_ctl *tac)
2921 {
2922         if (tac->flags)
2923                 return -EINVAL;
2924         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2925         return 0;
2926 }
2927
2928 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2929                                         u64 mcg_cap)
2930 {
2931         int r;
2932         unsigned bank_num = mcg_cap & 0xff, bank;
2933
2934         r = -EINVAL;
2935         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2936                 goto out;
2937         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
2938                 goto out;
2939         r = 0;
2940         vcpu->arch.mcg_cap = mcg_cap;
2941         /* Init IA32_MCG_CTL to all 1s */
2942         if (mcg_cap & MCG_CTL_P)
2943                 vcpu->arch.mcg_ctl = ~(u64)0;
2944         /* Init IA32_MCi_CTL to all 1s */
2945         for (bank = 0; bank < bank_num; bank++)
2946                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2947
2948         if (kvm_x86_ops->setup_mce)
2949                 kvm_x86_ops->setup_mce(vcpu);
2950 out:
2951         return r;
2952 }
2953
2954 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2955                                       struct kvm_x86_mce *mce)
2956 {
2957         u64 mcg_cap = vcpu->arch.mcg_cap;
2958         unsigned bank_num = mcg_cap & 0xff;
2959         u64 *banks = vcpu->arch.mce_banks;
2960
2961         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2962                 return -EINVAL;
2963         /*
2964          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2965          * reporting is disabled
2966          */
2967         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2968             vcpu->arch.mcg_ctl != ~(u64)0)
2969                 return 0;
2970         banks += 4 * mce->bank;
2971         /*
2972          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2973          * reporting is disabled for the bank
2974          */
2975         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2976                 return 0;
2977         if (mce->status & MCI_STATUS_UC) {
2978                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2979                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2980                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2981                         return 0;
2982                 }
2983                 if (banks[1] & MCI_STATUS_VAL)
2984                         mce->status |= MCI_STATUS_OVER;
2985                 banks[2] = mce->addr;
2986                 banks[3] = mce->misc;
2987                 vcpu->arch.mcg_status = mce->mcg_status;
2988                 banks[1] = mce->status;
2989                 kvm_queue_exception(vcpu, MC_VECTOR);
2990         } else if (!(banks[1] & MCI_STATUS_VAL)
2991                    || !(banks[1] & MCI_STATUS_UC)) {
2992                 if (banks[1] & MCI_STATUS_VAL)
2993                         mce->status |= MCI_STATUS_OVER;
2994                 banks[2] = mce->addr;
2995                 banks[3] = mce->misc;
2996                 banks[1] = mce->status;
2997         } else
2998                 banks[1] |= MCI_STATUS_OVER;
2999         return 0;
3000 }
3001
3002 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
3003                                                struct kvm_vcpu_events *events)
3004 {
3005         process_nmi(vcpu);
3006         events->exception.injected =
3007                 vcpu->arch.exception.pending &&
3008                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
3009         events->exception.nr = vcpu->arch.exception.nr;
3010         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
3011         events->exception.pad = 0;
3012         events->exception.error_code = vcpu->arch.exception.error_code;
3013
3014         events->interrupt.injected =
3015                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
3016         events->interrupt.nr = vcpu->arch.interrupt.nr;
3017         events->interrupt.soft = 0;
3018         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
3019
3020         events->nmi.injected = vcpu->arch.nmi_injected;
3021         events->nmi.pending = vcpu->arch.nmi_pending != 0;
3022         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
3023         events->nmi.pad = 0;
3024
3025         events->sipi_vector = 0; /* never valid when reporting to user space */
3026
3027         events->smi.smm = is_smm(vcpu);
3028         events->smi.pending = vcpu->arch.smi_pending;
3029         events->smi.smm_inside_nmi =
3030                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
3031         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
3032
3033         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
3034                          | KVM_VCPUEVENT_VALID_SHADOW
3035                          | KVM_VCPUEVENT_VALID_SMM);
3036         memset(&events->reserved, 0, sizeof(events->reserved));
3037 }
3038
3039 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
3040                                               struct kvm_vcpu_events *events)
3041 {
3042         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3043                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3044                               | KVM_VCPUEVENT_VALID_SHADOW
3045                               | KVM_VCPUEVENT_VALID_SMM))
3046                 return -EINVAL;
3047
3048         if (events->exception.injected &&
3049             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
3050                 return -EINVAL;
3051
3052         process_nmi(vcpu);
3053         vcpu->arch.exception.pending = events->exception.injected;
3054         vcpu->arch.exception.nr = events->exception.nr;
3055         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
3056         vcpu->arch.exception.error_code = events->exception.error_code;
3057
3058         vcpu->arch.interrupt.pending = events->interrupt.injected;
3059         vcpu->arch.interrupt.nr = events->interrupt.nr;
3060         vcpu->arch.interrupt.soft = events->interrupt.soft;
3061         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
3062                 kvm_x86_ops->set_interrupt_shadow(vcpu,
3063                                                   events->interrupt.shadow);
3064
3065         vcpu->arch.nmi_injected = events->nmi.injected;
3066         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
3067                 vcpu->arch.nmi_pending = events->nmi.pending;
3068         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
3069
3070         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
3071             lapic_in_kernel(vcpu))
3072                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
3073
3074         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
3075                 if (events->smi.smm)
3076                         vcpu->arch.hflags |= HF_SMM_MASK;
3077                 else
3078                         vcpu->arch.hflags &= ~HF_SMM_MASK;
3079                 vcpu->arch.smi_pending = events->smi.pending;
3080                 if (events->smi.smm_inside_nmi)
3081                         vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
3082                 else
3083                         vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
3084                 if (lapic_in_kernel(vcpu)) {
3085                         if (events->smi.latched_init)
3086                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3087                         else
3088                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3089                 }
3090         }
3091
3092         kvm_make_request(KVM_REQ_EVENT, vcpu);
3093
3094         return 0;
3095 }
3096
3097 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3098                                              struct kvm_debugregs *dbgregs)
3099 {
3100         unsigned long val;
3101
3102         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3103         kvm_get_dr(vcpu, 6, &val);
3104         dbgregs->dr6 = val;
3105         dbgregs->dr7 = vcpu->arch.dr7;
3106         dbgregs->flags = 0;
3107         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3108 }
3109
3110 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3111                                             struct kvm_debugregs *dbgregs)
3112 {
3113         if (dbgregs->flags)
3114                 return -EINVAL;
3115
3116         if (dbgregs->dr6 & ~0xffffffffull)
3117                 return -EINVAL;
3118         if (dbgregs->dr7 & ~0xffffffffull)
3119                 return -EINVAL;
3120
3121         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3122         kvm_update_dr0123(vcpu);
3123         vcpu->arch.dr6 = dbgregs->dr6;
3124         kvm_update_dr6(vcpu);
3125         vcpu->arch.dr7 = dbgregs->dr7;
3126         kvm_update_dr7(vcpu);
3127
3128         return 0;
3129 }
3130
3131 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3132
3133 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3134 {
3135         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3136         u64 xstate_bv = xsave->header.xfeatures;
3137         u64 valid;
3138
3139         /*
3140          * Copy legacy XSAVE area, to avoid complications with CPUID
3141          * leaves 0 and 1 in the loop below.
3142          */
3143         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3144
3145         /* Set XSTATE_BV */
3146         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3147
3148         /*
3149          * Copy each region from the possibly compacted offset to the
3150          * non-compacted offset.
3151          */
3152         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3153         while (valid) {
3154                 u64 feature = valid & -valid;
3155                 int index = fls64(feature) - 1;
3156                 void *src = get_xsave_addr(xsave, feature);
3157
3158                 if (src) {
3159                         u32 size, offset, ecx, edx;
3160                         cpuid_count(XSTATE_CPUID, index,
3161                                     &size, &offset, &ecx, &edx);
3162                         memcpy(dest + offset, src, size);
3163                 }
3164
3165                 valid -= feature;
3166         }
3167 }
3168
3169 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3170 {
3171         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3172         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3173         u64 valid;
3174
3175         /*
3176          * Copy legacy XSAVE area, to avoid complications with CPUID
3177          * leaves 0 and 1 in the loop below.
3178          */
3179         memcpy(xsave, src, XSAVE_HDR_OFFSET);
3180
3181         /* Set XSTATE_BV and possibly XCOMP_BV.  */
3182         xsave->header.xfeatures = xstate_bv;
3183         if (boot_cpu_has(X86_FEATURE_XSAVES))
3184                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3185
3186         /*
3187          * Copy each region from the non-compacted offset to the
3188          * possibly compacted offset.
3189          */
3190         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3191         while (valid) {
3192                 u64 feature = valid & -valid;
3193                 int index = fls64(feature) - 1;
3194                 void *dest = get_xsave_addr(xsave, feature);
3195
3196                 if (dest) {
3197                         u32 size, offset, ecx, edx;
3198                         cpuid_count(XSTATE_CPUID, index,
3199                                     &size, &offset, &ecx, &edx);
3200                         memcpy(dest, src + offset, size);
3201                 }
3202
3203                 valid -= feature;
3204         }
3205 }
3206
3207 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3208                                          struct kvm_xsave *guest_xsave)
3209 {
3210         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3211                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3212                 fill_xsave((u8 *) guest_xsave->region, vcpu);
3213         } else {
3214                 memcpy(guest_xsave->region,
3215                         &vcpu->arch.guest_fpu.state.fxsave,
3216                         sizeof(struct fxregs_state));
3217                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3218                         XFEATURE_MASK_FPSSE;
3219         }
3220 }
3221
3222 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3223                                         struct kvm_xsave *guest_xsave)
3224 {
3225         u64 xstate_bv =
3226                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3227
3228         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3229                 /*
3230                  * Here we allow setting states that are not present in
3231                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3232                  * with old userspace.
3233                  */
3234                 if (xstate_bv & ~kvm_supported_xcr0())
3235                         return -EINVAL;
3236                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3237         } else {
3238                 if (xstate_bv & ~XFEATURE_MASK_FPSSE)
3239                         return -EINVAL;
3240                 memcpy(&vcpu->arch.guest_fpu.state.fxsave,
3241                         guest_xsave->region, sizeof(struct fxregs_state));
3242         }
3243         return 0;
3244 }
3245
3246 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3247                                         struct kvm_xcrs *guest_xcrs)
3248 {
3249         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
3250                 guest_xcrs->nr_xcrs = 0;
3251                 return;
3252         }
3253
3254         guest_xcrs->nr_xcrs = 1;
3255         guest_xcrs->flags = 0;
3256         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3257         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3258 }
3259
3260 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3261                                        struct kvm_xcrs *guest_xcrs)
3262 {
3263         int i, r = 0;
3264
3265         if (!boot_cpu_has(X86_FEATURE_XSAVE))
3266                 return -EINVAL;
3267
3268         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3269                 return -EINVAL;
3270
3271         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3272                 /* Only support XCR0 currently */
3273                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3274                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3275                                 guest_xcrs->xcrs[i].value);
3276                         break;
3277                 }
3278         if (r)
3279                 r = -EINVAL;
3280         return r;
3281 }
3282
3283 /*
3284  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3285  * stopped by the hypervisor.  This function will be called from the host only.
3286  * EINVAL is returned when the host attempts to set the flag for a guest that
3287  * does not support pv clocks.
3288  */
3289 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3290 {
3291         if (!vcpu->arch.pv_time_enabled)
3292                 return -EINVAL;
3293         vcpu->arch.pvclock_set_guest_stopped_request = true;
3294         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3295         return 0;
3296 }
3297
3298 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
3299                                      struct kvm_enable_cap *cap)
3300 {
3301         if (cap->flags)
3302                 return -EINVAL;
3303
3304         switch (cap->cap) {
3305         case KVM_CAP_HYPERV_SYNIC:
3306                 return kvm_hv_activate_synic(vcpu);
3307         default:
3308                 return -EINVAL;
3309         }
3310 }
3311
3312 long kvm_arch_vcpu_ioctl(struct file *filp,
3313                          unsigned int ioctl, unsigned long arg)
3314 {
3315         struct kvm_vcpu *vcpu = filp->private_data;
3316         void __user *argp = (void __user *)arg;
3317         int r;
3318         union {
3319                 struct kvm_lapic_state *lapic;
3320                 struct kvm_xsave *xsave;
3321                 struct kvm_xcrs *xcrs;
3322                 void *buffer;
3323         } u;
3324
3325         u.buffer = NULL;
3326         switch (ioctl) {
3327         case KVM_GET_LAPIC: {
3328                 r = -EINVAL;
3329                 if (!lapic_in_kernel(vcpu))
3330                         goto out;
3331                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3332
3333                 r = -ENOMEM;
3334                 if (!u.lapic)
3335                         goto out;
3336                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3337                 if (r)
3338                         goto out;
3339                 r = -EFAULT;
3340                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3341                         goto out;
3342                 r = 0;
3343                 break;
3344         }
3345         case KVM_SET_LAPIC: {
3346                 r = -EINVAL;
3347                 if (!lapic_in_kernel(vcpu))
3348                         goto out;
3349                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3350                 if (IS_ERR(u.lapic))
3351                         return PTR_ERR(u.lapic);
3352
3353                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3354                 break;
3355         }
3356         case KVM_INTERRUPT: {
3357                 struct kvm_interrupt irq;
3358
3359                 r = -EFAULT;
3360                 if (copy_from_user(&irq, argp, sizeof irq))
3361                         goto out;
3362                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3363                 break;
3364         }
3365         case KVM_NMI: {
3366                 r = kvm_vcpu_ioctl_nmi(vcpu);
3367                 break;
3368         }
3369         case KVM_SMI: {
3370                 r = kvm_vcpu_ioctl_smi(vcpu);
3371                 break;
3372         }
3373         case KVM_SET_CPUID: {
3374                 struct kvm_cpuid __user *cpuid_arg = argp;
3375                 struct kvm_cpuid cpuid;
3376
3377                 r = -EFAULT;
3378                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3379                         goto out;
3380                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3381                 break;
3382         }
3383         case KVM_SET_CPUID2: {
3384                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3385                 struct kvm_cpuid2 cpuid;
3386
3387                 r = -EFAULT;
3388                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3389                         goto out;
3390                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3391                                               cpuid_arg->entries);
3392                 break;
3393         }
3394         case KVM_GET_CPUID2: {
3395                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3396                 struct kvm_cpuid2 cpuid;
3397
3398                 r = -EFAULT;
3399                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3400                         goto out;
3401                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3402                                               cpuid_arg->entries);
3403                 if (r)
3404                         goto out;
3405                 r = -EFAULT;
3406                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3407                         goto out;
3408                 r = 0;
3409                 break;
3410         }
3411         case KVM_GET_MSRS:
3412                 r = msr_io(vcpu, argp, do_get_msr, 1);
3413                 break;
3414         case KVM_SET_MSRS:
3415                 r = msr_io(vcpu, argp, do_set_msr, 0);
3416                 break;
3417         case KVM_TPR_ACCESS_REPORTING: {
3418                 struct kvm_tpr_access_ctl tac;
3419
3420                 r = -EFAULT;
3421                 if (copy_from_user(&tac, argp, sizeof tac))
3422                         goto out;
3423                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3424                 if (r)
3425                         goto out;
3426                 r = -EFAULT;
3427                 if (copy_to_user(argp, &tac, sizeof tac))
3428                         goto out;
3429                 r = 0;
3430                 break;
3431         };
3432         case KVM_SET_VAPIC_ADDR: {
3433                 struct kvm_vapic_addr va;
3434                 int idx;
3435
3436                 r = -EINVAL;
3437                 if (!lapic_in_kernel(vcpu))
3438                         goto out;
3439                 r = -EFAULT;
3440                 if (copy_from_user(&va, argp, sizeof va))
3441                         goto out;
3442                 idx = srcu_read_lock(&vcpu->kvm->srcu);
3443                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3444                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3445                 break;
3446         }
3447         case KVM_X86_SETUP_MCE: {
3448                 u64 mcg_cap;
3449
3450                 r = -EFAULT;
3451                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3452                         goto out;
3453                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3454                 break;
3455         }
3456         case KVM_X86_SET_MCE: {
3457                 struct kvm_x86_mce mce;
3458
3459                 r = -EFAULT;
3460                 if (copy_from_user(&mce, argp, sizeof mce))
3461                         goto out;
3462                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3463                 break;
3464         }
3465         case KVM_GET_VCPU_EVENTS: {
3466                 struct kvm_vcpu_events events;
3467
3468                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3469
3470                 r = -EFAULT;
3471                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3472                         break;
3473                 r = 0;
3474                 break;
3475         }
3476         case KVM_SET_VCPU_EVENTS: {
3477                 struct kvm_vcpu_events events;
3478
3479                 r = -EFAULT;
3480                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3481                         break;
3482
3483                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3484                 break;
3485         }
3486         case KVM_GET_DEBUGREGS: {
3487                 struct kvm_debugregs dbgregs;
3488
3489                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3490
3491                 r = -EFAULT;
3492                 if (copy_to_user(argp, &dbgregs,
3493                                  sizeof(struct kvm_debugregs)))
3494                         break;
3495                 r = 0;
3496                 break;
3497         }
3498         case KVM_SET_DEBUGREGS: {
3499                 struct kvm_debugregs dbgregs;
3500
3501                 r = -EFAULT;
3502                 if (copy_from_user(&dbgregs, argp,
3503                                    sizeof(struct kvm_debugregs)))
3504                         break;
3505
3506                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3507                 break;
3508         }
3509         case KVM_GET_XSAVE: {
3510                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3511                 r = -ENOMEM;
3512                 if (!u.xsave)
3513                         break;
3514
3515                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3516
3517                 r = -EFAULT;
3518                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3519                         break;
3520                 r = 0;
3521                 break;
3522         }
3523         case KVM_SET_XSAVE: {
3524                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3525                 if (IS_ERR(u.xsave))
3526                         return PTR_ERR(u.xsave);
3527
3528                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3529                 break;
3530         }
3531         case KVM_GET_XCRS: {
3532                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3533                 r = -ENOMEM;
3534                 if (!u.xcrs)
3535                         break;
3536
3537                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3538
3539                 r = -EFAULT;
3540                 if (copy_to_user(argp, u.xcrs,
3541                                  sizeof(struct kvm_xcrs)))
3542                         break;
3543                 r = 0;
3544                 break;
3545         }
3546         case KVM_SET_XCRS: {
3547                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3548                 if (IS_ERR(u.xcrs))
3549                         return PTR_ERR(u.xcrs);
3550
3551                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3552                 break;
3553         }
3554         case KVM_SET_TSC_KHZ: {
3555                 u32 user_tsc_khz;
3556
3557                 r = -EINVAL;
3558                 user_tsc_khz = (u32)arg;
3559
3560                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3561                         goto out;
3562
3563                 if (user_tsc_khz == 0)
3564                         user_tsc_khz = tsc_khz;
3565
3566                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
3567                         r = 0;
3568
3569                 goto out;
3570         }
3571         case KVM_GET_TSC_KHZ: {
3572                 r = vcpu->arch.virtual_tsc_khz;
3573                 goto out;
3574         }
3575         case KVM_KVMCLOCK_CTRL: {
3576                 r = kvm_set_guest_paused(vcpu);
3577                 goto out;
3578         }
3579         case KVM_ENABLE_CAP: {
3580                 struct kvm_enable_cap cap;
3581
3582                 r = -EFAULT;
3583                 if (copy_from_user(&cap, argp, sizeof(cap)))
3584                         goto out;
3585                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
3586                 break;
3587         }
3588         default:
3589                 r = -EINVAL;
3590         }
3591 out:
3592         kfree(u.buffer);
3593         return r;
3594 }
3595
3596 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3597 {
3598         return VM_FAULT_SIGBUS;
3599 }
3600
3601 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3602 {
3603         int ret;
3604
3605         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3606                 return -EINVAL;
3607         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3608         return ret;
3609 }
3610
3611 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3612                                               u64 ident_addr)
3613 {
3614         kvm->arch.ept_identity_map_addr = ident_addr;
3615         return 0;
3616 }
3617
3618 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3619                                           u32 kvm_nr_mmu_pages)
3620 {
3621         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3622                 return -EINVAL;
3623
3624         mutex_lock(&kvm->slots_lock);
3625
3626         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3627         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3628
3629         mutex_unlock(&kvm->slots_lock);
3630         return 0;
3631 }
3632
3633 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3634 {
3635         return kvm->arch.n_max_mmu_pages;
3636 }
3637
3638 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3639 {
3640         int r;
3641
3642         r = 0;
3643         switch (chip->chip_id) {
3644         case KVM_IRQCHIP_PIC_MASTER:
3645                 memcpy(&chip->chip.pic,
3646                         &pic_irqchip(kvm)->pics[0],
3647                         sizeof(struct kvm_pic_state));
3648                 break;
3649         case KVM_IRQCHIP_PIC_SLAVE:
3650                 memcpy(&chip->chip.pic,
3651                         &pic_irqchip(kvm)->pics[1],
3652                         sizeof(struct kvm_pic_state));
3653                 break;
3654         case KVM_IRQCHIP_IOAPIC:
3655                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3656                 break;
3657         default:
3658                 r = -EINVAL;
3659                 break;
3660         }
3661         return r;
3662 }
3663
3664 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3665 {
3666         int r;
3667
3668         r = 0;
3669         switch (chip->chip_id) {
3670         case KVM_IRQCHIP_PIC_MASTER:
3671                 spin_lock(&pic_irqchip(kvm)->lock);
3672                 memcpy(&pic_irqchip(kvm)->pics[0],
3673                         &chip->chip.pic,
3674                         sizeof(struct kvm_pic_state));
3675                 spin_unlock(&pic_irqchip(kvm)->lock);
3676                 break;
3677         case KVM_IRQCHIP_PIC_SLAVE:
3678                 spin_lock(&pic_irqchip(kvm)->lock);
3679                 memcpy(&pic_irqchip(kvm)->pics[1],
3680                         &chip->chip.pic,
3681                         sizeof(struct kvm_pic_state));
3682                 spin_unlock(&pic_irqchip(kvm)->lock);
3683                 break;
3684         case KVM_IRQCHIP_IOAPIC:
3685                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3686                 break;
3687         default:
3688                 r = -EINVAL;
3689                 break;
3690         }
3691         kvm_pic_update_irq(pic_irqchip(kvm));
3692         return r;
3693 }
3694
3695 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3696 {
3697         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
3698
3699         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
3700
3701         mutex_lock(&kps->lock);
3702         memcpy(ps, &kps->channels, sizeof(*ps));
3703         mutex_unlock(&kps->lock);
3704         return 0;
3705 }
3706
3707 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3708 {
3709         int i;
3710         struct kvm_pit *pit = kvm->arch.vpit;
3711
3712         mutex_lock(&pit->pit_state.lock);
3713         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
3714         for (i = 0; i < 3; i++)
3715                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
3716         mutex_unlock(&pit->pit_state.lock);
3717         return 0;
3718 }
3719
3720 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3721 {
3722         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3723         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3724                 sizeof(ps->channels));
3725         ps->flags = kvm->arch.vpit->pit_state.flags;
3726         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3727         memset(&ps->reserved, 0, sizeof(ps->reserved));
3728         return 0;
3729 }
3730
3731 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3732 {
3733         int start = 0;
3734         int i;
3735         u32 prev_legacy, cur_legacy;
3736         struct kvm_pit *pit = kvm->arch.vpit;
3737
3738         mutex_lock(&pit->pit_state.lock);
3739         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3740         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3741         if (!prev_legacy && cur_legacy)
3742                 start = 1;
3743         memcpy(&pit->pit_state.channels, &ps->channels,
3744                sizeof(pit->pit_state.channels));
3745         pit->pit_state.flags = ps->flags;
3746         for (i = 0; i < 3; i++)
3747                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
3748                                    start && i == 0);
3749         mutex_unlock(&pit->pit_state.lock);
3750         return 0;
3751 }
3752
3753 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3754                                  struct kvm_reinject_control *control)
3755 {
3756         struct kvm_pit *pit = kvm->arch.vpit;
3757
3758         if (!pit)
3759                 return -ENXIO;
3760
3761         /* pit->pit_state.lock was overloaded to prevent userspace from getting
3762          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
3763          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
3764          */
3765         mutex_lock(&pit->pit_state.lock);
3766         kvm_pit_set_reinject(pit, control->pit_reinject);
3767         mutex_unlock(&pit->pit_state.lock);
3768
3769         return 0;
3770 }
3771
3772 /**
3773  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3774  * @kvm: kvm instance
3775  * @log: slot id and address to which we copy the log
3776  *
3777  * Steps 1-4 below provide general overview of dirty page logging. See
3778  * kvm_get_dirty_log_protect() function description for additional details.
3779  *
3780  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3781  * always flush the TLB (step 4) even if previous step failed  and the dirty
3782  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3783  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3784  * writes will be marked dirty for next log read.
3785  *
3786  *   1. Take a snapshot of the bit and clear it if needed.
3787  *   2. Write protect the corresponding page.
3788  *   3. Copy the snapshot to the userspace.
3789  *   4. Flush TLB's if needed.
3790  */
3791 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3792 {
3793         bool is_dirty = false;
3794         int r;
3795
3796         mutex_lock(&kvm->slots_lock);
3797
3798         /*
3799          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3800          */
3801         if (kvm_x86_ops->flush_log_dirty)
3802                 kvm_x86_ops->flush_log_dirty(kvm);
3803
3804         r = kvm_get_dirty_log_protect(kvm, log, &is_dirty);
3805
3806         /*
3807          * All the TLBs can be flushed out of mmu lock, see the comments in
3808          * kvm_mmu_slot_remove_write_access().
3809          */
3810         lockdep_assert_held(&kvm->slots_lock);
3811         if (is_dirty)
3812                 kvm_flush_remote_tlbs(kvm);
3813
3814         mutex_unlock(&kvm->slots_lock);
3815         return r;
3816 }
3817
3818 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3819                         bool line_status)
3820 {
3821         if (!irqchip_in_kernel(kvm))
3822                 return -ENXIO;
3823
3824         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3825                                         irq_event->irq, irq_event->level,
3826                                         line_status);
3827         return 0;
3828 }
3829
3830 static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
3831                                    struct kvm_enable_cap *cap)
3832 {
3833         int r;
3834
3835         if (cap->flags)
3836                 return -EINVAL;
3837
3838         switch (cap->cap) {
3839         case KVM_CAP_DISABLE_QUIRKS:
3840                 kvm->arch.disabled_quirks = cap->args[0];
3841                 r = 0;
3842                 break;
3843         case KVM_CAP_SPLIT_IRQCHIP: {
3844                 mutex_lock(&kvm->lock);
3845                 r = -EINVAL;
3846                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
3847                         goto split_irqchip_unlock;
3848                 r = -EEXIST;
3849                 if (irqchip_in_kernel(kvm))
3850                         goto split_irqchip_unlock;
3851                 if (kvm->created_vcpus)
3852                         goto split_irqchip_unlock;
3853                 r = kvm_setup_empty_irq_routing(kvm);
3854                 if (r)
3855                         goto split_irqchip_unlock;
3856                 /* Pairs with irqchip_in_kernel. */
3857                 smp_wmb();
3858                 kvm->arch.irqchip_split = true;
3859                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
3860                 r = 0;
3861 split_irqchip_unlock:
3862                 mutex_unlock(&kvm->lock);
3863                 break;
3864         }
3865         case KVM_CAP_X2APIC_API:
3866                 r = -EINVAL;
3867                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
3868                         break;
3869
3870                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
3871                         kvm->arch.x2apic_format = true;
3872                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
3873                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
3874
3875                 r = 0;
3876                 break;
3877         default:
3878                 r = -EINVAL;
3879                 break;
3880         }
3881         return r;
3882 }
3883
3884 long kvm_arch_vm_ioctl(struct file *filp,
3885                        unsigned int ioctl, unsigned long arg)
3886 {
3887         struct kvm *kvm = filp->private_data;
3888         void __user *argp = (void __user *)arg;
3889         int r = -ENOTTY;
3890         /*
3891          * This union makes it completely explicit to gcc-3.x
3892          * that these two variables' stack usage should be
3893          * combined, not added together.
3894          */
3895         union {
3896                 struct kvm_pit_state ps;
3897                 struct kvm_pit_state2 ps2;
3898                 struct kvm_pit_config pit_config;
3899         } u;
3900
3901         switch (ioctl) {
3902         case KVM_SET_TSS_ADDR:
3903                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3904                 break;
3905         case KVM_SET_IDENTITY_MAP_ADDR: {
3906                 u64 ident_addr;
3907
3908                 r = -EFAULT;
3909                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3910                         goto out;
3911                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3912                 break;
3913         }
3914         case KVM_SET_NR_MMU_PAGES:
3915                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3916                 break;
3917         case KVM_GET_NR_MMU_PAGES:
3918                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3919                 break;
3920         case KVM_CREATE_IRQCHIP: {
3921                 struct kvm_pic *vpic;
3922
3923                 mutex_lock(&kvm->lock);
3924                 r = -EEXIST;
3925                 if (kvm->arch.vpic)
3926                         goto create_irqchip_unlock;
3927                 r = -EINVAL;
3928                 if (kvm->created_vcpus)
3929                         goto create_irqchip_unlock;
3930                 r = -ENOMEM;
3931                 vpic = kvm_create_pic(kvm);
3932                 if (vpic) {
3933                         r = kvm_ioapic_init(kvm);
3934                         if (r) {
3935                                 mutex_lock(&kvm->slots_lock);
3936                                 kvm_destroy_pic(vpic);
3937                                 mutex_unlock(&kvm->slots_lock);
3938                                 goto create_irqchip_unlock;
3939                         }
3940                 } else
3941                         goto create_irqchip_unlock;
3942                 r = kvm_setup_default_irq_routing(kvm);
3943                 if (r) {
3944                         mutex_lock(&kvm->slots_lock);
3945                         mutex_lock(&kvm->irq_lock);
3946                         kvm_ioapic_destroy(kvm);
3947                         kvm_destroy_pic(vpic);
3948                         mutex_unlock(&kvm->irq_lock);
3949                         mutex_unlock(&kvm->slots_lock);
3950                         goto create_irqchip_unlock;
3951                 }
3952                 /* Write kvm->irq_routing before kvm->arch.vpic.  */
3953                 smp_wmb();
3954                 kvm->arch.vpic = vpic;
3955         create_irqchip_unlock:
3956                 mutex_unlock(&kvm->lock);
3957                 break;
3958         }
3959         case KVM_CREATE_PIT:
3960                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3961                 goto create_pit;
3962         case KVM_CREATE_PIT2:
3963                 r = -EFAULT;
3964                 if (copy_from_user(&u.pit_config, argp,
3965                                    sizeof(struct kvm_pit_config)))
3966                         goto out;
3967         create_pit:
3968                 mutex_lock(&kvm->lock);
3969                 r = -EEXIST;
3970                 if (kvm->arch.vpit)
3971                         goto create_pit_unlock;
3972                 r = -ENOMEM;
3973                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3974                 if (kvm->arch.vpit)
3975                         r = 0;
3976         create_pit_unlock:
3977                 mutex_unlock(&kvm->lock);
3978                 break;
3979         case KVM_GET_IRQCHIP: {
3980                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3981                 struct kvm_irqchip *chip;
3982
3983                 chip = memdup_user(argp, sizeof(*chip));
3984                 if (IS_ERR(chip)) {
3985                         r = PTR_ERR(chip);
3986                         goto out;
3987                 }
3988
3989                 r = -ENXIO;
3990                 if (!irqchip_in_kernel(kvm) || irqchip_split(kvm))
3991                         goto get_irqchip_out;
3992                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3993                 if (r)
3994                         goto get_irqchip_out;
3995                 r = -EFAULT;
3996                 if (copy_to_user(argp, chip, sizeof *chip))
3997                         goto get_irqchip_out;
3998                 r = 0;
3999         get_irqchip_out:
4000                 kfree(chip);
4001                 break;
4002         }
4003         case KVM_SET_IRQCHIP: {
4004                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4005                 struct kvm_irqchip *chip;
4006
4007                 chip = memdup_user(argp, sizeof(*chip));
4008                 if (IS_ERR(chip)) {
4009                         r = PTR_ERR(chip);
4010                         goto out;
4011                 }
4012
4013                 r = -ENXIO;
4014                 if (!irqchip_in_kernel(kvm) || irqchip_split(kvm))
4015                         goto set_irqchip_out;
4016                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
4017                 if (r)
4018                         goto set_irqchip_out;
4019                 r = 0;
4020         set_irqchip_out:
4021                 kfree(chip);
4022                 break;
4023         }
4024         case KVM_GET_PIT: {
4025                 r = -EFAULT;
4026                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
4027                         goto out;
4028                 r = -ENXIO;
4029                 if (!kvm->arch.vpit)
4030                         goto out;
4031                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
4032                 if (r)
4033                         goto out;
4034                 r = -EFAULT;
4035                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
4036                         goto out;
4037                 r = 0;
4038                 break;
4039         }
4040         case KVM_SET_PIT: {
4041                 r = -EFAULT;
4042                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
4043                         goto out;
4044                 r = -ENXIO;
4045                 if (!kvm->arch.vpit)
4046                         goto out;
4047                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
4048                 break;
4049         }
4050         case KVM_GET_PIT2: {
4051                 r = -ENXIO;
4052                 if (!kvm->arch.vpit)
4053                         goto out;
4054                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
4055                 if (r)
4056                         goto out;
4057                 r = -EFAULT;
4058                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
4059                         goto out;
4060                 r = 0;
4061                 break;
4062         }
4063         case KVM_SET_PIT2: {
4064                 r = -EFAULT;
4065                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
4066                         goto out;
4067                 r = -ENXIO;
4068                 if (!kvm->arch.vpit)
4069                         goto out;
4070                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
4071                 break;
4072         }
4073         case KVM_REINJECT_CONTROL: {
4074                 struct kvm_reinject_control control;
4075                 r =  -EFAULT;
4076                 if (copy_from_user(&control, argp, sizeof(control)))
4077                         goto out;
4078                 r = kvm_vm_ioctl_reinject(kvm, &control);
4079                 break;
4080         }
4081         case KVM_SET_BOOT_CPU_ID:
4082                 r = 0;
4083                 mutex_lock(&kvm->lock);
4084                 if (kvm->created_vcpus)
4085                         r = -EBUSY;
4086                 else
4087                         kvm->arch.bsp_vcpu_id = arg;
4088                 mutex_unlock(&kvm->lock);
4089                 break;
4090         case KVM_XEN_HVM_CONFIG: {
4091                 r = -EFAULT;
4092                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
4093                                    sizeof(struct kvm_xen_hvm_config)))
4094                         goto out;
4095                 r = -EINVAL;
4096                 if (kvm->arch.xen_hvm_config.flags)
4097                         goto out;
4098                 r = 0;
4099                 break;
4100         }
4101         case KVM_SET_CLOCK: {
4102                 struct kvm_clock_data user_ns;
4103                 u64 now_ns;
4104
4105                 r = -EFAULT;
4106                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
4107                         goto out;
4108
4109                 r = -EINVAL;
4110                 if (user_ns.flags)
4111                         goto out;
4112
4113                 r = 0;
4114                 local_irq_disable();
4115                 now_ns = __get_kvmclock_ns(kvm);
4116                 kvm->arch.kvmclock_offset += user_ns.clock - now_ns;
4117                 local_irq_enable();
4118                 kvm_gen_update_masterclock(kvm);
4119                 break;
4120         }
4121         case KVM_GET_CLOCK: {
4122                 struct kvm_clock_data user_ns;
4123                 u64 now_ns;
4124
4125                 local_irq_disable();
4126                 now_ns = __get_kvmclock_ns(kvm);
4127                 user_ns.clock = now_ns;
4128                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
4129                 local_irq_enable();
4130                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
4131
4132                 r = -EFAULT;
4133                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
4134                         goto out;
4135                 r = 0;
4136                 break;
4137         }
4138         case KVM_ENABLE_CAP: {
4139                 struct kvm_enable_cap cap;
4140
4141                 r = -EFAULT;
4142                 if (copy_from_user(&cap, argp, sizeof(cap)))
4143                         goto out;
4144                 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
4145                 break;
4146         }
4147         default:
4148                 r = kvm_vm_ioctl_assigned_device(kvm, ioctl, arg);
4149         }
4150 out:
4151         return r;
4152 }
4153
4154 static void kvm_init_msr_list(void)
4155 {
4156         u32 dummy[2];
4157         unsigned i, j;
4158
4159         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
4160                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
4161                         continue;
4162
4163                 /*
4164                  * Even MSRs that are valid in the host may not be exposed
4165                  * to the guests in some cases.
4166                  */
4167                 switch (msrs_to_save[i]) {
4168                 case MSR_IA32_BNDCFGS:
4169                         if (!kvm_x86_ops->mpx_supported())
4170                                 continue;
4171                         break;
4172                 case MSR_TSC_AUX:
4173                         if (!kvm_x86_ops->rdtscp_supported())
4174                                 continue;
4175                         break;
4176                 default:
4177                         break;
4178                 }
4179
4180                 if (j < i)
4181                         msrs_to_save[j] = msrs_to_save[i];
4182                 j++;
4183         }
4184         num_msrs_to_save = j;
4185
4186         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
4187                 switch (emulated_msrs[i]) {
4188                 case MSR_IA32_SMBASE:
4189                         if (!kvm_x86_ops->cpu_has_high_real_mode_segbase())
4190                                 continue;
4191                         break;
4192                 default:
4193                         break;
4194                 }
4195
4196                 if (j < i)
4197                         emulated_msrs[j] = emulated_msrs[i];
4198                 j++;
4199         }
4200         num_emulated_msrs = j;
4201 }
4202
4203 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
4204                            const void *v)
4205 {
4206         int handled = 0;
4207         int n;
4208
4209         do {
4210                 n = min(len, 8);
4211                 if (!(lapic_in_kernel(vcpu) &&
4212                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
4213                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
4214                         break;
4215                 handled += n;
4216                 addr += n;
4217                 len -= n;
4218                 v += n;
4219         } while (len);
4220
4221         return handled;
4222 }
4223
4224 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
4225 {
4226         int handled = 0;
4227         int n;
4228
4229         do {
4230                 n = min(len, 8);
4231                 if (!(lapic_in_kernel(vcpu) &&
4232                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
4233                                          addr, n, v))
4234                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
4235                         break;
4236                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
4237                 handled += n;
4238                 addr += n;
4239                 len -= n;
4240                 v += n;
4241         } while (len);
4242
4243         return handled;
4244 }
4245
4246 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4247                         struct kvm_segment *var, int seg)
4248 {
4249         kvm_x86_ops->set_segment(vcpu, var, seg);
4250 }
4251
4252 void kvm_get_segment(struct kvm_vcpu *vcpu,
4253                      struct kvm_segment *var, int seg)
4254 {
4255         kvm_x86_ops->get_segment(vcpu, var, seg);
4256 }
4257
4258 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
4259                            struct x86_exception *exception)
4260 {
4261         gpa_t t_gpa;
4262
4263         BUG_ON(!mmu_is_nested(vcpu));
4264
4265         /* NPT walks are always user-walks */
4266         access |= PFERR_USER_MASK;
4267         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, exception);
4268
4269         return t_gpa;
4270 }
4271
4272 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
4273                               struct x86_exception *exception)
4274 {
4275         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4276         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4277 }
4278
4279  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
4280                                 struct x86_exception *exception)
4281 {
4282         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4283         access |= PFERR_FETCH_MASK;
4284         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4285 }
4286
4287 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
4288                                struct x86_exception *exception)
4289 {
4290         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4291         access |= PFERR_WRITE_MASK;
4292         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4293 }
4294
4295 /* uses this to access any guest's mapped memory without checking CPL */
4296 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
4297                                 struct x86_exception *exception)
4298 {
4299         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4300 }
4301
4302 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4303                                       struct kvm_vcpu *vcpu, u32 access,
4304                                       struct x86_exception *exception)
4305 {
4306         void *data = val;
4307         int r = X86EMUL_CONTINUE;
4308
4309         while (bytes) {
4310                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4311                                                             exception);
4312                 unsigned offset = addr & (PAGE_SIZE-1);
4313                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4314                 int ret;
4315
4316                 if (gpa == UNMAPPED_GVA)
4317                         return X86EMUL_PROPAGATE_FAULT;
4318                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
4319                                                offset, toread);
4320                 if (ret < 0) {
4321                         r = X86EMUL_IO_NEEDED;
4322                         goto out;
4323                 }
4324
4325                 bytes -= toread;
4326                 data += toread;
4327                 addr += toread;
4328         }
4329 out:
4330         return r;
4331 }
4332
4333 /* used for instruction fetching */
4334 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4335                                 gva_t addr, void *val, unsigned int bytes,
4336                                 struct x86_exception *exception)
4337 {
4338         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4339         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4340         unsigned offset;
4341         int ret;
4342
4343         /* Inline kvm_read_guest_virt_helper for speed.  */
4344         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
4345                                                     exception);
4346         if (unlikely(gpa == UNMAPPED_GVA))
4347                 return X86EMUL_PROPAGATE_FAULT;
4348
4349         offset = addr & (PAGE_SIZE-1);
4350         if (WARN_ON(offset + bytes > PAGE_SIZE))
4351                 bytes = (unsigned)PAGE_SIZE - offset;
4352         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
4353                                        offset, bytes);
4354         if (unlikely(ret < 0))
4355                 return X86EMUL_IO_NEEDED;
4356
4357         return X86EMUL_CONTINUE;
4358 }
4359
4360 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4361                                gva_t addr, void *val, unsigned int bytes,
4362                                struct x86_exception *exception)
4363 {
4364         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4365         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4366
4367         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4368                                           exception);
4369 }
4370 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4371
4372 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4373                                       gva_t addr, void *val, unsigned int bytes,
4374                                       struct x86_exception *exception)
4375 {
4376         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4377         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4378 }
4379
4380 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
4381                 unsigned long addr, void *val, unsigned int bytes)
4382 {
4383         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4384         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
4385
4386         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
4387 }
4388
4389 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4390                                        gva_t addr, void *val,
4391                                        unsigned int bytes,
4392                                        struct x86_exception *exception)
4393 {
4394         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4395         void *data = val;
4396         int r = X86EMUL_CONTINUE;
4397
4398         while (bytes) {
4399                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4400                                                              PFERR_WRITE_MASK,
4401                                                              exception);
4402                 unsigned offset = addr & (PAGE_SIZE-1);
4403                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4404                 int ret;
4405
4406                 if (gpa == UNMAPPED_GVA)
4407                         return X86EMUL_PROPAGATE_FAULT;
4408                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
4409                 if (ret < 0) {
4410                         r = X86EMUL_IO_NEEDED;
4411                         goto out;
4412                 }
4413
4414                 bytes -= towrite;
4415                 data += towrite;
4416                 addr += towrite;
4417         }
4418 out:
4419         return r;
4420 }
4421 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4422
4423 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4424                                 gpa_t *gpa, struct x86_exception *exception,
4425                                 bool write)
4426 {
4427         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4428                 | (write ? PFERR_WRITE_MASK : 0);
4429
4430         /*
4431          * currently PKRU is only applied to ept enabled guest so
4432          * there is no pkey in EPT page table for L1 guest or EPT
4433          * shadow page table for L2 guest.
4434          */
4435         if (vcpu_match_mmio_gva(vcpu, gva)
4436             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
4437                                  vcpu->arch.access, 0, access)) {
4438                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4439                                         (gva & (PAGE_SIZE - 1));
4440                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4441                 return 1;
4442         }
4443
4444         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4445
4446         if (*gpa == UNMAPPED_GVA)
4447                 return -1;
4448
4449         /* For APIC access vmexit */
4450         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4451                 return 1;
4452
4453         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4454                 trace_vcpu_match_mmio(gva, *gpa, write, true);
4455                 return 1;
4456         }
4457
4458         return 0;
4459 }
4460
4461 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4462                         const void *val, int bytes)
4463 {
4464         int ret;
4465
4466         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
4467         if (ret < 0)
4468                 return 0;
4469         kvm_page_track_write(vcpu, gpa, val, bytes);
4470         return 1;
4471 }
4472
4473 struct read_write_emulator_ops {
4474         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4475                                   int bytes);
4476         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4477                                   void *val, int bytes);
4478         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4479                                int bytes, void *val);
4480         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4481                                     void *val, int bytes);
4482         bool write;
4483 };
4484
4485 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4486 {
4487         if (vcpu->mmio_read_completed) {
4488                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4489                                vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4490                 vcpu->mmio_read_completed = 0;
4491                 return 1;
4492         }
4493
4494         return 0;
4495 }
4496
4497 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4498                         void *val, int bytes)
4499 {
4500         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
4501 }
4502
4503 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4504                          void *val, int bytes)
4505 {
4506         return emulator_write_phys(vcpu, gpa, val, bytes);
4507 }
4508
4509 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4510 {
4511         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4512         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4513 }
4514
4515 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4516                           void *val, int bytes)
4517 {
4518         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4519         return X86EMUL_IO_NEEDED;
4520 }
4521
4522 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4523                            void *val, int bytes)
4524 {
4525         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4526
4527         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4528         return X86EMUL_CONTINUE;
4529 }
4530
4531 static const struct read_write_emulator_ops read_emultor = {
4532         .read_write_prepare = read_prepare,
4533         .read_write_emulate = read_emulate,
4534         .read_write_mmio = vcpu_mmio_read,
4535         .read_write_exit_mmio = read_exit_mmio,
4536 };
4537
4538 static const struct read_write_emulator_ops write_emultor = {
4539         .read_write_emulate = write_emulate,
4540         .read_write_mmio = write_mmio,
4541         .read_write_exit_mmio = write_exit_mmio,
4542         .write = true,
4543 };
4544
4545 static int emulator_read_write_onepage(unsigned long addr, void *val,
4546                                        unsigned int bytes,
4547                                        struct x86_exception *exception,
4548                                        struct kvm_vcpu *vcpu,
4549                                        const struct read_write_emulator_ops *ops)
4550 {
4551         gpa_t gpa;
4552         int handled, ret;
4553         bool write = ops->write;
4554         struct kvm_mmio_fragment *frag;
4555
4556         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4557
4558         if (ret < 0)
4559                 return X86EMUL_PROPAGATE_FAULT;
4560
4561         /* For APIC access vmexit */
4562         if (ret)
4563                 goto mmio;
4564
4565         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4566                 return X86EMUL_CONTINUE;
4567
4568 mmio:
4569         /*
4570          * Is this MMIO handled locally?
4571          */
4572         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4573         if (handled == bytes)
4574                 return X86EMUL_CONTINUE;
4575
4576         gpa += handled;
4577         bytes -= handled;
4578         val += handled;
4579
4580         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4581         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4582         frag->gpa = gpa;
4583         frag->data = val;
4584         frag->len = bytes;
4585         return X86EMUL_CONTINUE;
4586 }
4587
4588 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
4589                         unsigned long addr,
4590                         void *val, unsigned int bytes,
4591                         struct x86_exception *exception,
4592                         const struct read_write_emulator_ops *ops)
4593 {
4594         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4595         gpa_t gpa;
4596         int rc;
4597
4598         if (ops->read_write_prepare &&
4599                   ops->read_write_prepare(vcpu, val, bytes))
4600                 return X86EMUL_CONTINUE;
4601
4602         vcpu->mmio_nr_fragments = 0;
4603
4604         /* Crossing a page boundary? */
4605         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4606                 int now;
4607
4608                 now = -addr & ~PAGE_MASK;
4609                 rc = emulator_read_write_onepage(addr, val, now, exception,
4610                                                  vcpu, ops);
4611
4612                 if (rc != X86EMUL_CONTINUE)
4613                         return rc;
4614                 addr += now;
4615                 if (ctxt->mode != X86EMUL_MODE_PROT64)
4616                         addr = (u32)addr;
4617                 val += now;
4618                 bytes -= now;
4619         }
4620
4621         rc = emulator_read_write_onepage(addr, val, bytes, exception,
4622                                          vcpu, ops);
4623         if (rc != X86EMUL_CONTINUE)
4624                 return rc;
4625
4626         if (!vcpu->mmio_nr_fragments)
4627                 return rc;
4628
4629         gpa = vcpu->mmio_fragments[0].gpa;
4630
4631         vcpu->mmio_needed = 1;
4632         vcpu->mmio_cur_fragment = 0;
4633
4634         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4635         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4636         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4637         vcpu->run->mmio.phys_addr = gpa;
4638
4639         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4640 }
4641
4642 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4643                                   unsigned long addr,
4644                                   void *val,
4645                                   unsigned int bytes,
4646                                   struct x86_exception *exception)
4647 {
4648         return emulator_read_write(ctxt, addr, val, bytes,
4649                                    exception, &read_emultor);
4650 }
4651
4652 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4653                             unsigned long addr,
4654                             const void *val,
4655                             unsigned int bytes,
4656                             struct x86_exception *exception)
4657 {
4658         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4659                                    exception, &write_emultor);
4660 }
4661
4662 #define CMPXCHG_TYPE(t, ptr, old, new) \
4663         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4664
4665 #ifdef CONFIG_X86_64
4666 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4667 #else
4668 #  define CMPXCHG64(ptr, old, new) \
4669         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4670 #endif
4671
4672 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4673                                      unsigned long addr,
4674                                      const void *old,
4675                                      const void *new,
4676                                      unsigned int bytes,
4677                                      struct x86_exception *exception)
4678 {
4679         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4680         gpa_t gpa;
4681         struct page *page;
4682         char *kaddr;
4683         bool exchanged;
4684
4685         /* guests cmpxchg8b have to be emulated atomically */
4686         if (bytes > 8 || (bytes & (bytes - 1)))
4687                 goto emul_write;
4688
4689         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4690
4691         if (gpa == UNMAPPED_GVA ||
4692             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4693                 goto emul_write;
4694
4695         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4696                 goto emul_write;
4697
4698         page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
4699         if (is_error_page(page))
4700                 goto emul_write;
4701
4702         kaddr = kmap_atomic(page);
4703         kaddr += offset_in_page(gpa);
4704         switch (bytes) {
4705         case 1:
4706                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4707                 break;
4708         case 2:
4709                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4710                 break;
4711         case 4:
4712                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4713                 break;
4714         case 8:
4715                 exchanged = CMPXCHG64(kaddr, old, new);
4716                 break;
4717         default:
4718                 BUG();
4719         }
4720         kunmap_atomic(kaddr);
4721         kvm_release_page_dirty(page);
4722
4723         if (!exchanged)
4724                 return X86EMUL_CMPXCHG_FAILED;
4725
4726         kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
4727         kvm_page_track_write(vcpu, gpa, new, bytes);
4728
4729         return X86EMUL_CONTINUE;
4730
4731 emul_write:
4732         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4733
4734         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4735 }
4736
4737 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4738 {
4739         /* TODO: String I/O for in kernel device */
4740         int r;
4741
4742         if (vcpu->arch.pio.in)
4743                 r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
4744                                     vcpu->arch.pio.size, pd);
4745         else
4746                 r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
4747                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4748                                      pd);
4749         return r;
4750 }
4751
4752 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4753                                unsigned short port, void *val,
4754                                unsigned int count, bool in)
4755 {
4756         vcpu->arch.pio.port = port;
4757         vcpu->arch.pio.in = in;
4758         vcpu->arch.pio.count  = count;
4759         vcpu->arch.pio.size = size;
4760
4761         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4762                 vcpu->arch.pio.count = 0;
4763                 return 1;
4764         }
4765
4766         vcpu->run->exit_reason = KVM_EXIT_IO;
4767         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4768         vcpu->run->io.size = size;
4769         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4770         vcpu->run->io.count = count;
4771         vcpu->run->io.port = port;
4772
4773         return 0;
4774 }
4775
4776 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4777                                     int size, unsigned short port, void *val,
4778                                     unsigned int count)
4779 {
4780         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4781         int ret;
4782
4783         if (vcpu->arch.pio.count)
4784                 goto data_avail;
4785
4786         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4787         if (ret) {
4788 data_avail:
4789                 memcpy(val, vcpu->arch.pio_data, size * count);
4790                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
4791                 vcpu->arch.pio.count = 0;
4792                 return 1;
4793         }
4794
4795         return 0;
4796 }
4797
4798 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4799                                      int size, unsigned short port,
4800                                      const void *val, unsigned int count)
4801 {
4802         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4803
4804         memcpy(vcpu->arch.pio_data, val, size * count);
4805         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
4806         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4807 }
4808
4809 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4810 {
4811         return kvm_x86_ops->get_segment_base(vcpu, seg);
4812 }
4813
4814 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4815 {
4816         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4817 }
4818
4819 int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
4820 {
4821         if (!need_emulate_wbinvd(vcpu))
4822                 return X86EMUL_CONTINUE;
4823
4824         if (kvm_x86_ops->has_wbinvd_exit()) {
4825                 int cpu = get_cpu();
4826
4827                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4828                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4829                                 wbinvd_ipi, NULL, 1);
4830                 put_cpu();
4831                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4832         } else
4833                 wbinvd();
4834         return X86EMUL_CONTINUE;
4835 }
4836
4837 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4838 {
4839         kvm_x86_ops->skip_emulated_instruction(vcpu);
4840         return kvm_emulate_wbinvd_noskip(vcpu);
4841 }
4842 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4843
4844
4845
4846 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4847 {
4848         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
4849 }
4850
4851 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
4852                            unsigned long *dest)
4853 {
4854         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4855 }
4856
4857 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
4858                            unsigned long value)
4859 {
4860
4861         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4862 }
4863
4864 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4865 {
4866         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4867 }
4868
4869 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4870 {
4871         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4872         unsigned long value;
4873
4874         switch (cr) {
4875         case 0:
4876                 value = kvm_read_cr0(vcpu);
4877                 break;
4878         case 2:
4879                 value = vcpu->arch.cr2;
4880                 break;
4881         case 3:
4882                 value = kvm_read_cr3(vcpu);
4883                 break;
4884         case 4:
4885                 value = kvm_read_cr4(vcpu);
4886                 break;
4887         case 8:
4888                 value = kvm_get_cr8(vcpu);
4889                 break;
4890         default:
4891                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4892                 return 0;
4893         }
4894
4895         return value;
4896 }
4897
4898 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4899 {
4900         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4901         int res = 0;
4902
4903         switch (cr) {
4904         case 0:
4905                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4906                 break;
4907         case 2:
4908                 vcpu->arch.cr2 = val;
4909                 break;
4910         case 3:
4911                 res = kvm_set_cr3(vcpu, val);
4912                 break;
4913         case 4:
4914                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4915                 break;
4916         case 8:
4917                 res = kvm_set_cr8(vcpu, val);
4918                 break;
4919         default:
4920                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4921                 res = -1;
4922         }
4923
4924         return res;
4925 }
4926
4927 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4928 {
4929         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4930 }
4931
4932 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4933 {
4934         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4935 }
4936
4937 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4938 {
4939         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4940 }
4941
4942 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4943 {
4944         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4945 }
4946
4947 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4948 {
4949         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4950 }
4951
4952 static unsigned long emulator_get_cached_segment_base(
4953         struct x86_emulate_ctxt *ctxt, int seg)
4954 {
4955         return get_segment_base(emul_to_vcpu(ctxt), seg);
4956 }
4957
4958 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4959                                  struct desc_struct *desc, u32 *base3,
4960                                  int seg)
4961 {
4962         struct kvm_segment var;
4963
4964         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4965         *selector = var.selector;
4966
4967         if (var.unusable) {
4968                 memset(desc, 0, sizeof(*desc));
4969                 return false;
4970         }
4971
4972         if (var.g)
4973                 var.limit >>= 12;
4974         set_desc_limit(desc, var.limit);
4975         set_desc_base(desc, (unsigned long)var.base);
4976 #ifdef CONFIG_X86_64
4977         if (base3)
4978                 *base3 = var.base >> 32;
4979 #endif
4980         desc->type = var.type;
4981         desc->s = var.s;
4982         desc->dpl = var.dpl;
4983         desc->p = var.present;
4984         desc->avl = var.avl;
4985         desc->l = var.l;
4986         desc->d = var.db;
4987         desc->g = var.g;
4988
4989         return true;
4990 }
4991
4992 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4993                                  struct desc_struct *desc, u32 base3,
4994                                  int seg)
4995 {
4996         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4997         struct kvm_segment var;
4998
4999         var.selector = selector;
5000         var.base = get_desc_base(desc);
5001 #ifdef CONFIG_X86_64
5002         var.base |= ((u64)base3) << 32;
5003 #endif
5004         var.limit = get_desc_limit(desc);
5005         if (desc->g)
5006                 var.limit = (var.limit << 12) | 0xfff;
5007         var.type = desc->type;
5008         var.dpl = desc->dpl;
5009         var.db = desc->d;
5010         var.s = desc->s;
5011         var.l = desc->l;
5012         var.g = desc->g;
5013         var.avl = desc->avl;
5014         var.present = desc->p;
5015         var.unusable = !var.present;
5016         var.padding = 0;
5017
5018         kvm_set_segment(vcpu, &var, seg);
5019         return;
5020 }
5021
5022 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
5023                             u32 msr_index, u64 *pdata)
5024 {
5025         struct msr_data msr;
5026         int r;
5027
5028         msr.index = msr_index;
5029         msr.host_initiated = false;
5030         r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
5031         if (r)
5032                 return r;
5033
5034         *pdata = msr.data;
5035         return 0;
5036 }
5037
5038 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
5039                             u32 msr_index, u64 data)
5040 {
5041         struct msr_data msr;
5042
5043         msr.data = data;
5044         msr.index = msr_index;
5045         msr.host_initiated = false;
5046         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
5047 }
5048
5049 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
5050 {
5051         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5052
5053         return vcpu->arch.smbase;
5054 }
5055
5056 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
5057 {
5058         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5059
5060         vcpu->arch.smbase = smbase;
5061 }
5062
5063 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
5064                               u32 pmc)
5065 {
5066         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
5067 }
5068
5069 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
5070                              u32 pmc, u64 *pdata)
5071 {
5072         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
5073 }
5074
5075 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
5076 {
5077         emul_to_vcpu(ctxt)->arch.halt_request = 1;
5078 }
5079
5080 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
5081 {
5082         preempt_disable();
5083         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
5084         /*
5085          * CR0.TS may reference the host fpu state, not the guest fpu state,
5086          * so it may be clear at this point.
5087          */
5088         clts();
5089 }
5090
5091 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
5092 {
5093         preempt_enable();
5094 }
5095
5096 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
5097                               struct x86_instruction_info *info,
5098                               enum x86_intercept_stage stage)
5099 {
5100         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
5101 }
5102
5103 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
5104                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
5105 {
5106         kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
5107 }
5108
5109 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
5110 {
5111         return kvm_register_read(emul_to_vcpu(ctxt), reg);
5112 }
5113
5114 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
5115 {
5116         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
5117 }
5118
5119 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
5120 {
5121         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
5122 }
5123
5124 static const struct x86_emulate_ops emulate_ops = {
5125         .read_gpr            = emulator_read_gpr,
5126         .write_gpr           = emulator_write_gpr,
5127         .read_std            = kvm_read_guest_virt_system,
5128         .write_std           = kvm_write_guest_virt_system,
5129         .read_phys           = kvm_read_guest_phys_system,
5130         .fetch               = kvm_fetch_guest_virt,
5131         .read_emulated       = emulator_read_emulated,
5132         .write_emulated      = emulator_write_emulated,
5133         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
5134         .invlpg              = emulator_invlpg,
5135         .pio_in_emulated     = emulator_pio_in_emulated,
5136         .pio_out_emulated    = emulator_pio_out_emulated,
5137         .get_segment         = emulator_get_segment,
5138         .set_segment         = emulator_set_segment,
5139         .get_cached_segment_base = emulator_get_cached_segment_base,
5140         .get_gdt             = emulator_get_gdt,
5141         .get_idt             = emulator_get_idt,
5142         .set_gdt             = emulator_set_gdt,
5143         .set_idt             = emulator_set_idt,
5144         .get_cr              = emulator_get_cr,
5145         .set_cr              = emulator_set_cr,
5146         .cpl                 = emulator_get_cpl,
5147         .get_dr              = emulator_get_dr,
5148         .set_dr              = emulator_set_dr,
5149         .get_smbase          = emulator_get_smbase,
5150         .set_smbase          = emulator_set_smbase,
5151         .set_msr             = emulator_set_msr,
5152         .get_msr             = emulator_get_msr,
5153         .check_pmc           = emulator_check_pmc,
5154         .read_pmc            = emulator_read_pmc,
5155         .halt                = emulator_halt,
5156         .wbinvd              = emulator_wbinvd,
5157         .fix_hypercall       = emulator_fix_hypercall,
5158         .get_fpu             = emulator_get_fpu,
5159         .put_fpu             = emulator_put_fpu,
5160         .intercept           = emulator_intercept,
5161         .get_cpuid           = emulator_get_cpuid,
5162         .set_nmi_mask        = emulator_set_nmi_mask,
5163 };
5164
5165 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
5166 {
5167         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
5168         /*
5169          * an sti; sti; sequence only disable interrupts for the first
5170          * instruction. So, if the last instruction, be it emulated or
5171          * not, left the system with the INT_STI flag enabled, it
5172          * means that the last instruction is an sti. We should not
5173          * leave the flag on in this case. The same goes for mov ss
5174          */
5175         if (int_shadow & mask)
5176                 mask = 0;
5177         if (unlikely(int_shadow || mask)) {
5178                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
5179                 if (!mask)
5180                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5181         }
5182 }
5183
5184 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
5185 {
5186         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5187         if (ctxt->exception.vector == PF_VECTOR)
5188                 return kvm_propagate_fault(vcpu, &ctxt->exception);
5189
5190         if (ctxt->exception.error_code_valid)
5191                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
5192                                       ctxt->exception.error_code);
5193         else
5194                 kvm_queue_exception(vcpu, ctxt->exception.vector);
5195         return false;
5196 }
5197
5198 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
5199 {
5200         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5201         int cs_db, cs_l;
5202
5203         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5204
5205         ctxt->eflags = kvm_get_rflags(vcpu);
5206         ctxt->eip = kvm_rip_read(vcpu);
5207         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
5208                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
5209                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
5210                      cs_db                              ? X86EMUL_MODE_PROT32 :
5211                                                           X86EMUL_MODE_PROT16;
5212         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
5213         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
5214         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
5215         ctxt->emul_flags = vcpu->arch.hflags;
5216
5217         init_decode_cache(ctxt);
5218         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5219 }
5220
5221 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
5222 {
5223         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5224         int ret;
5225
5226         init_emulate_ctxt(vcpu);
5227
5228         ctxt->op_bytes = 2;
5229         ctxt->ad_bytes = 2;
5230         ctxt->_eip = ctxt->eip + inc_eip;
5231         ret = emulate_int_real(ctxt, irq);
5232
5233         if (ret != X86EMUL_CONTINUE)
5234                 return EMULATE_FAIL;
5235
5236         ctxt->eip = ctxt->_eip;
5237         kvm_rip_write(vcpu, ctxt->eip);
5238         kvm_set_rflags(vcpu, ctxt->eflags);
5239
5240         if (irq == NMI_VECTOR)
5241                 vcpu->arch.nmi_pending = 0;
5242         else
5243                 vcpu->arch.interrupt.pending = false;
5244
5245         return EMULATE_DONE;
5246 }
5247 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
5248
5249 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
5250 {
5251         int r = EMULATE_DONE;
5252
5253         ++vcpu->stat.insn_emulation_fail;
5254         trace_kvm_emulate_insn_failed(vcpu);
5255         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
5256                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
5257                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
5258                 vcpu->run->internal.ndata = 0;
5259                 r = EMULATE_FAIL;
5260         }
5261         kvm_queue_exception(vcpu, UD_VECTOR);
5262
5263         return r;
5264 }
5265
5266 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
5267                                   bool write_fault_to_shadow_pgtable,
5268                                   int emulation_type)
5269 {
5270         gpa_t gpa = cr2;
5271         kvm_pfn_t pfn;
5272
5273         if (emulation_type & EMULTYPE_NO_REEXECUTE)
5274                 return false;
5275
5276         if (!vcpu->arch.mmu.direct_map) {
5277                 /*
5278                  * Write permission should be allowed since only
5279                  * write access need to be emulated.
5280                  */
5281                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5282
5283                 /*
5284                  * If the mapping is invalid in guest, let cpu retry
5285                  * it to generate fault.
5286                  */
5287                 if (gpa == UNMAPPED_GVA)
5288                         return true;
5289         }
5290
5291         /*
5292          * Do not retry the unhandleable instruction if it faults on the
5293          * readonly host memory, otherwise it will goto a infinite loop:
5294          * retry instruction -> write #PF -> emulation fail -> retry
5295          * instruction -> ...
5296          */
5297         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
5298
5299         /*
5300          * If the instruction failed on the error pfn, it can not be fixed,
5301          * report the error to userspace.
5302          */
5303         if (is_error_noslot_pfn(pfn))
5304                 return false;
5305
5306         kvm_release_pfn_clean(pfn);
5307
5308         /* The instructions are well-emulated on direct mmu. */
5309         if (vcpu->arch.mmu.direct_map) {
5310                 unsigned int indirect_shadow_pages;
5311
5312                 spin_lock(&vcpu->kvm->mmu_lock);
5313                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
5314                 spin_unlock(&vcpu->kvm->mmu_lock);
5315
5316                 if (indirect_shadow_pages)
5317                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5318
5319                 return true;
5320         }
5321
5322         /*
5323          * if emulation was due to access to shadowed page table
5324          * and it failed try to unshadow page and re-enter the
5325          * guest to let CPU execute the instruction.
5326          */
5327         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5328
5329         /*
5330          * If the access faults on its page table, it can not
5331          * be fixed by unprotecting shadow page and it should
5332          * be reported to userspace.
5333          */
5334         return !write_fault_to_shadow_pgtable;
5335 }
5336
5337 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
5338                               unsigned long cr2,  int emulation_type)
5339 {
5340         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5341         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
5342
5343         last_retry_eip = vcpu->arch.last_retry_eip;
5344         last_retry_addr = vcpu->arch.last_retry_addr;
5345
5346         /*
5347          * If the emulation is caused by #PF and it is non-page_table
5348          * writing instruction, it means the VM-EXIT is caused by shadow
5349          * page protected, we can zap the shadow page and retry this
5350          * instruction directly.
5351          *
5352          * Note: if the guest uses a non-page-table modifying instruction
5353          * on the PDE that points to the instruction, then we will unmap
5354          * the instruction and go to an infinite loop. So, we cache the
5355          * last retried eip and the last fault address, if we meet the eip
5356          * and the address again, we can break out of the potential infinite
5357          * loop.
5358          */
5359         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
5360
5361         if (!(emulation_type & EMULTYPE_RETRY))
5362                 return false;
5363
5364         if (x86_page_table_writing_insn(ctxt))
5365                 return false;
5366
5367         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
5368                 return false;
5369
5370         vcpu->arch.last_retry_eip = ctxt->eip;
5371         vcpu->arch.last_retry_addr = cr2;
5372
5373         if (!vcpu->arch.mmu.direct_map)
5374                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5375
5376         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5377
5378         return true;
5379 }
5380
5381 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
5382 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
5383
5384 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
5385 {
5386         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
5387                 /* This is a good place to trace that we are exiting SMM.  */
5388                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
5389
5390                 /* Process a latched INIT or SMI, if any.  */
5391                 kvm_make_request(KVM_REQ_EVENT, vcpu);
5392         }
5393
5394         kvm_mmu_reset_context(vcpu);
5395 }
5396
5397 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags)
5398 {
5399         unsigned changed = vcpu->arch.hflags ^ emul_flags;
5400
5401         vcpu->arch.hflags = emul_flags;
5402
5403         if (changed & HF_SMM_MASK)
5404                 kvm_smm_changed(vcpu);
5405 }
5406
5407 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
5408                                 unsigned long *db)
5409 {
5410         u32 dr6 = 0;
5411         int i;
5412         u32 enable, rwlen;
5413
5414         enable = dr7;
5415         rwlen = dr7 >> 16;
5416         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
5417                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
5418                         dr6 |= (1 << i);
5419         return dr6;
5420 }
5421
5422 static void kvm_vcpu_check_singlestep(struct kvm_vcpu *vcpu, unsigned long rflags, int *r)
5423 {
5424         struct kvm_run *kvm_run = vcpu->run;
5425
5426         /*
5427          * rflags is the old, "raw" value of the flags.  The new value has
5428          * not been saved yet.
5429          *
5430          * This is correct even for TF set by the guest, because "the
5431          * processor will not generate this exception after the instruction
5432          * that sets the TF flag".
5433          */
5434         if (unlikely(rflags & X86_EFLAGS_TF)) {
5435                 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5436                         kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 |
5437                                                   DR6_RTM;
5438                         kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5439                         kvm_run->debug.arch.exception = DB_VECTOR;
5440                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5441                         *r = EMULATE_USER_EXIT;
5442                 } else {
5443                         vcpu->arch.emulate_ctxt.eflags &= ~X86_EFLAGS_TF;
5444                         /*
5445                          * "Certain debug exceptions may clear bit 0-3.  The
5446                          * remaining contents of the DR6 register are never
5447                          * cleared by the processor".
5448                          */
5449                         vcpu->arch.dr6 &= ~15;
5450                         vcpu->arch.dr6 |= DR6_BS | DR6_RTM;
5451                         kvm_queue_exception(vcpu, DB_VECTOR);
5452                 }
5453         }
5454 }
5455
5456 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5457 {
5458         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5459             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5460                 struct kvm_run *kvm_run = vcpu->run;
5461                 unsigned long eip = kvm_get_linear_rip(vcpu);
5462                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5463                                            vcpu->arch.guest_debug_dr7,
5464                                            vcpu->arch.eff_db);
5465
5466                 if (dr6 != 0) {
5467                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
5468                         kvm_run->debug.arch.pc = eip;
5469                         kvm_run->debug.arch.exception = DB_VECTOR;
5470                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5471                         *r = EMULATE_USER_EXIT;
5472                         return true;
5473                 }
5474         }
5475
5476         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
5477             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
5478                 unsigned long eip = kvm_get_linear_rip(vcpu);
5479                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5480                                            vcpu->arch.dr7,
5481                                            vcpu->arch.db);
5482
5483                 if (dr6 != 0) {
5484                         vcpu->arch.dr6 &= ~15;
5485                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
5486                         kvm_queue_exception(vcpu, DB_VECTOR);
5487                         *r = EMULATE_DONE;
5488                         return true;
5489                 }
5490         }
5491
5492         return false;
5493 }
5494
5495 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5496                             unsigned long cr2,
5497                             int emulation_type,
5498                             void *insn,
5499                             int insn_len)
5500 {
5501         int r;
5502         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5503         bool writeback = true;
5504         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5505
5506         /*
5507          * Clear write_fault_to_shadow_pgtable here to ensure it is
5508          * never reused.
5509          */
5510         vcpu->arch.write_fault_to_shadow_pgtable = false;
5511         kvm_clear_exception_queue(vcpu);
5512
5513         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5514                 init_emulate_ctxt(vcpu);
5515
5516                 /*
5517                  * We will reenter on the same instruction since
5518                  * we do not set complete_userspace_io.  This does not
5519                  * handle watchpoints yet, those would be handled in
5520                  * the emulate_ops.
5521                  */
5522                 if (kvm_vcpu_check_breakpoint(vcpu, &r))
5523                         return r;
5524
5525                 ctxt->interruptibility = 0;
5526                 ctxt->have_exception = false;
5527                 ctxt->exception.vector = -1;
5528                 ctxt->perm_ok = false;
5529
5530                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
5531
5532                 r = x86_decode_insn(ctxt, insn, insn_len);
5533
5534                 trace_kvm_emulate_insn_start(vcpu);
5535                 ++vcpu->stat.insn_emulation;
5536                 if (r != EMULATION_OK)  {
5537                         if (emulation_type & EMULTYPE_TRAP_UD)
5538                                 return EMULATE_FAIL;
5539                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5540                                                 emulation_type))
5541                                 return EMULATE_DONE;
5542                         if (emulation_type & EMULTYPE_SKIP)
5543                                 return EMULATE_FAIL;
5544                         return handle_emulation_failure(vcpu);
5545                 }
5546         }
5547
5548         if (emulation_type & EMULTYPE_SKIP) {
5549                 kvm_rip_write(vcpu, ctxt->_eip);
5550                 if (ctxt->eflags & X86_EFLAGS_RF)
5551                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
5552                 return EMULATE_DONE;
5553         }
5554
5555         if (retry_instruction(ctxt, cr2, emulation_type))
5556                 return EMULATE_DONE;
5557
5558         /* this is needed for vmware backdoor interface to work since it
5559            changes registers values  during IO operation */
5560         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5561                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5562                 emulator_invalidate_register_cache(ctxt);
5563         }
5564
5565 restart:
5566         r = x86_emulate_insn(ctxt);
5567
5568         if (r == EMULATION_INTERCEPTED)
5569                 return EMULATE_DONE;
5570
5571         if (r == EMULATION_FAILED) {
5572                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5573                                         emulation_type))
5574                         return EMULATE_DONE;
5575
5576                 return handle_emulation_failure(vcpu);
5577         }
5578
5579         if (ctxt->have_exception) {
5580                 r = EMULATE_DONE;
5581                 if (inject_emulated_exception(vcpu))
5582                         return r;
5583         } else if (vcpu->arch.pio.count) {
5584                 if (!vcpu->arch.pio.in) {
5585                         /* FIXME: return into emulator if single-stepping.  */
5586                         vcpu->arch.pio.count = 0;
5587                 } else {
5588                         writeback = false;
5589                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
5590                 }
5591                 r = EMULATE_USER_EXIT;
5592         } else if (vcpu->mmio_needed) {
5593                 if (!vcpu->mmio_is_write)
5594                         writeback = false;
5595                 r = EMULATE_USER_EXIT;
5596                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5597         } else if (r == EMULATION_RESTART)
5598                 goto restart;
5599         else
5600                 r = EMULATE_DONE;
5601
5602         if (writeback) {
5603                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5604                 toggle_interruptibility(vcpu, ctxt->interruptibility);
5605                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5606                 if (vcpu->arch.hflags != ctxt->emul_flags)
5607                         kvm_set_hflags(vcpu, ctxt->emul_flags);
5608                 kvm_rip_write(vcpu, ctxt->eip);
5609                 if (r == EMULATE_DONE)
5610                         kvm_vcpu_check_singlestep(vcpu, rflags, &r);
5611                 if (!ctxt->have_exception ||
5612                     exception_type(ctxt->exception.vector) == EXCPT_TRAP)
5613                         __kvm_set_rflags(vcpu, ctxt->eflags);
5614
5615                 /*
5616                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5617                  * do nothing, and it will be requested again as soon as
5618                  * the shadow expires.  But we still need to check here,
5619                  * because POPF has no interrupt shadow.
5620                  */
5621                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
5622                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5623         } else
5624                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5625
5626         return r;
5627 }
5628 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5629
5630 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5631 {
5632         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5633         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5634                                             size, port, &val, 1);
5635         /* do not return to emulator after return from userspace */
5636         vcpu->arch.pio.count = 0;
5637         return ret;
5638 }
5639 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5640
5641 static int kvmclock_cpu_down_prep(unsigned int cpu)
5642 {
5643         __this_cpu_write(cpu_tsc_khz, 0);
5644         return 0;
5645 }
5646
5647 static void tsc_khz_changed(void *data)
5648 {
5649         struct cpufreq_freqs *freq = data;
5650         unsigned long khz = 0;
5651
5652         if (data)
5653                 khz = freq->new;
5654         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5655                 khz = cpufreq_quick_get(raw_smp_processor_id());
5656         if (!khz)
5657                 khz = tsc_khz;
5658         __this_cpu_write(cpu_tsc_khz, khz);
5659 }
5660
5661 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5662                                      void *data)
5663 {
5664         struct cpufreq_freqs *freq = data;
5665         struct kvm *kvm;
5666         struct kvm_vcpu *vcpu;
5667         int i, send_ipi = 0;
5668
5669         /*
5670          * We allow guests to temporarily run on slowing clocks,
5671          * provided we notify them after, or to run on accelerating
5672          * clocks, provided we notify them before.  Thus time never
5673          * goes backwards.
5674          *
5675          * However, we have a problem.  We can't atomically update
5676          * the frequency of a given CPU from this function; it is
5677          * merely a notifier, which can be called from any CPU.
5678          * Changing the TSC frequency at arbitrary points in time
5679          * requires a recomputation of local variables related to
5680          * the TSC for each VCPU.  We must flag these local variables
5681          * to be updated and be sure the update takes place with the
5682          * new frequency before any guests proceed.
5683          *
5684          * Unfortunately, the combination of hotplug CPU and frequency
5685          * change creates an intractable locking scenario; the order
5686          * of when these callouts happen is undefined with respect to
5687          * CPU hotplug, and they can race with each other.  As such,
5688          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5689          * undefined; you can actually have a CPU frequency change take
5690          * place in between the computation of X and the setting of the
5691          * variable.  To protect against this problem, all updates of
5692          * the per_cpu tsc_khz variable are done in an interrupt
5693          * protected IPI, and all callers wishing to update the value
5694          * must wait for a synchronous IPI to complete (which is trivial
5695          * if the caller is on the CPU already).  This establishes the
5696          * necessary total order on variable updates.
5697          *
5698          * Note that because a guest time update may take place
5699          * anytime after the setting of the VCPU's request bit, the
5700          * correct TSC value must be set before the request.  However,
5701          * to ensure the update actually makes it to any guest which
5702          * starts running in hardware virtualization between the set
5703          * and the acquisition of the spinlock, we must also ping the
5704          * CPU after setting the request bit.
5705          *
5706          */
5707
5708         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5709                 return 0;
5710         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5711                 return 0;
5712
5713         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5714
5715         spin_lock(&kvm_lock);
5716         list_for_each_entry(kvm, &vm_list, vm_list) {
5717                 kvm_for_each_vcpu(i, vcpu, kvm) {
5718                         if (vcpu->cpu != freq->cpu)
5719                                 continue;
5720                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5721                         if (vcpu->cpu != smp_processor_id())
5722                                 send_ipi = 1;
5723                 }
5724         }
5725         spin_unlock(&kvm_lock);
5726
5727         if (freq->old < freq->new && send_ipi) {
5728                 /*
5729                  * We upscale the frequency.  Must make the guest
5730                  * doesn't see old kvmclock values while running with
5731                  * the new frequency, otherwise we risk the guest sees
5732                  * time go backwards.
5733                  *
5734                  * In case we update the frequency for another cpu
5735                  * (which might be in guest context) send an interrupt
5736                  * to kick the cpu out of guest context.  Next time
5737                  * guest context is entered kvmclock will be updated,
5738                  * so the guest will not see stale values.
5739                  */
5740                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5741         }
5742         return 0;
5743 }
5744
5745 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5746         .notifier_call  = kvmclock_cpufreq_notifier
5747 };
5748
5749 static int kvmclock_cpu_online(unsigned int cpu)
5750 {
5751         tsc_khz_changed(NULL);
5752         return 0;
5753 }
5754
5755 static void kvm_timer_init(void)
5756 {
5757         max_tsc_khz = tsc_khz;
5758
5759         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5760 #ifdef CONFIG_CPU_FREQ
5761                 struct cpufreq_policy policy;
5762                 int cpu;
5763
5764                 memset(&policy, 0, sizeof(policy));
5765                 cpu = get_cpu();
5766                 cpufreq_get_policy(&policy, cpu);
5767                 if (policy.cpuinfo.max_freq)
5768                         max_tsc_khz = policy.cpuinfo.max_freq;
5769                 put_cpu();
5770 #endif
5771                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5772                                           CPUFREQ_TRANSITION_NOTIFIER);
5773         }
5774         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5775
5776         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "AP_X86_KVM_CLK_ONLINE",
5777                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
5778 }
5779
5780 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5781
5782 int kvm_is_in_guest(void)
5783 {
5784         return __this_cpu_read(current_vcpu) != NULL;
5785 }
5786
5787 static int kvm_is_user_mode(void)
5788 {
5789         int user_mode = 3;
5790
5791         if (__this_cpu_read(current_vcpu))
5792                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5793
5794         return user_mode != 0;
5795 }
5796
5797 static unsigned long kvm_get_guest_ip(void)
5798 {
5799         unsigned long ip = 0;
5800
5801         if (__this_cpu_read(current_vcpu))
5802                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5803
5804         return ip;
5805 }
5806
5807 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5808         .is_in_guest            = kvm_is_in_guest,
5809         .is_user_mode           = kvm_is_user_mode,
5810         .get_guest_ip           = kvm_get_guest_ip,
5811 };
5812
5813 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5814 {
5815         __this_cpu_write(current_vcpu, vcpu);
5816 }
5817 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5818
5819 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5820 {
5821         __this_cpu_write(current_vcpu, NULL);
5822 }
5823 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5824
5825 static void kvm_set_mmio_spte_mask(void)
5826 {
5827         u64 mask;
5828         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5829
5830         /*
5831          * Set the reserved bits and the present bit of an paging-structure
5832          * entry to generate page fault with PFER.RSV = 1.
5833          */
5834          /* Mask the reserved physical address bits. */
5835         mask = rsvd_bits(maxphyaddr, 51);
5836
5837         /* Bit 62 is always reserved for 32bit host. */
5838         mask |= 0x3ull << 62;
5839
5840         /* Set the present bit. */
5841         mask |= 1ull;
5842
5843 #ifdef CONFIG_X86_64
5844         /*
5845          * If reserved bit is not supported, clear the present bit to disable
5846          * mmio page fault.
5847          */
5848         if (maxphyaddr == 52)
5849                 mask &= ~1ull;
5850 #endif
5851
5852         kvm_mmu_set_mmio_spte_mask(mask);
5853 }
5854
5855 #ifdef CONFIG_X86_64
5856 static void pvclock_gtod_update_fn(struct work_struct *work)
5857 {
5858         struct kvm *kvm;
5859
5860         struct kvm_vcpu *vcpu;
5861         int i;
5862
5863         spin_lock(&kvm_lock);
5864         list_for_each_entry(kvm, &vm_list, vm_list)
5865                 kvm_for_each_vcpu(i, vcpu, kvm)
5866                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
5867         atomic_set(&kvm_guest_has_master_clock, 0);
5868         spin_unlock(&kvm_lock);
5869 }
5870
5871 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
5872
5873 /*
5874  * Notification about pvclock gtod data update.
5875  */
5876 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
5877                                void *priv)
5878 {
5879         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
5880         struct timekeeper *tk = priv;
5881
5882         update_pvclock_gtod(tk);
5883
5884         /* disable master clock if host does not trust, or does not
5885          * use, TSC clocksource
5886          */
5887         if (gtod->clock.vclock_mode != VCLOCK_TSC &&
5888             atomic_read(&kvm_guest_has_master_clock) != 0)
5889                 queue_work(system_long_wq, &pvclock_gtod_work);
5890
5891         return 0;
5892 }
5893
5894 static struct notifier_block pvclock_gtod_notifier = {
5895         .notifier_call = pvclock_gtod_notify,
5896 };
5897 #endif
5898
5899 int kvm_arch_init(void *opaque)
5900 {
5901         int r;
5902         struct kvm_x86_ops *ops = opaque;
5903
5904         if (kvm_x86_ops) {
5905                 printk(KERN_ERR "kvm: already loaded the other module\n");
5906                 r = -EEXIST;
5907                 goto out;
5908         }
5909
5910         if (!ops->cpu_has_kvm_support()) {
5911                 printk(KERN_ERR "kvm: no hardware support\n");
5912                 r = -EOPNOTSUPP;
5913                 goto out;
5914         }
5915         if (ops->disabled_by_bios()) {
5916                 printk(KERN_ERR "kvm: disabled by bios\n");
5917                 r = -EOPNOTSUPP;
5918                 goto out;
5919         }
5920
5921         r = -ENOMEM;
5922         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
5923         if (!shared_msrs) {
5924                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
5925                 goto out;
5926         }
5927
5928 #ifdef CONFIG_PREEMPT_RT_FULL
5929         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5930                 printk(KERN_ERR "RT requires X86_FEATURE_CONSTANT_TSC\n");
5931                 return -EOPNOTSUPP;
5932         }
5933 #endif
5934
5935         r = kvm_mmu_module_init();
5936         if (r)
5937                 goto out_free_percpu;
5938
5939         kvm_set_mmio_spte_mask();
5940
5941         kvm_x86_ops = ops;
5942
5943         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5944                         PT_DIRTY_MASK, PT64_NX_MASK, 0,
5945                         PT_PRESENT_MASK);
5946         kvm_timer_init();
5947
5948         perf_register_guest_info_callbacks(&kvm_guest_cbs);
5949
5950         if (boot_cpu_has(X86_FEATURE_XSAVE))
5951                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5952
5953         kvm_lapic_init();
5954 #ifdef CONFIG_X86_64
5955         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
5956 #endif
5957
5958         return 0;
5959
5960 out_free_percpu:
5961         free_percpu(shared_msrs);
5962 out:
5963         return r;
5964 }
5965
5966 void kvm_arch_exit(void)
5967 {
5968         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5969
5970         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5971                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5972                                             CPUFREQ_TRANSITION_NOTIFIER);
5973         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
5974 #ifdef CONFIG_X86_64
5975         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
5976 #endif
5977         kvm_x86_ops = NULL;
5978         kvm_mmu_module_exit();
5979         free_percpu(shared_msrs);
5980 }
5981
5982 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
5983 {
5984         ++vcpu->stat.halt_exits;
5985         if (lapic_in_kernel(vcpu)) {
5986                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5987                 return 1;
5988         } else {
5989                 vcpu->run->exit_reason = KVM_EXIT_HLT;
5990                 return 0;
5991         }
5992 }
5993 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
5994
5995 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5996 {
5997         kvm_x86_ops->skip_emulated_instruction(vcpu);
5998         return kvm_vcpu_halt(vcpu);
5999 }
6000 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
6001
6002 /*
6003  * kvm_pv_kick_cpu_op:  Kick a vcpu.
6004  *
6005  * @apicid - apicid of vcpu to be kicked.
6006  */
6007 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
6008 {
6009         struct kvm_lapic_irq lapic_irq;
6010
6011         lapic_irq.shorthand = 0;
6012         lapic_irq.dest_mode = 0;
6013         lapic_irq.dest_id = apicid;
6014         lapic_irq.msi_redir_hint = false;
6015
6016         lapic_irq.delivery_mode = APIC_DM_REMRD;
6017         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
6018 }
6019
6020 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu)
6021 {
6022         vcpu->arch.apicv_active = false;
6023         kvm_x86_ops->refresh_apicv_exec_ctrl(vcpu);
6024 }
6025
6026 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
6027 {
6028         unsigned long nr, a0, a1, a2, a3, ret;
6029         int op_64_bit, r = 1;
6030
6031         kvm_x86_ops->skip_emulated_instruction(vcpu);
6032
6033         if (kvm_hv_hypercall_enabled(vcpu->kvm))
6034                 return kvm_hv_hypercall(vcpu);
6035
6036         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
6037         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
6038         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
6039         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
6040         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
6041
6042         trace_kvm_hypercall(nr, a0, a1, a2, a3);
6043
6044         op_64_bit = is_64_bit_mode(vcpu);
6045         if (!op_64_bit) {
6046                 nr &= 0xFFFFFFFF;
6047                 a0 &= 0xFFFFFFFF;
6048                 a1 &= 0xFFFFFFFF;
6049                 a2 &= 0xFFFFFFFF;
6050                 a3 &= 0xFFFFFFFF;
6051         }
6052
6053         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
6054                 ret = -KVM_EPERM;
6055                 goto out;
6056         }
6057
6058         switch (nr) {
6059         case KVM_HC_VAPIC_POLL_IRQ:
6060                 ret = 0;
6061                 break;
6062         case KVM_HC_KICK_CPU:
6063                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
6064                 ret = 0;
6065                 break;
6066         default:
6067                 ret = -KVM_ENOSYS;
6068                 break;
6069         }
6070 out:
6071         if (!op_64_bit)
6072                 ret = (u32)ret;
6073         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
6074         ++vcpu->stat.hypercalls;
6075         return r;
6076 }
6077 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
6078
6079 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
6080 {
6081         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6082         char instruction[3];
6083         unsigned long rip = kvm_rip_read(vcpu);
6084
6085         kvm_x86_ops->patch_hypercall(vcpu, instruction);
6086
6087         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
6088 }
6089
6090 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
6091 {
6092         return vcpu->run->request_interrupt_window &&
6093                 likely(!pic_in_kernel(vcpu->kvm));
6094 }
6095
6096 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
6097 {
6098         struct kvm_run *kvm_run = vcpu->run;
6099
6100         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
6101         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
6102         kvm_run->cr8 = kvm_get_cr8(vcpu);
6103         kvm_run->apic_base = kvm_get_apic_base(vcpu);
6104         kvm_run->ready_for_interrupt_injection =
6105                 pic_in_kernel(vcpu->kvm) ||
6106                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
6107 }
6108
6109 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
6110 {
6111         int max_irr, tpr;
6112
6113         if (!kvm_x86_ops->update_cr8_intercept)
6114                 return;
6115
6116         if (!lapic_in_kernel(vcpu))
6117                 return;
6118
6119         if (vcpu->arch.apicv_active)
6120                 return;
6121
6122         if (!vcpu->arch.apic->vapic_addr)
6123                 max_irr = kvm_lapic_find_highest_irr(vcpu);
6124         else
6125                 max_irr = -1;
6126
6127         if (max_irr != -1)
6128                 max_irr >>= 4;
6129
6130         tpr = kvm_lapic_get_cr8(vcpu);
6131
6132         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
6133 }
6134
6135 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
6136 {
6137         int r;
6138
6139         /* try to reinject previous events if any */
6140         if (vcpu->arch.exception.pending) {
6141                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
6142                                         vcpu->arch.exception.has_error_code,
6143                                         vcpu->arch.exception.error_code);
6144
6145                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
6146                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
6147                                              X86_EFLAGS_RF);
6148
6149                 if (vcpu->arch.exception.nr == DB_VECTOR &&
6150                     (vcpu->arch.dr7 & DR7_GD)) {
6151                         vcpu->arch.dr7 &= ~DR7_GD;
6152                         kvm_update_dr7(vcpu);
6153                 }
6154
6155                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
6156                                           vcpu->arch.exception.has_error_code,
6157                                           vcpu->arch.exception.error_code,
6158                                           vcpu->arch.exception.reinject);
6159                 return 0;
6160         }
6161
6162         if (vcpu->arch.nmi_injected) {
6163                 kvm_x86_ops->set_nmi(vcpu);
6164                 return 0;
6165         }
6166
6167         if (vcpu->arch.interrupt.pending) {
6168                 kvm_x86_ops->set_irq(vcpu);
6169                 return 0;
6170         }
6171
6172         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6173                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6174                 if (r != 0)
6175                         return r;
6176         }
6177
6178         /* try to inject new event if pending */
6179         if (vcpu->arch.smi_pending && !is_smm(vcpu)) {
6180                 vcpu->arch.smi_pending = false;
6181                 enter_smm(vcpu);
6182         } else if (vcpu->arch.nmi_pending && kvm_x86_ops->nmi_allowed(vcpu)) {
6183                 --vcpu->arch.nmi_pending;
6184                 vcpu->arch.nmi_injected = true;
6185                 kvm_x86_ops->set_nmi(vcpu);
6186         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
6187                 /*
6188                  * Because interrupts can be injected asynchronously, we are
6189                  * calling check_nested_events again here to avoid a race condition.
6190                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6191                  * proposal and current concerns.  Perhaps we should be setting
6192                  * KVM_REQ_EVENT only on certain events and not unconditionally?
6193                  */
6194                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6195                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6196                         if (r != 0)
6197                                 return r;
6198                 }
6199                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
6200                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
6201                                             false);
6202                         kvm_x86_ops->set_irq(vcpu);
6203                 }
6204         }
6205
6206         return 0;
6207 }
6208
6209 static void process_nmi(struct kvm_vcpu *vcpu)
6210 {
6211         unsigned limit = 2;
6212
6213         /*
6214          * x86 is limited to one NMI running, and one NMI pending after it.
6215          * If an NMI is already in progress, limit further NMIs to just one.
6216          * Otherwise, allow two (and we'll inject the first one immediately).
6217          */
6218         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
6219                 limit = 1;
6220
6221         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
6222         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
6223         kvm_make_request(KVM_REQ_EVENT, vcpu);
6224 }
6225
6226 #define put_smstate(type, buf, offset, val)                       \
6227         *(type *)((buf) + (offset) - 0x7e00) = val
6228
6229 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
6230 {
6231         u32 flags = 0;
6232         flags |= seg->g       << 23;
6233         flags |= seg->db      << 22;
6234         flags |= seg->l       << 21;
6235         flags |= seg->avl     << 20;
6236         flags |= seg->present << 15;
6237         flags |= seg->dpl     << 13;
6238         flags |= seg->s       << 12;
6239         flags |= seg->type    << 8;
6240         return flags;
6241 }
6242
6243 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
6244 {
6245         struct kvm_segment seg;
6246         int offset;
6247
6248         kvm_get_segment(vcpu, &seg, n);
6249         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
6250
6251         if (n < 3)
6252                 offset = 0x7f84 + n * 12;
6253         else
6254                 offset = 0x7f2c + (n - 3) * 12;
6255
6256         put_smstate(u32, buf, offset + 8, seg.base);
6257         put_smstate(u32, buf, offset + 4, seg.limit);
6258         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
6259 }
6260
6261 #ifdef CONFIG_X86_64
6262 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
6263 {
6264         struct kvm_segment seg;
6265         int offset;
6266         u16 flags;
6267
6268         kvm_get_segment(vcpu, &seg, n);
6269         offset = 0x7e00 + n * 16;
6270
6271         flags = enter_smm_get_segment_flags(&seg) >> 8;
6272         put_smstate(u16, buf, offset, seg.selector);
6273         put_smstate(u16, buf, offset + 2, flags);
6274         put_smstate(u32, buf, offset + 4, seg.limit);
6275         put_smstate(u64, buf, offset + 8, seg.base);
6276 }
6277 #endif
6278
6279 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
6280 {
6281         struct desc_ptr dt;
6282         struct kvm_segment seg;
6283         unsigned long val;
6284         int i;
6285
6286         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
6287         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
6288         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
6289         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
6290
6291         for (i = 0; i < 8; i++)
6292                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
6293
6294         kvm_get_dr(vcpu, 6, &val);
6295         put_smstate(u32, buf, 0x7fcc, (u32)val);
6296         kvm_get_dr(vcpu, 7, &val);
6297         put_smstate(u32, buf, 0x7fc8, (u32)val);
6298
6299         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6300         put_smstate(u32, buf, 0x7fc4, seg.selector);
6301         put_smstate(u32, buf, 0x7f64, seg.base);
6302         put_smstate(u32, buf, 0x7f60, seg.limit);
6303         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
6304
6305         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6306         put_smstate(u32, buf, 0x7fc0, seg.selector);
6307         put_smstate(u32, buf, 0x7f80, seg.base);
6308         put_smstate(u32, buf, 0x7f7c, seg.limit);
6309         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
6310
6311         kvm_x86_ops->get_gdt(vcpu, &dt);
6312         put_smstate(u32, buf, 0x7f74, dt.address);
6313         put_smstate(u32, buf, 0x7f70, dt.size);
6314
6315         kvm_x86_ops->get_idt(vcpu, &dt);
6316         put_smstate(u32, buf, 0x7f58, dt.address);
6317         put_smstate(u32, buf, 0x7f54, dt.size);
6318
6319         for (i = 0; i < 6; i++)
6320                 enter_smm_save_seg_32(vcpu, buf, i);
6321
6322         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
6323
6324         /* revision id */
6325         put_smstate(u32, buf, 0x7efc, 0x00020000);
6326         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
6327 }
6328
6329 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
6330 {
6331 #ifdef CONFIG_X86_64
6332         struct desc_ptr dt;
6333         struct kvm_segment seg;
6334         unsigned long val;
6335         int i;
6336
6337         for (i = 0; i < 16; i++)
6338                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
6339
6340         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
6341         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
6342
6343         kvm_get_dr(vcpu, 6, &val);
6344         put_smstate(u64, buf, 0x7f68, val);
6345         kvm_get_dr(vcpu, 7, &val);
6346         put_smstate(u64, buf, 0x7f60, val);
6347
6348         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
6349         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
6350         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
6351
6352         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
6353
6354         /* revision id */
6355         put_smstate(u32, buf, 0x7efc, 0x00020064);
6356
6357         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
6358
6359         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6360         put_smstate(u16, buf, 0x7e90, seg.selector);
6361         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
6362         put_smstate(u32, buf, 0x7e94, seg.limit);
6363         put_smstate(u64, buf, 0x7e98, seg.base);
6364
6365         kvm_x86_ops->get_idt(vcpu, &dt);
6366         put_smstate(u32, buf, 0x7e84, dt.size);
6367         put_smstate(u64, buf, 0x7e88, dt.address);
6368
6369         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6370         put_smstate(u16, buf, 0x7e70, seg.selector);
6371         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
6372         put_smstate(u32, buf, 0x7e74, seg.limit);
6373         put_smstate(u64, buf, 0x7e78, seg.base);
6374
6375         kvm_x86_ops->get_gdt(vcpu, &dt);
6376         put_smstate(u32, buf, 0x7e64, dt.size);
6377         put_smstate(u64, buf, 0x7e68, dt.address);
6378
6379         for (i = 0; i < 6; i++)
6380                 enter_smm_save_seg_64(vcpu, buf, i);
6381 #else
6382         WARN_ON_ONCE(1);
6383 #endif
6384 }
6385
6386 static void enter_smm(struct kvm_vcpu *vcpu)
6387 {
6388         struct kvm_segment cs, ds;
6389         struct desc_ptr dt;
6390         char buf[512];
6391         u32 cr0;
6392
6393         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
6394         vcpu->arch.hflags |= HF_SMM_MASK;
6395         memset(buf, 0, 512);
6396         if (guest_cpuid_has_longmode(vcpu))
6397                 enter_smm_save_state_64(vcpu, buf);
6398         else
6399                 enter_smm_save_state_32(vcpu, buf);
6400
6401         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
6402
6403         if (kvm_x86_ops->get_nmi_mask(vcpu))
6404                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
6405         else
6406                 kvm_x86_ops->set_nmi_mask(vcpu, true);
6407
6408         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
6409         kvm_rip_write(vcpu, 0x8000);
6410
6411         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
6412         kvm_x86_ops->set_cr0(vcpu, cr0);
6413         vcpu->arch.cr0 = cr0;
6414
6415         kvm_x86_ops->set_cr4(vcpu, 0);
6416
6417         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
6418         dt.address = dt.size = 0;
6419         kvm_x86_ops->set_idt(vcpu, &dt);
6420
6421         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
6422
6423         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
6424         cs.base = vcpu->arch.smbase;
6425
6426         ds.selector = 0;
6427         ds.base = 0;
6428
6429         cs.limit    = ds.limit = 0xffffffff;
6430         cs.type     = ds.type = 0x3;
6431         cs.dpl      = ds.dpl = 0;
6432         cs.db       = ds.db = 0;
6433         cs.s        = ds.s = 1;
6434         cs.l        = ds.l = 0;
6435         cs.g        = ds.g = 1;
6436         cs.avl      = ds.avl = 0;
6437         cs.present  = ds.present = 1;
6438         cs.unusable = ds.unusable = 0;
6439         cs.padding  = ds.padding = 0;
6440
6441         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6442         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
6443         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
6444         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
6445         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
6446         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
6447
6448         if (guest_cpuid_has_longmode(vcpu))
6449                 kvm_x86_ops->set_efer(vcpu, 0);
6450
6451         kvm_update_cpuid(vcpu);
6452         kvm_mmu_reset_context(vcpu);
6453 }
6454
6455 static void process_smi(struct kvm_vcpu *vcpu)
6456 {
6457         vcpu->arch.smi_pending = true;
6458         kvm_make_request(KVM_REQ_EVENT, vcpu);
6459 }
6460
6461 void kvm_make_scan_ioapic_request(struct kvm *kvm)
6462 {
6463         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
6464 }
6465
6466 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
6467 {
6468         u64 eoi_exit_bitmap[4];
6469
6470         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
6471                 return;
6472
6473         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
6474
6475         if (irqchip_split(vcpu->kvm))
6476                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
6477         else {
6478                 if (vcpu->arch.apicv_active)
6479                         kvm_x86_ops->sync_pir_to_irr(vcpu);
6480                 kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
6481         }
6482         bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
6483                   vcpu_to_synic(vcpu)->vec_bitmap, 256);
6484         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
6485 }
6486
6487 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu)
6488 {
6489         ++vcpu->stat.tlb_flush;
6490         kvm_x86_ops->tlb_flush(vcpu);
6491 }
6492
6493 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
6494 {
6495         struct page *page = NULL;
6496
6497         if (!lapic_in_kernel(vcpu))
6498                 return;
6499
6500         if (!kvm_x86_ops->set_apic_access_page_addr)
6501                 return;
6502
6503         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
6504         if (is_error_page(page))
6505                 return;
6506         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
6507
6508         /*
6509          * Do not pin apic access page in memory, the MMU notifier
6510          * will call us again if it is migrated or swapped out.
6511          */
6512         put_page(page);
6513 }
6514 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
6515
6516 void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm,
6517                                            unsigned long address)
6518 {
6519         /*
6520          * The physical address of apic access page is stored in the VMCS.
6521          * Update it when it becomes invalid.
6522          */
6523         if (address == gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT))
6524                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
6525 }
6526
6527 /*
6528  * Returns 1 to let vcpu_run() continue the guest execution loop without
6529  * exiting to the userspace.  Otherwise, the value will be returned to the
6530  * userspace.
6531  */
6532 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
6533 {
6534         int r;
6535         bool req_int_win =
6536                 dm_request_for_irq_injection(vcpu) &&
6537                 kvm_cpu_accept_dm_intr(vcpu);
6538
6539         bool req_immediate_exit = false;
6540
6541         if (vcpu->requests) {
6542                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
6543                         kvm_mmu_unload(vcpu);
6544                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
6545                         __kvm_migrate_timers(vcpu);
6546                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
6547                         kvm_gen_update_masterclock(vcpu->kvm);
6548                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
6549                         kvm_gen_kvmclock_update(vcpu);
6550                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
6551                         r = kvm_guest_time_update(vcpu);
6552                         if (unlikely(r))
6553                                 goto out;
6554                 }
6555                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
6556                         kvm_mmu_sync_roots(vcpu);
6557                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
6558                         kvm_vcpu_flush_tlb(vcpu);
6559                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
6560                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
6561                         r = 0;
6562                         goto out;
6563                 }
6564                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
6565                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
6566                         r = 0;
6567                         goto out;
6568                 }
6569                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
6570                         vcpu->fpu_active = 0;
6571                         kvm_x86_ops->fpu_deactivate(vcpu);
6572                 }
6573                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
6574                         /* Page is swapped out. Do synthetic halt */
6575                         vcpu->arch.apf.halted = true;
6576                         r = 1;
6577                         goto out;
6578                 }
6579                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
6580                         record_steal_time(vcpu);
6581                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
6582                         process_smi(vcpu);
6583                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
6584                         process_nmi(vcpu);
6585                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
6586                         kvm_pmu_handle_event(vcpu);
6587                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
6588                         kvm_pmu_deliver_pmi(vcpu);
6589                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
6590                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
6591                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
6592                                      vcpu->arch.ioapic_handled_vectors)) {
6593                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
6594                                 vcpu->run->eoi.vector =
6595                                                 vcpu->arch.pending_ioapic_eoi;
6596                                 r = 0;
6597                                 goto out;
6598                         }
6599                 }
6600                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
6601                         vcpu_scan_ioapic(vcpu);
6602                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
6603                         kvm_vcpu_reload_apic_access_page(vcpu);
6604                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
6605                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6606                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
6607                         r = 0;
6608                         goto out;
6609                 }
6610                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
6611                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6612                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
6613                         r = 0;
6614                         goto out;
6615                 }
6616                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
6617                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
6618                         vcpu->run->hyperv = vcpu->arch.hyperv.exit;
6619                         r = 0;
6620                         goto out;
6621                 }
6622
6623                 /*
6624                  * KVM_REQ_HV_STIMER has to be processed after
6625                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
6626                  * depend on the guest clock being up-to-date
6627                  */
6628                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
6629                         kvm_hv_process_stimers(vcpu);
6630         }
6631
6632         /*
6633          * KVM_REQ_EVENT is not set when posted interrupts are set by
6634          * VT-d hardware, so we have to update RVI unconditionally.
6635          */
6636         if (kvm_lapic_enabled(vcpu)) {
6637                 /*
6638                  * Update architecture specific hints for APIC
6639                  * virtual interrupt delivery.
6640                  */
6641                 if (vcpu->arch.apicv_active)
6642                         kvm_x86_ops->hwapic_irr_update(vcpu,
6643                                 kvm_lapic_find_highest_irr(vcpu));
6644         }
6645
6646         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
6647                 kvm_apic_accept_events(vcpu);
6648                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
6649                         r = 1;
6650                         goto out;
6651                 }
6652
6653                 if (inject_pending_event(vcpu, req_int_win) != 0)
6654                         req_immediate_exit = true;
6655                 else {
6656                         /* Enable NMI/IRQ window open exits if needed.
6657                          *
6658                          * SMIs have two cases: 1) they can be nested, and
6659                          * then there is nothing to do here because RSM will
6660                          * cause a vmexit anyway; 2) or the SMI can be pending
6661                          * because inject_pending_event has completed the
6662                          * injection of an IRQ or NMI from the previous vmexit,
6663                          * and then we request an immediate exit to inject the SMI.
6664                          */
6665                         if (vcpu->arch.smi_pending && !is_smm(vcpu))
6666                                 req_immediate_exit = true;
6667                         if (vcpu->arch.nmi_pending)
6668                                 kvm_x86_ops->enable_nmi_window(vcpu);
6669                         if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
6670                                 kvm_x86_ops->enable_irq_window(vcpu);
6671                 }
6672
6673                 if (kvm_lapic_enabled(vcpu)) {
6674                         update_cr8_intercept(vcpu);
6675                         kvm_lapic_sync_to_vapic(vcpu);
6676                 }
6677         }
6678
6679         r = kvm_mmu_reload(vcpu);
6680         if (unlikely(r)) {
6681                 goto cancel_injection;
6682         }
6683
6684         preempt_disable();
6685
6686         kvm_x86_ops->prepare_guest_switch(vcpu);
6687         if (vcpu->fpu_active)
6688                 kvm_load_guest_fpu(vcpu);
6689         vcpu->mode = IN_GUEST_MODE;
6690
6691         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6692
6693         /*
6694          * We should set ->mode before check ->requests,
6695          * Please see the comment in kvm_make_all_cpus_request.
6696          * This also orders the write to mode from any reads
6697          * to the page tables done while the VCPU is running.
6698          * Please see the comment in kvm_flush_remote_tlbs.
6699          */
6700         smp_mb__after_srcu_read_unlock();
6701
6702         local_irq_disable();
6703
6704         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
6705             || need_resched() || signal_pending(current)) {
6706                 vcpu->mode = OUTSIDE_GUEST_MODE;
6707                 smp_wmb();
6708                 local_irq_enable();
6709                 preempt_enable();
6710                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6711                 r = 1;
6712                 goto cancel_injection;
6713         }
6714
6715         kvm_load_guest_xcr0(vcpu);
6716
6717         if (req_immediate_exit) {
6718                 kvm_make_request(KVM_REQ_EVENT, vcpu);
6719                 smp_send_reschedule(vcpu->cpu);
6720         }
6721
6722         trace_kvm_entry(vcpu->vcpu_id);
6723         wait_lapic_expire(vcpu);
6724         guest_enter_irqoff();
6725
6726         if (unlikely(vcpu->arch.switch_db_regs)) {
6727                 set_debugreg(0, 7);
6728                 set_debugreg(vcpu->arch.eff_db[0], 0);
6729                 set_debugreg(vcpu->arch.eff_db[1], 1);
6730                 set_debugreg(vcpu->arch.eff_db[2], 2);
6731                 set_debugreg(vcpu->arch.eff_db[3], 3);
6732                 set_debugreg(vcpu->arch.dr6, 6);
6733                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6734         }
6735
6736         kvm_x86_ops->run(vcpu);
6737
6738         /*
6739          * Do this here before restoring debug registers on the host.  And
6740          * since we do this before handling the vmexit, a DR access vmexit
6741          * can (a) read the correct value of the debug registers, (b) set
6742          * KVM_DEBUGREG_WONT_EXIT again.
6743          */
6744         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
6745                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
6746                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
6747                 kvm_update_dr0123(vcpu);
6748                 kvm_update_dr6(vcpu);
6749                 kvm_update_dr7(vcpu);
6750                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6751         }
6752
6753         /*
6754          * If the guest has used debug registers, at least dr7
6755          * will be disabled while returning to the host.
6756          * If we don't have active breakpoints in the host, we don't
6757          * care about the messed up debug address registers. But if
6758          * we have some of them active, restore the old state.
6759          */
6760         if (hw_breakpoint_active())
6761                 hw_breakpoint_restore();
6762
6763         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
6764
6765         vcpu->mode = OUTSIDE_GUEST_MODE;
6766         smp_wmb();
6767
6768         kvm_put_guest_xcr0(vcpu);
6769
6770         kvm_x86_ops->handle_external_intr(vcpu);
6771
6772         ++vcpu->stat.exits;
6773
6774         guest_exit_irqoff();
6775
6776         local_irq_enable();
6777         preempt_enable();
6778
6779         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6780
6781         /*
6782          * Profile KVM exit RIPs:
6783          */
6784         if (unlikely(prof_on == KVM_PROFILING)) {
6785                 unsigned long rip = kvm_rip_read(vcpu);
6786                 profile_hit(KVM_PROFILING, (void *)rip);
6787         }
6788
6789         if (unlikely(vcpu->arch.tsc_always_catchup))
6790                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6791
6792         if (vcpu->arch.apic_attention)
6793                 kvm_lapic_sync_from_vapic(vcpu);
6794
6795         r = kvm_x86_ops->handle_exit(vcpu);
6796         return r;
6797
6798 cancel_injection:
6799         kvm_x86_ops->cancel_injection(vcpu);
6800         if (unlikely(vcpu->arch.apic_attention))
6801                 kvm_lapic_sync_from_vapic(vcpu);
6802 out:
6803         return r;
6804 }
6805
6806 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
6807 {
6808         if (!kvm_arch_vcpu_runnable(vcpu) &&
6809             (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
6810                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6811                 kvm_vcpu_block(vcpu);
6812                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6813
6814                 if (kvm_x86_ops->post_block)
6815                         kvm_x86_ops->post_block(vcpu);
6816
6817                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
6818                         return 1;
6819         }
6820
6821         kvm_apic_accept_events(vcpu);
6822         switch(vcpu->arch.mp_state) {
6823         case KVM_MP_STATE_HALTED:
6824                 vcpu->arch.pv.pv_unhalted = false;
6825                 vcpu->arch.mp_state =
6826                         KVM_MP_STATE_RUNNABLE;
6827         case KVM_MP_STATE_RUNNABLE:
6828                 vcpu->arch.apf.halted = false;
6829                 break;
6830         case KVM_MP_STATE_INIT_RECEIVED:
6831                 break;
6832         default:
6833                 return -EINTR;
6834                 break;
6835         }
6836         return 1;
6837 }
6838
6839 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
6840 {
6841         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6842                 !vcpu->arch.apf.halted);
6843 }
6844
6845 static int vcpu_run(struct kvm_vcpu *vcpu)
6846 {
6847         int r;
6848         struct kvm *kvm = vcpu->kvm;
6849
6850         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6851
6852         for (;;) {
6853                 if (kvm_vcpu_running(vcpu)) {
6854                         r = vcpu_enter_guest(vcpu);
6855                 } else {
6856                         r = vcpu_block(kvm, vcpu);
6857                 }
6858
6859                 if (r <= 0)
6860                         break;
6861
6862                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
6863                 if (kvm_cpu_has_pending_timer(vcpu))
6864                         kvm_inject_pending_timer_irqs(vcpu);
6865
6866                 if (dm_request_for_irq_injection(vcpu) &&
6867                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
6868                         r = 0;
6869                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
6870                         ++vcpu->stat.request_irq_exits;
6871                         break;
6872                 }
6873
6874                 kvm_check_async_pf_completion(vcpu);
6875
6876                 if (signal_pending(current)) {
6877                         r = -EINTR;
6878                         vcpu->run->exit_reason = KVM_EXIT_INTR;
6879                         ++vcpu->stat.signal_exits;
6880                         break;
6881                 }
6882                 if (need_resched()) {
6883                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6884                         cond_resched();
6885                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6886                 }
6887         }
6888
6889         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6890
6891         return r;
6892 }
6893
6894 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
6895 {
6896         int r;
6897         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6898         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
6899         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6900         if (r != EMULATE_DONE)
6901                 return 0;
6902         return 1;
6903 }
6904
6905 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
6906 {
6907         BUG_ON(!vcpu->arch.pio.count);
6908
6909         return complete_emulated_io(vcpu);
6910 }
6911
6912 /*
6913  * Implements the following, as a state machine:
6914  *
6915  * read:
6916  *   for each fragment
6917  *     for each mmio piece in the fragment
6918  *       write gpa, len
6919  *       exit
6920  *       copy data
6921  *   execute insn
6922  *
6923  * write:
6924  *   for each fragment
6925  *     for each mmio piece in the fragment
6926  *       write gpa, len
6927  *       copy data
6928  *       exit
6929  */
6930 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
6931 {
6932         struct kvm_run *run = vcpu->run;
6933         struct kvm_mmio_fragment *frag;
6934         unsigned len;
6935
6936         BUG_ON(!vcpu->mmio_needed);
6937
6938         /* Complete previous fragment */
6939         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
6940         len = min(8u, frag->len);
6941         if (!vcpu->mmio_is_write)
6942                 memcpy(frag->data, run->mmio.data, len);
6943
6944         if (frag->len <= 8) {
6945                 /* Switch to the next fragment. */
6946                 frag++;
6947                 vcpu->mmio_cur_fragment++;
6948         } else {
6949                 /* Go forward to the next mmio piece. */
6950                 frag->data += len;
6951                 frag->gpa += len;
6952                 frag->len -= len;
6953         }
6954
6955         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
6956                 vcpu->mmio_needed = 0;
6957
6958                 /* FIXME: return into emulator if single-stepping.  */
6959                 if (vcpu->mmio_is_write)
6960                         return 1;
6961                 vcpu->mmio_read_completed = 1;
6962                 return complete_emulated_io(vcpu);
6963         }
6964
6965         run->exit_reason = KVM_EXIT_MMIO;
6966         run->mmio.phys_addr = frag->gpa;
6967         if (vcpu->mmio_is_write)
6968                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
6969         run->mmio.len = min(8u, frag->len);
6970         run->mmio.is_write = vcpu->mmio_is_write;
6971         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6972         return 0;
6973 }
6974
6975
6976 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
6977 {
6978         struct fpu *fpu = &current->thread.fpu;
6979         int r;
6980         sigset_t sigsaved;
6981
6982         fpu__activate_curr(fpu);
6983
6984         if (vcpu->sigset_active)
6985                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
6986
6987         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
6988                 kvm_vcpu_block(vcpu);
6989                 kvm_apic_accept_events(vcpu);
6990                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
6991                 r = -EAGAIN;
6992                 goto out;
6993         }
6994
6995         /* re-sync apic's tpr */
6996         if (!lapic_in_kernel(vcpu)) {
6997                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
6998                         r = -EINVAL;
6999                         goto out;
7000                 }
7001         }
7002
7003         if (unlikely(vcpu->arch.complete_userspace_io)) {
7004                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
7005                 vcpu->arch.complete_userspace_io = NULL;
7006                 r = cui(vcpu);
7007                 if (r <= 0)
7008                         goto out;
7009         } else
7010                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
7011
7012         r = vcpu_run(vcpu);
7013
7014 out:
7015         post_kvm_run_save(vcpu);
7016         if (vcpu->sigset_active)
7017                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
7018
7019         return r;
7020 }
7021
7022 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7023 {
7024         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
7025                 /*
7026                  * We are here if userspace calls get_regs() in the middle of
7027                  * instruction emulation. Registers state needs to be copied
7028                  * back from emulation context to vcpu. Userspace shouldn't do
7029                  * that usually, but some bad designed PV devices (vmware
7030                  * backdoor interface) need this to work
7031                  */
7032                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
7033                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7034         }
7035         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
7036         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
7037         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
7038         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
7039         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
7040         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
7041         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
7042         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
7043 #ifdef CONFIG_X86_64
7044         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
7045         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
7046         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
7047         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
7048         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
7049         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
7050         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
7051         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
7052 #endif
7053
7054         regs->rip = kvm_rip_read(vcpu);
7055         regs->rflags = kvm_get_rflags(vcpu);
7056
7057         return 0;
7058 }
7059
7060 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7061 {
7062         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
7063         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7064
7065         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
7066         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
7067         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
7068         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
7069         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
7070         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
7071         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
7072         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
7073 #ifdef CONFIG_X86_64
7074         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
7075         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
7076         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
7077         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
7078         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
7079         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
7080         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
7081         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
7082 #endif
7083
7084         kvm_rip_write(vcpu, regs->rip);
7085         kvm_set_rflags(vcpu, regs->rflags);
7086
7087         vcpu->arch.exception.pending = false;
7088
7089         kvm_make_request(KVM_REQ_EVENT, vcpu);
7090
7091         return 0;
7092 }
7093
7094 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
7095 {
7096         struct kvm_segment cs;
7097
7098         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7099         *db = cs.db;
7100         *l = cs.l;
7101 }
7102 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
7103
7104 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
7105                                   struct kvm_sregs *sregs)
7106 {
7107         struct desc_ptr dt;
7108
7109         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7110         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7111         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7112         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7113         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7114         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7115
7116         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7117         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7118
7119         kvm_x86_ops->get_idt(vcpu, &dt);
7120         sregs->idt.limit = dt.size;
7121         sregs->idt.base = dt.address;
7122         kvm_x86_ops->get_gdt(vcpu, &dt);
7123         sregs->gdt.limit = dt.size;
7124         sregs->gdt.base = dt.address;
7125
7126         sregs->cr0 = kvm_read_cr0(vcpu);
7127         sregs->cr2 = vcpu->arch.cr2;
7128         sregs->cr3 = kvm_read_cr3(vcpu);
7129         sregs->cr4 = kvm_read_cr4(vcpu);
7130         sregs->cr8 = kvm_get_cr8(vcpu);
7131         sregs->efer = vcpu->arch.efer;
7132         sregs->apic_base = kvm_get_apic_base(vcpu);
7133
7134         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
7135
7136         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
7137                 set_bit(vcpu->arch.interrupt.nr,
7138                         (unsigned long *)sregs->interrupt_bitmap);
7139
7140         return 0;
7141 }
7142
7143 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
7144                                     struct kvm_mp_state *mp_state)
7145 {
7146         kvm_apic_accept_events(vcpu);
7147         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
7148                                         vcpu->arch.pv.pv_unhalted)
7149                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
7150         else
7151                 mp_state->mp_state = vcpu->arch.mp_state;
7152
7153         return 0;
7154 }
7155
7156 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
7157                                     struct kvm_mp_state *mp_state)
7158 {
7159         if (!lapic_in_kernel(vcpu) &&
7160             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
7161                 return -EINVAL;
7162
7163         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
7164                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
7165                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
7166         } else
7167                 vcpu->arch.mp_state = mp_state->mp_state;
7168         kvm_make_request(KVM_REQ_EVENT, vcpu);
7169         return 0;
7170 }
7171
7172 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
7173                     int reason, bool has_error_code, u32 error_code)
7174 {
7175         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
7176         int ret;
7177
7178         init_emulate_ctxt(vcpu);
7179
7180         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
7181                                    has_error_code, error_code);
7182
7183         if (ret)
7184                 return EMULATE_FAIL;
7185
7186         kvm_rip_write(vcpu, ctxt->eip);
7187         kvm_set_rflags(vcpu, ctxt->eflags);
7188         kvm_make_request(KVM_REQ_EVENT, vcpu);
7189         return EMULATE_DONE;
7190 }
7191 EXPORT_SYMBOL_GPL(kvm_task_switch);
7192
7193 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
7194                                   struct kvm_sregs *sregs)
7195 {
7196         struct msr_data apic_base_msr;
7197         int mmu_reset_needed = 0;
7198         int pending_vec, max_bits, idx;
7199         struct desc_ptr dt;
7200
7201         if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
7202                 return -EINVAL;
7203
7204         dt.size = sregs->idt.limit;
7205         dt.address = sregs->idt.base;
7206         kvm_x86_ops->set_idt(vcpu, &dt);
7207         dt.size = sregs->gdt.limit;
7208         dt.address = sregs->gdt.base;
7209         kvm_x86_ops->set_gdt(vcpu, &dt);
7210
7211         vcpu->arch.cr2 = sregs->cr2;
7212         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
7213         vcpu->arch.cr3 = sregs->cr3;
7214         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
7215
7216         kvm_set_cr8(vcpu, sregs->cr8);
7217
7218         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
7219         kvm_x86_ops->set_efer(vcpu, sregs->efer);
7220         apic_base_msr.data = sregs->apic_base;
7221         apic_base_msr.host_initiated = true;
7222         kvm_set_apic_base(vcpu, &apic_base_msr);
7223
7224         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
7225         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
7226         vcpu->arch.cr0 = sregs->cr0;
7227
7228         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
7229         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
7230         if (sregs->cr4 & (X86_CR4_OSXSAVE | X86_CR4_PKE))
7231                 kvm_update_cpuid(vcpu);
7232
7233         idx = srcu_read_lock(&vcpu->kvm->srcu);
7234         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
7235                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
7236                 mmu_reset_needed = 1;
7237         }
7238         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7239
7240         if (mmu_reset_needed)
7241                 kvm_mmu_reset_context(vcpu);
7242
7243         max_bits = KVM_NR_INTERRUPTS;
7244         pending_vec = find_first_bit(
7245                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
7246         if (pending_vec < max_bits) {
7247                 kvm_queue_interrupt(vcpu, pending_vec, false);
7248                 pr_debug("Set back pending irq %d\n", pending_vec);
7249         }
7250
7251         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7252         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7253         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7254         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7255         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7256         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7257
7258         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7259         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7260
7261         update_cr8_intercept(vcpu);
7262
7263         /* Older userspace won't unhalt the vcpu on reset. */
7264         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
7265             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
7266             !is_protmode(vcpu))
7267                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7268
7269         kvm_make_request(KVM_REQ_EVENT, vcpu);
7270
7271         return 0;
7272 }
7273
7274 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
7275                                         struct kvm_guest_debug *dbg)
7276 {
7277         unsigned long rflags;
7278         int i, r;
7279
7280         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
7281                 r = -EBUSY;
7282                 if (vcpu->arch.exception.pending)
7283                         goto out;
7284                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
7285                         kvm_queue_exception(vcpu, DB_VECTOR);
7286                 else
7287                         kvm_queue_exception(vcpu, BP_VECTOR);
7288         }
7289
7290         /*
7291          * Read rflags as long as potentially injected trace flags are still
7292          * filtered out.
7293          */
7294         rflags = kvm_get_rflags(vcpu);
7295
7296         vcpu->guest_debug = dbg->control;
7297         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
7298                 vcpu->guest_debug = 0;
7299
7300         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
7301                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
7302                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
7303                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
7304         } else {
7305                 for (i = 0; i < KVM_NR_DB_REGS; i++)
7306                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
7307         }
7308         kvm_update_dr7(vcpu);
7309
7310         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7311                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
7312                         get_segment_base(vcpu, VCPU_SREG_CS);
7313
7314         /*
7315          * Trigger an rflags update that will inject or remove the trace
7316          * flags.
7317          */
7318         kvm_set_rflags(vcpu, rflags);
7319
7320         kvm_x86_ops->update_bp_intercept(vcpu);
7321
7322         r = 0;
7323
7324 out:
7325
7326         return r;
7327 }
7328
7329 /*
7330  * Translate a guest virtual address to a guest physical address.
7331  */
7332 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
7333                                     struct kvm_translation *tr)
7334 {
7335         unsigned long vaddr = tr->linear_address;
7336         gpa_t gpa;
7337         int idx;
7338
7339         idx = srcu_read_lock(&vcpu->kvm->srcu);
7340         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
7341         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7342         tr->physical_address = gpa;
7343         tr->valid = gpa != UNMAPPED_GVA;
7344         tr->writeable = 1;
7345         tr->usermode = 0;
7346
7347         return 0;
7348 }
7349
7350 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7351 {
7352         struct fxregs_state *fxsave =
7353                         &vcpu->arch.guest_fpu.state.fxsave;
7354
7355         memcpy(fpu->fpr, fxsave->st_space, 128);
7356         fpu->fcw = fxsave->cwd;
7357         fpu->fsw = fxsave->swd;
7358         fpu->ftwx = fxsave->twd;
7359         fpu->last_opcode = fxsave->fop;
7360         fpu->last_ip = fxsave->rip;
7361         fpu->last_dp = fxsave->rdp;
7362         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
7363
7364         return 0;
7365 }
7366
7367 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7368 {
7369         struct fxregs_state *fxsave =
7370                         &vcpu->arch.guest_fpu.state.fxsave;
7371
7372         memcpy(fxsave->st_space, fpu->fpr, 128);
7373         fxsave->cwd = fpu->fcw;
7374         fxsave->swd = fpu->fsw;
7375         fxsave->twd = fpu->ftwx;
7376         fxsave->fop = fpu->last_opcode;
7377         fxsave->rip = fpu->last_ip;
7378         fxsave->rdp = fpu->last_dp;
7379         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
7380
7381         return 0;
7382 }
7383
7384 static void fx_init(struct kvm_vcpu *vcpu)
7385 {
7386         fpstate_init(&vcpu->arch.guest_fpu.state);
7387         if (boot_cpu_has(X86_FEATURE_XSAVES))
7388                 vcpu->arch.guest_fpu.state.xsave.header.xcomp_bv =
7389                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
7390
7391         /*
7392          * Ensure guest xcr0 is valid for loading
7393          */
7394         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
7395
7396         vcpu->arch.cr0 |= X86_CR0_ET;
7397 }
7398
7399 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
7400 {
7401         if (vcpu->guest_fpu_loaded)
7402                 return;
7403
7404         /*
7405          * Restore all possible states in the guest,
7406          * and assume host would use all available bits.
7407          * Guest xcr0 would be loaded later.
7408          */
7409         vcpu->guest_fpu_loaded = 1;
7410         __kernel_fpu_begin();
7411         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu.state);
7412         trace_kvm_fpu(1);
7413 }
7414
7415 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
7416 {
7417         if (!vcpu->guest_fpu_loaded) {
7418                 vcpu->fpu_counter = 0;
7419                 return;
7420         }
7421
7422         vcpu->guest_fpu_loaded = 0;
7423         copy_fpregs_to_fpstate(&vcpu->arch.guest_fpu);
7424         __kernel_fpu_end();
7425         ++vcpu->stat.fpu_reload;
7426         /*
7427          * If using eager FPU mode, or if the guest is a frequent user
7428          * of the FPU, just leave the FPU active for next time.
7429          * Every 255 times fpu_counter rolls over to 0; a guest that uses
7430          * the FPU in bursts will revert to loading it on demand.
7431          */
7432         if (!use_eager_fpu()) {
7433                 if (++vcpu->fpu_counter < 5)
7434                         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
7435         }
7436         trace_kvm_fpu(0);
7437 }
7438
7439 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
7440 {
7441         void *wbinvd_dirty_mask = vcpu->arch.wbinvd_dirty_mask;
7442
7443         kvmclock_reset(vcpu);
7444
7445         kvm_x86_ops->vcpu_free(vcpu);
7446         free_cpumask_var(wbinvd_dirty_mask);
7447 }
7448
7449 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
7450                                                 unsigned int id)
7451 {
7452         struct kvm_vcpu *vcpu;
7453
7454         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
7455                 printk_once(KERN_WARNING
7456                 "kvm: SMP vm created on host with unstable TSC; "
7457                 "guest TSC will not be reliable\n");
7458
7459         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
7460
7461         return vcpu;
7462 }
7463
7464 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
7465 {
7466         int r;
7467
7468         kvm_vcpu_mtrr_init(vcpu);
7469         r = vcpu_load(vcpu);
7470         if (r)
7471                 return r;
7472         kvm_vcpu_reset(vcpu, false);
7473         kvm_mmu_setup(vcpu);
7474         vcpu_put(vcpu);
7475         return r;
7476 }
7477
7478 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
7479 {
7480         struct msr_data msr;
7481         struct kvm *kvm = vcpu->kvm;
7482
7483         if (vcpu_load(vcpu))
7484                 return;
7485         msr.data = 0x0;
7486         msr.index = MSR_IA32_TSC;
7487         msr.host_initiated = true;
7488         kvm_write_tsc(vcpu, &msr);
7489         vcpu_put(vcpu);
7490
7491         if (!kvmclock_periodic_sync)
7492                 return;
7493
7494         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
7495                                         KVMCLOCK_SYNC_PERIOD);
7496 }
7497
7498 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
7499 {
7500         int r;
7501         vcpu->arch.apf.msr_val = 0;
7502
7503         r = vcpu_load(vcpu);
7504         BUG_ON(r);
7505         kvm_mmu_unload(vcpu);
7506         vcpu_put(vcpu);
7507
7508         kvm_x86_ops->vcpu_free(vcpu);
7509 }
7510
7511 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
7512 {
7513         vcpu->arch.hflags = 0;
7514
7515         vcpu->arch.smi_pending = 0;
7516         atomic_set(&vcpu->arch.nmi_queued, 0);
7517         vcpu->arch.nmi_pending = 0;
7518         vcpu->arch.nmi_injected = false;
7519         kvm_clear_interrupt_queue(vcpu);
7520         kvm_clear_exception_queue(vcpu);
7521
7522         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
7523         kvm_update_dr0123(vcpu);
7524         vcpu->arch.dr6 = DR6_INIT;
7525         kvm_update_dr6(vcpu);
7526         vcpu->arch.dr7 = DR7_FIXED_1;
7527         kvm_update_dr7(vcpu);
7528
7529         vcpu->arch.cr2 = 0;
7530
7531         kvm_make_request(KVM_REQ_EVENT, vcpu);
7532         vcpu->arch.apf.msr_val = 0;
7533         vcpu->arch.st.msr_val = 0;
7534
7535         kvmclock_reset(vcpu);
7536
7537         kvm_clear_async_pf_completion_queue(vcpu);
7538         kvm_async_pf_hash_reset(vcpu);
7539         vcpu->arch.apf.halted = false;
7540
7541         if (!init_event) {
7542                 kvm_pmu_reset(vcpu);
7543                 vcpu->arch.smbase = 0x30000;
7544         }
7545
7546         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
7547         vcpu->arch.regs_avail = ~0;
7548         vcpu->arch.regs_dirty = ~0;
7549
7550         kvm_x86_ops->vcpu_reset(vcpu, init_event);
7551 }
7552
7553 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
7554 {
7555         struct kvm_segment cs;
7556
7557         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7558         cs.selector = vector << 8;
7559         cs.base = vector << 12;
7560         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7561         kvm_rip_write(vcpu, 0);
7562 }
7563
7564 int kvm_arch_hardware_enable(void)
7565 {
7566         struct kvm *kvm;
7567         struct kvm_vcpu *vcpu;
7568         int i;
7569         int ret;
7570         u64 local_tsc;
7571         u64 max_tsc = 0;
7572         bool stable, backwards_tsc = false;
7573
7574         kvm_shared_msr_cpu_online();
7575         ret = kvm_x86_ops->hardware_enable();
7576         if (ret != 0)
7577                 return ret;
7578
7579         local_tsc = rdtsc();
7580         stable = !check_tsc_unstable();
7581         list_for_each_entry(kvm, &vm_list, vm_list) {
7582                 kvm_for_each_vcpu(i, vcpu, kvm) {
7583                         if (!stable && vcpu->cpu == smp_processor_id())
7584                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7585                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
7586                                 backwards_tsc = true;
7587                                 if (vcpu->arch.last_host_tsc > max_tsc)
7588                                         max_tsc = vcpu->arch.last_host_tsc;
7589                         }
7590                 }
7591         }
7592
7593         /*
7594          * Sometimes, even reliable TSCs go backwards.  This happens on
7595          * platforms that reset TSC during suspend or hibernate actions, but
7596          * maintain synchronization.  We must compensate.  Fortunately, we can
7597          * detect that condition here, which happens early in CPU bringup,
7598          * before any KVM threads can be running.  Unfortunately, we can't
7599          * bring the TSCs fully up to date with real time, as we aren't yet far
7600          * enough into CPU bringup that we know how much real time has actually
7601          * elapsed; our helper function, ktime_get_boot_ns() will be using boot
7602          * variables that haven't been updated yet.
7603          *
7604          * So we simply find the maximum observed TSC above, then record the
7605          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
7606          * the adjustment will be applied.  Note that we accumulate
7607          * adjustments, in case multiple suspend cycles happen before some VCPU
7608          * gets a chance to run again.  In the event that no KVM threads get a
7609          * chance to run, we will miss the entire elapsed period, as we'll have
7610          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7611          * loose cycle time.  This isn't too big a deal, since the loss will be
7612          * uniform across all VCPUs (not to mention the scenario is extremely
7613          * unlikely). It is possible that a second hibernate recovery happens
7614          * much faster than a first, causing the observed TSC here to be
7615          * smaller; this would require additional padding adjustment, which is
7616          * why we set last_host_tsc to the local tsc observed here.
7617          *
7618          * N.B. - this code below runs only on platforms with reliable TSC,
7619          * as that is the only way backwards_tsc is set above.  Also note
7620          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7621          * have the same delta_cyc adjustment applied if backwards_tsc
7622          * is detected.  Note further, this adjustment is only done once,
7623          * as we reset last_host_tsc on all VCPUs to stop this from being
7624          * called multiple times (one for each physical CPU bringup).
7625          *
7626          * Platforms with unreliable TSCs don't have to deal with this, they
7627          * will be compensated by the logic in vcpu_load, which sets the TSC to
7628          * catchup mode.  This will catchup all VCPUs to real time, but cannot
7629          * guarantee that they stay in perfect synchronization.
7630          */
7631         if (backwards_tsc) {
7632                 u64 delta_cyc = max_tsc - local_tsc;
7633                 backwards_tsc_observed = true;
7634                 list_for_each_entry(kvm, &vm_list, vm_list) {
7635                         kvm_for_each_vcpu(i, vcpu, kvm) {
7636                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
7637                                 vcpu->arch.last_host_tsc = local_tsc;
7638                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7639                         }
7640
7641                         /*
7642                          * We have to disable TSC offset matching.. if you were
7643                          * booting a VM while issuing an S4 host suspend....
7644                          * you may have some problem.  Solving this issue is
7645                          * left as an exercise to the reader.
7646                          */
7647                         kvm->arch.last_tsc_nsec = 0;
7648                         kvm->arch.last_tsc_write = 0;
7649                 }
7650
7651         }
7652         return 0;
7653 }
7654
7655 void kvm_arch_hardware_disable(void)
7656 {
7657         kvm_x86_ops->hardware_disable();
7658         drop_user_return_notifiers();
7659 }
7660
7661 int kvm_arch_hardware_setup(void)
7662 {
7663         int r;
7664
7665         r = kvm_x86_ops->hardware_setup();
7666         if (r != 0)
7667                 return r;
7668
7669         if (kvm_has_tsc_control) {
7670                 /*
7671                  * Make sure the user can only configure tsc_khz values that
7672                  * fit into a signed integer.
7673                  * A min value is not calculated needed because it will always
7674                  * be 1 on all machines.
7675                  */
7676                 u64 max = min(0x7fffffffULL,
7677                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
7678                 kvm_max_guest_tsc_khz = max;
7679
7680                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
7681         }
7682
7683         kvm_init_msr_list();
7684         return 0;
7685 }
7686
7687 void kvm_arch_hardware_unsetup(void)
7688 {
7689         kvm_x86_ops->hardware_unsetup();
7690 }
7691
7692 void kvm_arch_check_processor_compat(void *rtn)
7693 {
7694         kvm_x86_ops->check_processor_compatibility(rtn);
7695 }
7696
7697 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
7698 {
7699         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
7700 }
7701 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
7702
7703 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
7704 {
7705         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
7706 }
7707
7708 struct static_key kvm_no_apic_vcpu __read_mostly;
7709 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu);
7710
7711 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
7712 {
7713         struct page *page;
7714         struct kvm *kvm;
7715         int r;
7716
7717         BUG_ON(vcpu->kvm == NULL);
7718         kvm = vcpu->kvm;
7719
7720         vcpu->arch.apicv_active = kvm_x86_ops->get_enable_apicv();
7721         vcpu->arch.pv.pv_unhalted = false;
7722         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
7723         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_reset_bsp(vcpu))
7724                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7725         else
7726                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
7727
7728         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
7729         if (!page) {
7730                 r = -ENOMEM;
7731                 goto fail;
7732         }
7733         vcpu->arch.pio_data = page_address(page);
7734
7735         kvm_set_tsc_khz(vcpu, max_tsc_khz);
7736
7737         r = kvm_mmu_create(vcpu);
7738         if (r < 0)
7739                 goto fail_free_pio_data;
7740
7741         if (irqchip_in_kernel(kvm)) {
7742                 r = kvm_create_lapic(vcpu);
7743                 if (r < 0)
7744                         goto fail_mmu_destroy;
7745         } else
7746                 static_key_slow_inc(&kvm_no_apic_vcpu);
7747
7748         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
7749                                        GFP_KERNEL);
7750         if (!vcpu->arch.mce_banks) {
7751                 r = -ENOMEM;
7752                 goto fail_free_lapic;
7753         }
7754         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
7755
7756         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
7757                 r = -ENOMEM;
7758                 goto fail_free_mce_banks;
7759         }
7760
7761         fx_init(vcpu);
7762
7763         vcpu->arch.ia32_tsc_adjust_msr = 0x0;
7764         vcpu->arch.pv_time_enabled = false;
7765
7766         vcpu->arch.guest_supported_xcr0 = 0;
7767         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
7768
7769         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
7770
7771         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
7772
7773         kvm_async_pf_hash_reset(vcpu);
7774         kvm_pmu_init(vcpu);
7775
7776         vcpu->arch.pending_external_vector = -1;
7777
7778         kvm_hv_vcpu_init(vcpu);
7779
7780         return 0;
7781
7782 fail_free_mce_banks:
7783         kfree(vcpu->arch.mce_banks);
7784 fail_free_lapic:
7785         kvm_free_lapic(vcpu);
7786 fail_mmu_destroy:
7787         kvm_mmu_destroy(vcpu);
7788 fail_free_pio_data:
7789         free_page((unsigned long)vcpu->arch.pio_data);
7790 fail:
7791         return r;
7792 }
7793
7794 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
7795 {
7796         int idx;
7797
7798         kvm_hv_vcpu_uninit(vcpu);
7799         kvm_pmu_destroy(vcpu);
7800         kfree(vcpu->arch.mce_banks);
7801         kvm_free_lapic(vcpu);
7802         idx = srcu_read_lock(&vcpu->kvm->srcu);
7803         kvm_mmu_destroy(vcpu);
7804         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7805         free_page((unsigned long)vcpu->arch.pio_data);
7806         if (!lapic_in_kernel(vcpu))
7807                 static_key_slow_dec(&kvm_no_apic_vcpu);
7808 }
7809
7810 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
7811 {
7812         kvm_x86_ops->sched_in(vcpu, cpu);
7813 }
7814
7815 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
7816 {
7817         if (type)
7818                 return -EINVAL;
7819
7820         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
7821         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
7822         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
7823         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
7824         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
7825
7826         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7827         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
7828         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7829         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
7830                 &kvm->arch.irq_sources_bitmap);
7831
7832         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
7833         mutex_init(&kvm->arch.apic_map_lock);
7834         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
7835
7836         kvm->arch.kvmclock_offset = -ktime_get_boot_ns();
7837         pvclock_update_vm_gtod_copy(kvm);
7838
7839         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
7840         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
7841
7842         kvm_page_track_init(kvm);
7843         kvm_mmu_init_vm(kvm);
7844
7845         if (kvm_x86_ops->vm_init)
7846                 return kvm_x86_ops->vm_init(kvm);
7847
7848         return 0;
7849 }
7850
7851 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
7852 {
7853         int r;
7854         r = vcpu_load(vcpu);
7855         BUG_ON(r);
7856         kvm_mmu_unload(vcpu);
7857         vcpu_put(vcpu);
7858 }
7859
7860 static void kvm_free_vcpus(struct kvm *kvm)
7861 {
7862         unsigned int i;
7863         struct kvm_vcpu *vcpu;
7864
7865         /*
7866          * Unpin any mmu pages first.
7867          */
7868         kvm_for_each_vcpu(i, vcpu, kvm) {
7869                 kvm_clear_async_pf_completion_queue(vcpu);
7870                 kvm_unload_vcpu_mmu(vcpu);
7871         }
7872         kvm_for_each_vcpu(i, vcpu, kvm)
7873                 kvm_arch_vcpu_free(vcpu);
7874
7875         mutex_lock(&kvm->lock);
7876         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
7877                 kvm->vcpus[i] = NULL;
7878
7879         atomic_set(&kvm->online_vcpus, 0);
7880         mutex_unlock(&kvm->lock);
7881 }
7882
7883 void kvm_arch_sync_events(struct kvm *kvm)
7884 {
7885         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
7886         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
7887         kvm_free_all_assigned_devices(kvm);
7888         kvm_free_pit(kvm);
7889 }
7890
7891 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
7892 {
7893         int i, r;
7894         unsigned long hva;
7895         struct kvm_memslots *slots = kvm_memslots(kvm);
7896         struct kvm_memory_slot *slot, old;
7897
7898         /* Called with kvm->slots_lock held.  */
7899         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
7900                 return -EINVAL;
7901
7902         slot = id_to_memslot(slots, id);
7903         if (size) {
7904                 if (slot->npages)
7905                         return -EEXIST;
7906
7907                 /*
7908                  * MAP_SHARED to prevent internal slot pages from being moved
7909                  * by fork()/COW.
7910                  */
7911                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
7912                               MAP_SHARED | MAP_ANONYMOUS, 0);
7913                 if (IS_ERR((void *)hva))
7914                         return PTR_ERR((void *)hva);
7915         } else {
7916                 if (!slot->npages)
7917                         return 0;
7918
7919                 hva = 0;
7920         }
7921
7922         old = *slot;
7923         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
7924                 struct kvm_userspace_memory_region m;
7925
7926                 m.slot = id | (i << 16);
7927                 m.flags = 0;
7928                 m.guest_phys_addr = gpa;
7929                 m.userspace_addr = hva;
7930                 m.memory_size = size;
7931                 r = __kvm_set_memory_region(kvm, &m);
7932                 if (r < 0)
7933                         return r;
7934         }
7935
7936         if (!size) {
7937                 r = vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
7938                 WARN_ON(r < 0);
7939         }
7940
7941         return 0;
7942 }
7943 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
7944
7945 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
7946 {
7947         int r;
7948
7949         mutex_lock(&kvm->slots_lock);
7950         r = __x86_set_memory_region(kvm, id, gpa, size);
7951         mutex_unlock(&kvm->slots_lock);
7952
7953         return r;
7954 }
7955 EXPORT_SYMBOL_GPL(x86_set_memory_region);
7956
7957 void kvm_arch_destroy_vm(struct kvm *kvm)
7958 {
7959         if (current->mm == kvm->mm) {
7960                 /*
7961                  * Free memory regions allocated on behalf of userspace,
7962                  * unless the the memory map has changed due to process exit
7963                  * or fd copying.
7964                  */
7965                 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
7966                 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
7967                 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
7968         }
7969         if (kvm_x86_ops->vm_destroy)
7970                 kvm_x86_ops->vm_destroy(kvm);
7971         kvm_iommu_unmap_guest(kvm);
7972         kfree(kvm->arch.vpic);
7973         kfree(kvm->arch.vioapic);
7974         kvm_free_vcpus(kvm);
7975         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
7976         kvm_mmu_uninit_vm(kvm);
7977 }
7978
7979 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
7980                            struct kvm_memory_slot *dont)
7981 {
7982         int i;
7983
7984         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7985                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
7986                         kvfree(free->arch.rmap[i]);
7987                         free->arch.rmap[i] = NULL;
7988                 }
7989                 if (i == 0)
7990                         continue;
7991
7992                 if (!dont || free->arch.lpage_info[i - 1] !=
7993                              dont->arch.lpage_info[i - 1]) {
7994                         kvfree(free->arch.lpage_info[i - 1]);
7995                         free->arch.lpage_info[i - 1] = NULL;
7996                 }
7997         }
7998
7999         kvm_page_track_free_memslot(free, dont);
8000 }
8001
8002 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
8003                             unsigned long npages)
8004 {
8005         int i;
8006
8007         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8008                 struct kvm_lpage_info *linfo;
8009                 unsigned long ugfn;
8010                 int lpages;
8011                 int level = i + 1;
8012
8013                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
8014                                       slot->base_gfn, level) + 1;
8015
8016                 slot->arch.rmap[i] =
8017                         kvm_kvzalloc(lpages * sizeof(*slot->arch.rmap[i]));
8018                 if (!slot->arch.rmap[i])
8019                         goto out_free;
8020                 if (i == 0)
8021                         continue;
8022
8023                 linfo = kvm_kvzalloc(lpages * sizeof(*linfo));
8024                 if (!linfo)
8025                         goto out_free;
8026
8027                 slot->arch.lpage_info[i - 1] = linfo;
8028
8029                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
8030                         linfo[0].disallow_lpage = 1;
8031                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
8032                         linfo[lpages - 1].disallow_lpage = 1;
8033                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
8034                 /*
8035                  * If the gfn and userspace address are not aligned wrt each
8036                  * other, or if explicitly asked to, disable large page
8037                  * support for this slot
8038                  */
8039                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
8040                     !kvm_largepages_enabled()) {
8041                         unsigned long j;
8042
8043                         for (j = 0; j < lpages; ++j)
8044                                 linfo[j].disallow_lpage = 1;
8045                 }
8046         }
8047
8048         if (kvm_page_track_create_memslot(slot, npages))
8049                 goto out_free;
8050
8051         return 0;
8052
8053 out_free:
8054         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8055                 kvfree(slot->arch.rmap[i]);
8056                 slot->arch.rmap[i] = NULL;
8057                 if (i == 0)
8058                         continue;
8059
8060                 kvfree(slot->arch.lpage_info[i - 1]);
8061                 slot->arch.lpage_info[i - 1] = NULL;
8062         }
8063         return -ENOMEM;
8064 }
8065
8066 void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
8067 {
8068         /*
8069          * memslots->generation has been incremented.
8070          * mmio generation may have reached its maximum value.
8071          */
8072         kvm_mmu_invalidate_mmio_sptes(kvm, slots);
8073 }
8074
8075 int kvm_arch_prepare_memory_region(struct kvm *kvm,
8076                                 struct kvm_memory_slot *memslot,
8077                                 const struct kvm_userspace_memory_region *mem,
8078                                 enum kvm_mr_change change)
8079 {
8080         return 0;
8081 }
8082
8083 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
8084                                      struct kvm_memory_slot *new)
8085 {
8086         /* Still write protect RO slot */
8087         if (new->flags & KVM_MEM_READONLY) {
8088                 kvm_mmu_slot_remove_write_access(kvm, new);
8089                 return;
8090         }
8091
8092         /*
8093          * Call kvm_x86_ops dirty logging hooks when they are valid.
8094          *
8095          * kvm_x86_ops->slot_disable_log_dirty is called when:
8096          *
8097          *  - KVM_MR_CREATE with dirty logging is disabled
8098          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
8099          *
8100          * The reason is, in case of PML, we need to set D-bit for any slots
8101          * with dirty logging disabled in order to eliminate unnecessary GPA
8102          * logging in PML buffer (and potential PML buffer full VMEXT). This
8103          * guarantees leaving PML enabled during guest's lifetime won't have
8104          * any additonal overhead from PML when guest is running with dirty
8105          * logging disabled for memory slots.
8106          *
8107          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
8108          * to dirty logging mode.
8109          *
8110          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
8111          *
8112          * In case of write protect:
8113          *
8114          * Write protect all pages for dirty logging.
8115          *
8116          * All the sptes including the large sptes which point to this
8117          * slot are set to readonly. We can not create any new large
8118          * spte on this slot until the end of the logging.
8119          *
8120          * See the comments in fast_page_fault().
8121          */
8122         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
8123                 if (kvm_x86_ops->slot_enable_log_dirty)
8124                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
8125                 else
8126                         kvm_mmu_slot_remove_write_access(kvm, new);
8127         } else {
8128                 if (kvm_x86_ops->slot_disable_log_dirty)
8129                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
8130         }
8131 }
8132
8133 void kvm_arch_commit_memory_region(struct kvm *kvm,
8134                                 const struct kvm_userspace_memory_region *mem,
8135                                 const struct kvm_memory_slot *old,
8136                                 const struct kvm_memory_slot *new,
8137                                 enum kvm_mr_change change)
8138 {
8139         int nr_mmu_pages = 0;
8140
8141         if (!kvm->arch.n_requested_mmu_pages)
8142                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
8143
8144         if (nr_mmu_pages)
8145                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
8146
8147         /*
8148          * Dirty logging tracks sptes in 4k granularity, meaning that large
8149          * sptes have to be split.  If live migration is successful, the guest
8150          * in the source machine will be destroyed and large sptes will be
8151          * created in the destination. However, if the guest continues to run
8152          * in the source machine (for example if live migration fails), small
8153          * sptes will remain around and cause bad performance.
8154          *
8155          * Scan sptes if dirty logging has been stopped, dropping those
8156          * which can be collapsed into a single large-page spte.  Later
8157          * page faults will create the large-page sptes.
8158          */
8159         if ((change != KVM_MR_DELETE) &&
8160                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
8161                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
8162                 kvm_mmu_zap_collapsible_sptes(kvm, new);
8163
8164         /*
8165          * Set up write protection and/or dirty logging for the new slot.
8166          *
8167          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
8168          * been zapped so no dirty logging staff is needed for old slot. For
8169          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
8170          * new and it's also covered when dealing with the new slot.
8171          *
8172          * FIXME: const-ify all uses of struct kvm_memory_slot.
8173          */
8174         if (change != KVM_MR_DELETE)
8175                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
8176 }
8177
8178 void kvm_arch_flush_shadow_all(struct kvm *kvm)
8179 {
8180         kvm_mmu_invalidate_zap_all_pages(kvm);
8181 }
8182
8183 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
8184                                    struct kvm_memory_slot *slot)
8185 {
8186         kvm_mmu_invalidate_zap_all_pages(kvm);
8187 }
8188
8189 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
8190 {
8191         if (!list_empty_careful(&vcpu->async_pf.done))
8192                 return true;
8193
8194         if (kvm_apic_has_events(vcpu))
8195                 return true;
8196
8197         if (vcpu->arch.pv.pv_unhalted)
8198                 return true;
8199
8200         if (atomic_read(&vcpu->arch.nmi_queued))
8201                 return true;
8202
8203         if (test_bit(KVM_REQ_SMI, &vcpu->requests))
8204                 return true;
8205
8206         if (kvm_arch_interrupt_allowed(vcpu) &&
8207             kvm_cpu_has_interrupt(vcpu))
8208                 return true;
8209
8210         if (kvm_hv_has_stimer_pending(vcpu))
8211                 return true;
8212
8213         return false;
8214 }
8215
8216 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
8217 {
8218         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
8219                 kvm_x86_ops->check_nested_events(vcpu, false);
8220
8221         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
8222 }
8223
8224 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
8225 {
8226         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
8227 }
8228
8229 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
8230 {
8231         return kvm_x86_ops->interrupt_allowed(vcpu);
8232 }
8233
8234 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
8235 {
8236         if (is_64_bit_mode(vcpu))
8237                 return kvm_rip_read(vcpu);
8238         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
8239                      kvm_rip_read(vcpu));
8240 }
8241 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
8242
8243 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
8244 {
8245         return kvm_get_linear_rip(vcpu) == linear_rip;
8246 }
8247 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
8248
8249 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
8250 {
8251         unsigned long rflags;
8252
8253         rflags = kvm_x86_ops->get_rflags(vcpu);
8254         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8255                 rflags &= ~X86_EFLAGS_TF;
8256         return rflags;
8257 }
8258 EXPORT_SYMBOL_GPL(kvm_get_rflags);
8259
8260 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8261 {
8262         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
8263             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
8264                 rflags |= X86_EFLAGS_TF;
8265         kvm_x86_ops->set_rflags(vcpu, rflags);
8266 }
8267
8268 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8269 {
8270         __kvm_set_rflags(vcpu, rflags);
8271         kvm_make_request(KVM_REQ_EVENT, vcpu);
8272 }
8273 EXPORT_SYMBOL_GPL(kvm_set_rflags);
8274
8275 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
8276 {
8277         int r;
8278
8279         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
8280               work->wakeup_all)
8281                 return;
8282
8283         r = kvm_mmu_reload(vcpu);
8284         if (unlikely(r))
8285                 return;
8286
8287         if (!vcpu->arch.mmu.direct_map &&
8288               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
8289                 return;
8290
8291         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
8292 }
8293
8294 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
8295 {
8296         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
8297 }
8298
8299 static inline u32 kvm_async_pf_next_probe(u32 key)
8300 {
8301         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
8302 }
8303
8304 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8305 {
8306         u32 key = kvm_async_pf_hash_fn(gfn);
8307
8308         while (vcpu->arch.apf.gfns[key] != ~0)
8309                 key = kvm_async_pf_next_probe(key);
8310
8311         vcpu->arch.apf.gfns[key] = gfn;
8312 }
8313
8314 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
8315 {
8316         int i;
8317         u32 key = kvm_async_pf_hash_fn(gfn);
8318
8319         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
8320                      (vcpu->arch.apf.gfns[key] != gfn &&
8321                       vcpu->arch.apf.gfns[key] != ~0); i++)
8322                 key = kvm_async_pf_next_probe(key);
8323
8324         return key;
8325 }
8326
8327 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8328 {
8329         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
8330 }
8331
8332 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8333 {
8334         u32 i, j, k;
8335
8336         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
8337         while (true) {
8338                 vcpu->arch.apf.gfns[i] = ~0;
8339                 do {
8340                         j = kvm_async_pf_next_probe(j);
8341                         if (vcpu->arch.apf.gfns[j] == ~0)
8342                                 return;
8343                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
8344                         /*
8345                          * k lies cyclically in ]i,j]
8346                          * |    i.k.j |
8347                          * |....j i.k.| or  |.k..j i...|
8348                          */
8349                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
8350                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
8351                 i = j;
8352         }
8353 }
8354
8355 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
8356 {
8357
8358         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
8359                                       sizeof(val));
8360 }
8361
8362 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
8363                                      struct kvm_async_pf *work)
8364 {
8365         struct x86_exception fault;
8366
8367         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
8368         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
8369
8370         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
8371             (vcpu->arch.apf.send_user_only &&
8372              kvm_x86_ops->get_cpl(vcpu) == 0))
8373                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
8374         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
8375                 fault.vector = PF_VECTOR;
8376                 fault.error_code_valid = true;
8377                 fault.error_code = 0;
8378                 fault.nested_page_fault = false;
8379                 fault.address = work->arch.token;
8380                 kvm_inject_page_fault(vcpu, &fault);
8381         }
8382 }
8383
8384 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
8385                                  struct kvm_async_pf *work)
8386 {
8387         struct x86_exception fault;
8388
8389         trace_kvm_async_pf_ready(work->arch.token, work->gva);
8390         if (work->wakeup_all)
8391                 work->arch.token = ~0; /* broadcast wakeup */
8392         else
8393                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
8394
8395         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
8396             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
8397                 fault.vector = PF_VECTOR;
8398                 fault.error_code_valid = true;
8399                 fault.error_code = 0;
8400                 fault.nested_page_fault = false;
8401                 fault.address = work->arch.token;
8402                 kvm_inject_page_fault(vcpu, &fault);
8403         }
8404         vcpu->arch.apf.halted = false;
8405         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8406 }
8407
8408 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
8409 {
8410         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
8411                 return true;
8412         else
8413                 return !kvm_event_needs_reinjection(vcpu) &&
8414                         kvm_x86_ops->interrupt_allowed(vcpu);
8415 }
8416
8417 void kvm_arch_start_assignment(struct kvm *kvm)
8418 {
8419         atomic_inc(&kvm->arch.assigned_device_count);
8420 }
8421 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
8422
8423 void kvm_arch_end_assignment(struct kvm *kvm)
8424 {
8425         atomic_dec(&kvm->arch.assigned_device_count);
8426 }
8427 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
8428
8429 bool kvm_arch_has_assigned_device(struct kvm *kvm)
8430 {
8431         return atomic_read(&kvm->arch.assigned_device_count);
8432 }
8433 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
8434
8435 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
8436 {
8437         atomic_inc(&kvm->arch.noncoherent_dma_count);
8438 }
8439 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
8440
8441 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
8442 {
8443         atomic_dec(&kvm->arch.noncoherent_dma_count);
8444 }
8445 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
8446
8447 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
8448 {
8449         return atomic_read(&kvm->arch.noncoherent_dma_count);
8450 }
8451 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
8452
8453 bool kvm_arch_has_irq_bypass(void)
8454 {
8455         return kvm_x86_ops->update_pi_irte != NULL;
8456 }
8457
8458 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
8459                                       struct irq_bypass_producer *prod)
8460 {
8461         struct kvm_kernel_irqfd *irqfd =
8462                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8463
8464         irqfd->producer = prod;
8465
8466         return kvm_x86_ops->update_pi_irte(irqfd->kvm,
8467                                            prod->irq, irqfd->gsi, 1);
8468 }
8469
8470 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
8471                                       struct irq_bypass_producer *prod)
8472 {
8473         int ret;
8474         struct kvm_kernel_irqfd *irqfd =
8475                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8476
8477         WARN_ON(irqfd->producer != prod);
8478         irqfd->producer = NULL;
8479
8480         /*
8481          * When producer of consumer is unregistered, we change back to
8482          * remapped mode, so we can re-use the current implementation
8483          * when the irq is masked/disabled or the consumer side (KVM
8484          * int this case doesn't want to receive the interrupts.
8485         */
8486         ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
8487         if (ret)
8488                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
8489                        " fails: %d\n", irqfd->consumer.token, ret);
8490 }
8491
8492 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
8493                                    uint32_t guest_irq, bool set)
8494 {
8495         if (!kvm_x86_ops->update_pi_irte)
8496                 return -EINVAL;
8497
8498         return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
8499 }
8500
8501 bool kvm_vector_hashing_enabled(void)
8502 {
8503         return vector_hashing;
8504 }
8505 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled);
8506
8507 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
8508 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
8509 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
8510 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
8511 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
8512 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
8513 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
8514 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
8515 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
8516 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
8517 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
8518 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
8519 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
8520 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
8521 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
8522 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
8523 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
8524 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
8525 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);