drivers/mtd/devices/m25p80.c

   1 /*
   2  * MTD SPI driver for ST M25Pxx (and similar) serial flash chips
   3  *
   4  * Author: Mike Lavender, mike@steroidmicros.com
   5  *
   6  * Copyright (c) 2005, Intec Automation Inc.
   7  *
   8  * Some parts are based on lart.c by Abraham Van Der Merwe
   9  *
  10  * Cleaned up and generalized based on mtd_dataflash.c
  11  *
  12  * This code is free software; you can redistribute it and/or modify
  13  * it under the terms of the GNU General Public License version 2 as
  14  * published by the Free Software Foundation.
  15  *
  16  */
  17
  18 #include <linux/err.h>
  19 #include <linux/errno.h>
  20 #include <linux/module.h>
  21 #include <linux/device.h>
  22
  23 #include <linux/mtd/mtd.h>
  24 #include <linux/mtd/partitions.h>
  25
  26 #include <linux/spi/spi.h>
  27 #include <linux/spi/spi-mem.h>
  28 #include <linux/spi/flash.h>
  29 #include <linux/mtd/spi-nor.h>
  30
  31 struct m25p {
  32         struct spi_mem          *spimem;
  33         struct spi_nor          spi_nor;
  34 };
  35
  36 static int m25p80_read_reg(struct spi_nor *nor, u8 code, u8 *val, int len)
  37 {
  38         struct m25p *flash = nor->priv;
  39         struct spi_mem_op op = SPI_MEM_OP(SPI_MEM_OP_CMD(code, 1),
  40                                           SPI_MEM_OP_NO_ADDR,
  41                                           SPI_MEM_OP_NO_DUMMY,
  42                                           SPI_MEM_OP_DATA_IN(len, NULL, 1));
  43         void *scratchbuf;
  44         int ret;
  45
  46         scratchbuf = kmalloc(len, GFP_KERNEL);
  47         if (!scratchbuf)
  48                 return -ENOMEM;
  49
  50         op.data.buf.in = scratchbuf;
  51         ret = spi_mem_exec_op(flash->spimem, &op);
  52         if (ret < 0)
  53                 dev_err(&flash->spimem->spi->dev, "error %d reading %x\n", ret,
  54                         code);
  55         else
  56                 memcpy(val, scratchbuf, len);
  57
  58         kfree(scratchbuf);
  59
  60         return ret;
  61 }
  62
  63 static int m25p80_write_reg(struct spi_nor *nor, u8 opcode, u8 *buf, int len)
  64 {
  65         struct m25p *flash = nor->priv;
  66         struct spi_mem_op op = SPI_MEM_OP(SPI_MEM_OP_CMD(opcode, 1),
  67                                           SPI_MEM_OP_NO_ADDR,
  68                                           SPI_MEM_OP_NO_DUMMY,
  69                                           SPI_MEM_OP_DATA_OUT(len, NULL, 1));
  70         void *scratchbuf;
  71         int ret;
  72
  73         scratchbuf = kmemdup(buf, len, GFP_KERNEL);
  74         if (!scratchbuf)
  75                 return -ENOMEM;
  76
  77         op.data.buf.out = scratchbuf;
  78         ret = spi_mem_exec_op(flash->spimem, &op);
  79         kfree(scratchbuf);
  80
  81         return ret;
  82 }
  83
  84 static ssize_t m25p80_write(struct spi_nor *nor, loff_t to, size_t len,
  85                             const u_char *buf)
  86 {
  87         struct m25p *flash = nor->priv;
  88         struct spi_mem_op op =
  89                         SPI_MEM_OP(SPI_MEM_OP_CMD(nor->program_opcode, 1),
  90                                    SPI_MEM_OP_ADDR(nor->addr_width, to, 1),
  91                                    SPI_MEM_OP_NO_DUMMY,
  92                                    SPI_MEM_OP_DATA_OUT(len, buf, 1));
  93         size_t remaining = len;
  94         int ret;
  95
  96         /* get transfer protocols. */
  97         op.cmd.buswidth = spi_nor_get_protocol_inst_nbits(nor->write_proto);
  98         op.addr.buswidth = spi_nor_get_protocol_addr_nbits(nor->write_proto);
  99         op.data.buswidth = spi_nor_get_protocol_data_nbits(nor->write_proto);
 100
 101         if (nor->program_opcode == SPINOR_OP_AAI_WP && nor->sst_write_second)
 102                 op.addr.nbytes = 0;
 103
 104         while (remaining) {
 105                 op.data.nbytes = remaining < UINT_MAX ? remaining : UINT_MAX;
 106                 ret = spi_mem_adjust_op_size(flash->spimem, &op);
 107                 if (ret)
 108                         return ret;
 109
 110                 ret = spi_mem_exec_op(flash->spimem, &op);
 111                 if (ret)
 112                         return ret;
 113
 114                 op.addr.val += op.data.nbytes;
 115                 remaining -= op.data.nbytes;
 116                 op.data.buf.out += op.data.nbytes;
 117         }
 118
 119         return len;
 120 }
 121
 122 /*
 123  * Read an address range from the nor chip.  The address range
 124  * may be any size provided it is within the physical boundaries.
 125  */
 126 static ssize_t m25p80_read(struct spi_nor *nor, loff_t from, size_t len,
 127                            u_char *buf)
 128 {
 129         struct m25p *flash = nor->priv;
 130         struct spi_mem_op op =
 131                         SPI_MEM_OP(SPI_MEM_OP_CMD(nor->read_opcode, 1),
 132                                    SPI_MEM_OP_ADDR(nor->addr_width, from, 1),
 133                                    SPI_MEM_OP_DUMMY(nor->read_dummy, 1),
 134                                    SPI_MEM_OP_DATA_IN(len, buf, 1));
 135         size_t remaining = len;
 136         int ret;
 137
 138         /* get transfer protocols. */
 139         op.cmd.buswidth = spi_nor_get_protocol_inst_nbits(nor->read_proto);
 140         op.addr.buswidth = spi_nor_get_protocol_addr_nbits(nor->read_proto);
 141         op.dummy.buswidth = op.addr.buswidth;
 142         op.data.buswidth = spi_nor_get_protocol_data_nbits(nor->read_proto);
 143
 144         /* convert the dummy cycles to the number of bytes */
 145         op.dummy.nbytes = (nor->read_dummy * op.dummy.buswidth) / 8;
 146
 147         while (remaining) {
 148                 op.data.nbytes = remaining < UINT_MAX ? remaining : UINT_MAX;
 149                 ret = spi_mem_adjust_op_size(flash->spimem, &op);
 150                 if (ret)
 151                         return ret;
 152
 153                 ret = spi_mem_exec_op(flash->spimem, &op);
 154                 if (ret)
 155                         return ret;
 156
 157                 op.addr.val += op.data.nbytes;
 158                 remaining -= op.data.nbytes;
 159                 op.data.buf.in += op.data.nbytes;
 160         }
 161
 162         return len;
 163 }
 164
 165 /*
 166  * board specific setup should have ensured the SPI clock used here
 167  * matches what the READ command supports, at least until this driver
 168  * understands FAST_READ (for clocks over 25 MHz).
 169  */
 170 static int m25p_probe(struct spi_mem *spimem)
 171 {
 172         struct spi_device *spi = spimem->spi;
 173         struct flash_platform_data      *data;
 174         struct m25p *flash;
 175         struct spi_nor *nor;
 176         struct spi_nor_hwcaps hwcaps = {
 177                 .mask = SNOR_HWCAPS_READ |
 178                         SNOR_HWCAPS_READ_FAST |
 179                         SNOR_HWCAPS_PP,
 180         };
 181         char *flash_name;
 182         int ret;
 183
 184         data = dev_get_platdata(&spimem->spi->dev);
 185
 186         flash = devm_kzalloc(&spimem->spi->dev, sizeof(*flash), GFP_KERNEL);
 187         if (!flash)
 188                 return -ENOMEM;
 189
 190         nor = &flash->spi_nor;
 191
 192         /* install the hooks */
 193         nor->read = m25p80_read;
 194         nor->write = m25p80_write;
 195         nor->write_reg = m25p80_write_reg;
 196         nor->read_reg = m25p80_read_reg;
 197
 198         nor->dev = &spimem->spi->dev;
 199         spi_nor_set_flash_node(nor, spi->dev.of_node);
 200         nor->priv = flash;
 201
 202         spi_mem_set_drvdata(spimem, flash);
 203         flash->spimem = spimem;
 204         nor->spi = spi;
 205
 206         if (spi->mode & SPI_RX_QUAD) {
 207                 hwcaps.mask |= SNOR_HWCAPS_READ_1_1_4;
 208
 209                 if (spi->mode & SPI_TX_QUAD)
 210                         hwcaps.mask |= (SNOR_HWCAPS_READ_1_4_4 |
 211                                         SNOR_HWCAPS_PP_1_1_4 |
 212                                         SNOR_HWCAPS_PP_1_4_4);
 213         } else if (spi->mode & SPI_RX_DUAL) {
 214                 hwcaps.mask |= SNOR_HWCAPS_READ_1_1_2;
 215
 216                 if (spi->mode & SPI_TX_DUAL)
 217                         hwcaps.mask |= SNOR_HWCAPS_READ_1_2_2;
 218         }
 219
 220         if (data && data->name)
 221                 nor->mtd.name = data->name;
 222
 223         if (!nor->mtd.name)
 224                 nor->mtd.name = spi_mem_get_name(spimem);
 225
 226         /* For some (historical?) reason many platforms provide two different
 227          * names in flash_platform_data: "name" and "type". Quite often name is
 228          * set to "m25p80" and then "type" provides a real chip name.
 229          * If that's the case, respect "type" and ignore a "name".
 230          */
 231         if (data && data->type)
 232                 flash_name = data->type;
 233         else if (!strcmp(spi->modalias, "spi-nor"))
 234                 flash_name = NULL; /* auto-detect */
 235         else
 236                 flash_name = spi->modalias;
 237
 238         ret = spi_nor_scan(nor, flash_name, &hwcaps);
 239         if (ret)
 240                 return ret;
 241
 242         return mtd_device_register(&nor->mtd, data ? data->parts : NULL,
 243                                    data ? data->nr_parts : 0);
 244 }
 245
 246
 247 static int m25p_remove(struct spi_mem *spimem)
 248 {
 249         struct m25p     *flash = spi_mem_get_drvdata(spimem);
 250
 251         spi_nor_restore(&flash->spi_nor);
 252
 253         /* Clean up MTD stuff. */
 254         return mtd_device_unregister(&flash->spi_nor.mtd);
 255 }
 256
 257 static void m25p_shutdown(struct spi_mem *spimem)
 258 {
 259         struct m25p *flash = spi_mem_get_drvdata(spimem);
 260
 261         spi_nor_restore(&flash->spi_nor);
 262 }
 263 /*
 264  * Do NOT add to this array without reading the following:
 265  *
 266  * Historically, many flash devices are bound to this driver by their name. But
 267  * since most of these flash are compatible to some extent, and their
 268  * differences can often be differentiated by the JEDEC read-ID command, we
 269  * encourage new users to add support to the spi-nor library, and simply bind
 270  * against a generic string here (e.g., "jedec,spi-nor").
 271  *
 272  * Many flash names are kept here in this list (as well as in spi-nor.c) to
 273  * keep them available as module aliases for existing platforms.
 274  */
 275 static const struct spi_device_id m25p_ids[] = {
 276         /*
 277          * Allow non-DT platform devices to bind to the "spi-nor" modalias, and
 278          * hack around the fact that the SPI core does not provide uevent
 279          * matching for .of_match_table
 280          */
 281         {"spi-nor"},
 282
 283         /*
 284          * Entries not used in DTs that should be safe to drop after replacing
 285          * them with "spi-nor" in platform data.
 286          */
 287         {"s25sl064a"},  {"w25x16"},     {"m25p10"},     {"m25px64"},
 288
 289         /*
 290          * Entries that were used in DTs without "jedec,spi-nor" fallback and
 291          * should be kept for backward compatibility.
 292          */
 293         {"at25df321a"}, {"at25df641"},  {"at26df081a"},
 294         {"mx25l4005a"}, {"mx25l1606e"}, {"mx25l6405d"}, {"mx25l12805d"},
 295         {"mx25l25635e"},{"mx66l51235l"},
 296         {"n25q064"},    {"n25q128a11"}, {"n25q128a13"}, {"n25q512a"},
 297         {"s25fl256s1"}, {"s25fl512s"},  {"s25sl12801"}, {"s25fl008k"},
 298         {"s25fl064k"},
 299         {"sst25vf040b"},{"sst25vf016b"},{"sst25vf032b"},{"sst25wf040"},
 300         {"m25p40"},     {"m25p80"},     {"m25p16"},     {"m25p32"},
 301         {"m25p64"},     {"m25p128"},
 302         {"w25x80"},     {"w25x32"},     {"w25q32"},     {"w25q32dw"},
 303         {"w25q80bl"},   {"w25q128"},    {"w25q256"},
 304
 305         /* Flashes that can't be detected using JEDEC */
 306         {"m25p05-nonjedec"},    {"m25p10-nonjedec"},    {"m25p20-nonjedec"},
 307         {"m25p40-nonjedec"},    {"m25p80-nonjedec"},    {"m25p16-nonjedec"},
 308         {"m25p32-nonjedec"},    {"m25p64-nonjedec"},    {"m25p128-nonjedec"},
 309
 310         /* Everspin MRAMs (non-JEDEC) */
 311         { "mr25h128" }, /* 128 Kib, 40 MHz */
 312         { "mr25h256" }, /* 256 Kib, 40 MHz */
 313         { "mr25h10" },  /*   1 Mib, 40 MHz */
 314         { "mr25h40" },  /*   4 Mib, 40 MHz */
 315
 316         { },
 317 };
 318 MODULE_DEVICE_TABLE(spi, m25p_ids);
 319
 320 static const struct of_device_id m25p_of_table[] = {
 321         /*
 322          * Generic compatibility for SPI NOR that can be identified by the
 323          * JEDEC READ ID opcode (0x9F). Use this, if possible.
 324          */
 325         { .compatible = "jedec,spi-nor" },
 326         {}
 327 };
 328 MODULE_DEVICE_TABLE(of, m25p_of_table);
 329
 330 static struct spi_mem_driver m25p80_driver = {
 331         .spidrv = {
 332                 .driver = {
 333                         .name   = "m25p80",
 334                         .of_match_table = m25p_of_table,
 335                 },
 336                 .id_table       = m25p_ids,
 337         },
 338         .probe  = m25p_probe,
 339         .remove = m25p_remove,
 340         .shutdown       = m25p_shutdown,
 341
 342         /* REVISIT: many of these chips have deep power-down modes, which
 343          * should clearly be entered on suspend() to minimize power use.
 344          * And also when they're otherwise idle...
 345          */
 346 };
 347
 348 module_spi_mem_driver(m25p80_driver);
 349
 350 MODULE_LICENSE("GPL");
 351 MODULE_AUTHOR("Mike Lavender");
 352 MODULE_DESCRIPTION("MTD SPI driver for ST M25Pxx flash chips");