arch/arm/boot/dts/zynq-zc706.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  *  Copyright (C) 2011 - 2014 Xilinx
   4  *  Copyright (C) 2012 National Instruments Corp.
   5  */
   6 /dts-v1/;
   7 #include "zynq-7000.dtsi"
   8
   9 / {
  10         model = "Zynq ZC706 Development Board";
  11         compatible = "xlnx,zynq-zc706", "xlnx,zynq-7000";
  12
  13         aliases {
  14                 ethernet0 = &gem0;
  15                 i2c0 = &i2c0;
  16                 serial0 = &uart1;
  17         };
  18
  19         memory@0 {
  20                 device_type = "memory";
  21                 reg = <0x0 0x40000000>;
  22         };
  23
  24         chosen {
  25                 bootargs = "";
  26                 stdout-path = "serial0:115200n8";
  27         };
  28
  29         usb_phy0: phy0 {
  30                 compatible = "usb-nop-xceiv";
  31                 #phy-cells = <0>;
  32         };
  33 };
  34
  35 &clkc {
  36         ps-clk-frequency = <33333333>;
  37 };
  38
  39 &gem0 {
  40         status = "okay";
  41         phy-mode = "rgmii-id";
  42         phy-handle = <&ethernet_phy>;
  43         pinctrl-names = "default";
  44         pinctrl-0 = <&pinctrl_gem0_default>;
  45
  46         ethernet_phy: ethernet-phy@7 {
  47                 reg = <7>;
  48                 device_type = "ethernet-phy";
  49         };
  50 };
  51
  52 &gpio0 {
  53         pinctrl-names = "default";
  54         pinctrl-0 = <&pinctrl_gpio0_default>;
  55 };
  56
  57 &i2c0 {
  58         status = "okay";
  59         clock-frequency = <400000>;
  60         pinctrl-names = "default";
  61         pinctrl-0 = <&pinctrl_i2c0_default>;
  62
  63         i2c-mux@74 {
  64                 compatible = "nxp,pca9548";
  65                 #address-cells = <1>;
  66                 #size-cells = <0>;
  67                 reg = <0x74>;
  68
  69                 i2c@0 {
  70                         #address-cells = <1>;
  71                         #size-cells = <0>;
  72                         reg = <0>;
  73                         si570: clock-generator@5d {
  74                                 #clock-cells = <0>;
  75                                 compatible = "silabs,si570";
  76                                 temperature-stability = <50>;
  77                                 reg = <0x5d>;
  78                                 factory-fout = <156250000>;
  79                                 clock-frequency = <148500000>;
  80                         };
  81                 };
  82
  83                 i2c@1 {
  84                         #address-cells = <1>;
  85                         #size-cells = <0>;
  86                         reg = <1>;
  87                         adv7511: hdmi-tx@39 {
  88                                 compatible = "adi,adv7511";
  89                                 reg = <0x39>;
  90                                 adi,input-depth = <8>;
  91                                 adi,input-colorspace = "yuv422";
  92                                 adi,input-clock = "1x";
  93                                 adi,input-style = <3>;
  94                                 adi,input-justification = "evenly";
  95                         };
  96                 };
  97
  98                 i2c@2 {
  99                         #address-cells = <1>;
 100                         #size-cells = <0>;
 101                         reg = <2>;
 102                         eeprom@54 {
 103                                 compatible = "atmel,24c08";
 104                                 reg = <0x54>;
 105                         };
 106                 };
 107
 108                 i2c@3 {
 109                         #address-cells = <1>;
 110                         #size-cells = <0>;
 111                         reg = <3>;
 112                         gpio@21 {
 113                                 compatible = "ti,tca6416";
 114                                 reg = <0x21>;
 115                                 gpio-controller;
 116                                 #gpio-cells = <2>;
 117                         };
 118                 };
 119
 120                 i2c@4 {
 121                         #address-cells = <1>;
 122                         #size-cells = <0>;
 123                         reg = <4>;
 124                         rtc@51 {
 125                                 compatible = "nxp,pcf8563";
 126                                 reg = <0x51>;
 127                         };
 128                 };
 129
 130                 i2c@7 {
 131                         #address-cells = <1>;
 132                         #size-cells = <0>;
 133                         reg = <7>;
 134                         ucd90120@65 {
 135                                 compatible = "ti,ucd90120";
 136                                 reg = <0x65>;
 137                         };
 138                 };
 139         };
 140 };
 141
 142 &pinctrl0 {
 143         pinctrl_gem0_default: gem0-default {
 144                 mux {
 145                         function = "ethernet0";
 146                         groups = "ethernet0_0_grp";
 147                 };
 148
 149                 conf {
 150                         groups = "ethernet0_0_grp";
 151                         slew-rate = <0>;
 152                         io-standard = <4>;
 153                 };
 154
 155                 conf-rx {
 156                         pins = "MIO22", "MIO23", "MIO24", "MIO25", "MIO26", "MIO27";
 157                         bias-high-impedance;
 158                         low-power-disable;
 159                 };
 160
 161                 conf-tx {
 162                         pins = "MIO16", "MIO17", "MIO18", "MIO19", "MIO20", "MIO21";
 163                         low-power-enable;
 164                         bias-disable;
 165                 };
 166
 167                 mux-mdio {
 168                         function = "mdio0";
 169                         groups = "mdio0_0_grp";
 170                 };
 171
 172                 conf-mdio {
 173                         groups = "mdio0_0_grp";
 174                         slew-rate = <0>;
 175                         io-standard = <1>;
 176                         bias-disable;
 177                 };
 178         };
 179
 180         pinctrl_gpio0_default: gpio0-default {
 181                 mux {
 182                         function = "gpio0";
 183                         groups = "gpio0_7_grp", "gpio0_46_grp", "gpio0_47_grp";
 184                 };
 185
 186                 conf {
 187                         groups = "gpio0_7_grp", "gpio0_46_grp", "gpio0_47_grp";
 188                         slew-rate = <0>;
 189                         io-standard = <1>;
 190                 };
 191
 192                 conf-pull-up {
 193                         pins = "MIO46", "MIO47";
 194                         bias-pull-up;
 195                 };
 196
 197                 conf-pull-none {
 198                         pins = "MIO7";
 199                         bias-disable;
 200                 };
 201         };
 202
 203         pinctrl_i2c0_default: i2c0-default {
 204                 mux {
 205                         groups = "i2c0_10_grp";
 206                         function = "i2c0";
 207                 };
 208
 209                 conf {
 210                         groups = "i2c0_10_grp";
 211                         bias-pull-up;
 212                         slew-rate = <0>;
 213                         io-standard = <1>;
 214                 };
 215         };
 216
 217         pinctrl_sdhci0_default: sdhci0-default {
 218                 mux {
 219                         groups = "sdio0_2_grp";
 220                         function = "sdio0";
 221                 };
 222
 223                 conf {
 224                         groups = "sdio0_2_grp";
 225                         slew-rate = <0>;
 226                         io-standard = <1>;
 227                         bias-disable;
 228                 };
 229
 230                 mux-cd {
 231                         groups = "gpio0_14_grp";
 232                         function = "sdio0_cd";
 233                 };
 234
 235                 conf-cd {
 236                         groups = "gpio0_14_grp";
 237                         bias-high-impedance;
 238                         bias-pull-up;
 239                         slew-rate = <0>;
 240                         io-standard = <1>;
 241                 };
 242
 243                 mux-wp {
 244                         groups = "gpio0_15_grp";
 245                         function = "sdio0_wp";
 246                 };
 247
 248                 conf-wp {
 249                         groups = "gpio0_15_grp";
 250                         bias-high-impedance;
 251                         bias-pull-up;
 252                         slew-rate = <0>;
 253                         io-standard = <1>;
 254                 };
 255         };
 256
 257         pinctrl_uart1_default: uart1-default {
 258                 mux {
 259                         groups = "uart1_10_grp";
 260                         function = "uart1";
 261                 };
 262
 263                 conf {
 264                         groups = "uart1_10_grp";
 265                         slew-rate = <0>;
 266                         io-standard = <1>;
 267                 };
 268
 269                 conf-rx {
 270                         pins = "MIO49";
 271                         bias-high-impedance;
 272                 };
 273
 274                 conf-tx {
 275                         pins = "MIO48";
 276                         bias-disable;
 277                 };
 278         };
 279
 280         pinctrl_usb0_default: usb0-default {
 281                 mux {
 282                         groups = "usb0_0_grp";
 283                         function = "usb0";
 284                 };
 285
 286                 conf {
 287                         groups = "usb0_0_grp";
 288                         slew-rate = <0>;
 289                         io-standard = <1>;
 290                 };
 291
 292                 conf-rx {
 293                         pins = "MIO29", "MIO31", "MIO36";
 294                         bias-high-impedance;
 295                 };
 296
 297                 conf-tx {
 298                         pins = "MIO28", "MIO30", "MIO32", "MIO33", "MIO34",
 299                                "MIO35", "MIO37", "MIO38", "MIO39";
 300                         bias-disable;
 301                 };
 302         };
 303 };
 304
 305 &sdhci0 {
 306         status = "okay";
 307         pinctrl-names = "default";
 308         pinctrl-0 = <&pinctrl_sdhci0_default>;
 309 };
 310
 311 &uart1 {
 312         status = "okay";
 313         pinctrl-names = "default";
 314         pinctrl-0 = <&pinctrl_uart1_default>;
 315 };
 316
 317 &usb0 {
 318         status = "okay";
 319         dr_mode = "host";
 320         usb-phy = <&usb_phy0>;
 321         pinctrl-names = "default";
 322         pinctrl-0 = <&pinctrl_usb0_default>;
 323 };