1 // SPDX-License-Identifier: GPL-2.0+
3 * dts file for Xilinx ZynqMP ZCU100 revC
5 * (C) Copyright 2016 - 2018, Xilinx, Inc.
7 * Michal Simek <michal.simek@xilinx.com>
8 * Nathalie Chan King Choy
13 #include "zynqmp.dtsi"
14 #include "zynqmp-clk-ccf.dtsi"
15 #include <dt-bindings/interrupt-controller/irq.h>
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
18 #include <dt-bindings/phy/phy.h>
21 model = "ZynqMP ZCU100 RevC";
22 compatible = "xlnx,zynqmp-zcu100-revC", "xlnx,zynqmp-zcu100", "xlnx,zynqmp";
40 bootargs = "earlycon";
41 stdout-path = "serial0:115200n8";
45 device_type = "memory";
46 reg = <0x0 0x0 0x0 0x80000000>;
50 compatible = "gpio-keys";
56 gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
57 linux,code = <108>; /* down */
58 gpio-key,wakeup; /* FIXME test this */
64 compatible = "iio-hwmon";
65 io-channels = <&xilinx_ams 0>, <&xilinx_ams 1>, <&xilinx_ams 2>,
66 <&xilinx_ams 3>, <&xilinx_ams 4>, <&xilinx_ams 5>,
67 <&xilinx_ams 6>, <&xilinx_ams 7>, <&xilinx_ams 8>,
68 <&xilinx_ams 9>, <&xilinx_ams 10>,
69 <&xilinx_ams 11>, <&xilinx_ams 12>;
73 compatible = "gpio-leds";
76 gpios = <&gpio 20 GPIO_ACTIVE_HIGH>; /* uboot: gpio toggle 20 */
77 linux,default-trigger = "heartbeat";
82 gpios = <&gpio 19 GPIO_ACTIVE_HIGH>;
83 linux,default-trigger = "phy0tx"; /* WLAN tx */
84 default-state = "off";
89 gpios = <&gpio 18 GPIO_ACTIVE_HIGH>;
90 linux,default-trigger = "phy0rx"; /* WLAN rx */
91 default-state = "off";
96 gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;
97 linux,default-trigger = "bluetooth-power";
100 /* FIXME this is not correct - used fixed-regulator for it */
101 vbus_det { /* U5 USB5744 VBUS detection via MIO25 */
103 gpios = <&gpio 25 GPIO_ACTIVE_HIGH>;
104 default-state = "on";
108 ltc2954: ltc2954 { /* U7 */
110 * FIXME this is ltc2954 not ltc2952 - try this driver and
111 * maybe just extend compatible string.
113 compatible = "lltc,ltc2954", "lltc,ltc2952";
114 trigger-gpios = <&gpio 26 GPIO_ACTIVE_LOW>; /* INT line - input */
115 /* If there is HW watchdog on mezzanine this signal should be connected there */
116 watchdog-gpios = <&gpio 35 GPIO_ACTIVE_HIGH>; /* MIO on PAD */
117 kill-gpios = <&gpio 34 GPIO_ACTIVE_LOW>; /* KILL signal - output */
120 wmmcsdio_fixed: fixedregulator-mmcsdio {
121 compatible = "regulator-fixed";
122 regulator-name = "wmmcsdio_fixed";
123 regulator-min-microvolt = <3300000>;
124 regulator-max-microvolt = <3300000>;
129 sdio_pwrseq: sdio_pwrseq {
130 compatible = "mmc-pwrseq-simple";
131 reset-gpios = <&gpio 7 GPIO_ACTIVE_LOW>; /* WIFI_EN */
141 gpio-line-names = "UART1_TX", "UART1_RX", "UART0_RX", "UART0_TX", "I2C1_SCL",
142 "I2C1_SDA", "SPI1_SCLK", "WLAN_EN", "BT_EN", "SPI1_CS",
143 "SPI1_MISO", "SPI1_MOSI", "I2C_MUX_RESET", "SD0_DAT0", "SD0_DAT1",
144 "SD0_DAT2", "SD0_DAT3", "PS_LED3", "PS_LED2", "PS_LED1",
145 "PS_LED0", "SD0_CMD", "SD0_CLK", "GPIO_PB", "SD0_DETECT",
146 "VBUS_DET", "POWER_INT", "DP_AUX", "DP_HPD", "DP_OE",
147 "DP_AUX_IN", "INA226_ALERT", "PS_FP_PWR_EN", "PL_PWR_EN", "POWER_KILL",
148 "", "GPIO-A", "GPIO-B", "SPI0_SCLK", "GPIO-C",
149 "GPIO-D", "SPI0_CS", "SPI0_MISO", "SPI_MOSI", "GPIO-E",
150 "GPIO-F", "SD1_D0", "SD1_D1", "SD1_D2", "SD1_D3",
151 "SD1_CMD", "SD1_CLK", "USB0_CLK", "USB0_DIR", "USB0_DATA2",
152 "USB0_NXT", "USB0_DATA0", "USB0_DATA1", "USB0_STP", "USB0_DATA3",
153 "USB0_DATA4", "USB0_DATA5", "USB0_DATA6", "USB0_DATA7", "USB1_CLK",
154 "USB1_DIR", "USB1_DATA2", "USB1_NXT", "USB1_DATA0", "USB1_DATA1",
155 "USB1_STP", "USB1_DATA3", "USB1_DATA4", "USB1_DATA5", "USB1_DATA6",
156 "USB_DATA7", "WLAN_IRQ", "PMIC_IRQ", /* MIO end and EMIO start */
158 "", "", "", "", "", "", "", "", "", "",
159 "", "", "", "", "", "", "", "", "", "",
160 "", "", "", "", "", "", "", "", "", "",
161 "", "", "", "", "", "", "", "", "", "",
162 "", "", "", "", "", "", "", "", "", "",
163 "", "", "", "", "", "", "", "", "", "",
164 "", "", "", "", "", "", "", "", "", "",
165 "", "", "", "", "", "", "", "", "", "",
166 "", "", "", "", "", "", "", "", "", "",
176 pinctrl-names = "default", "gpio";
177 pinctrl-0 = <&pinctrl_i2c1_default>;
178 pinctrl-1 = <&pinctrl_i2c1_gpio>;
179 scl-gpios = <&gpio 4 GPIO_ACTIVE_HIGH>;
180 sda-gpios = <&gpio 5 GPIO_ACTIVE_HIGH>;
181 clock-frequency = <100000>;
182 i2cswitch@75 { /* u11 */
183 compatible = "nxp,pca9548";
184 #address-cells = <1>;
187 i2csw_0: i2c@0 { /* i2c mw 75 0 1 */
188 #address-cells = <1>;
195 i2csw_1: i2c@1 { /* i2c mw 75 0 2 */
196 #address-cells = <1>;
203 i2csw_2: i2c@2 { /* i2c mw 75 0 4 */
204 #address-cells = <1>;
211 i2csw_3: i2c@3 { /* i2c mw 75 0 8 */
212 #address-cells = <1>;
219 i2csw_4: i2c@4 { /* i2c mw 75 0 10 */
220 #address-cells = <1>;
224 /* Comment it out because will be pre-programmed
227 pmic: tps65086x@5e { // Custom TI PMIC u33
228 compatible = "ti,tps65086";
230 interrupt-parent = <&gpio>;
231 interrupts = <77 GPIO_ACTIVE_LOW>;
236 sys-supply = <&some_reg>;
240 buck2 PSINTLP (no idea)
246 vin-sm0-supply = <&some_reg>;
247 vin-sm1-supply = <&some_reg>;
248 vin-sm2-supply = <&some_reg>;
249 vinldo01-supply = <...>;
250 vinldo23-supply = <...>;
251 vinldo4-supply = <...>;
252 vinldo678-supply = <...>;
253 vinldo9-supply = <...>;
257 regulator-name = "vdd_sys";
263 regulator-min-microvolt = < 725000>;
264 regulator-max-microvolt = <1500000>;
270 regulator-min-microvolt = < 725000>;
271 regulator-max-microvolt = <1500000>;
277 regulator-min-microvolt = <3000000>;
278 regulator-max-microvolt = <4550000>;
284 regulator-name = "PCIE CLK";
285 regulator-min-microvolt = <3300000>;
286 regulator-max-microvolt = <3300000>;
290 regulator-min-microvolt = < 725000>;
291 regulator-max-microvolt = <1500000>;
295 regulator-min-microvolt = < 725000>;
296 regulator-max-microvolt = <1500000>;
300 regulator-min-microvolt = <1250000>;
301 regulator-max-microvolt = <3300000>;
305 regulator-min-microvolt = <1700000>;
306 regulator-max-microvolt = <2475000>;
310 regulator-min-microvolt = <1250000>;
311 regulator-max-microvolt = <3300000>;
315 regulator-min-microvolt = <1250000>;
316 regulator-max-microvolt = <3300000>;
320 regulator-min-microvolt = <1250000>;
321 regulator-max-microvolt = <3300000>;
325 regulator-min-microvolt = <1250000>;
326 regulator-max-microvolt = <3300000>;
330 regulator-min-microvolt = <1250000>;
331 regulator-max-microvolt = <3300000>;
334 // FIXME look at this one
336 regulator-name = "vdd_rtc_out,vdd_cell";
337 regulator-min-microvolt = <3300000>;
338 regulator-max-microvolt = <3300000>;
345 i2csw_5: i2c@5 { /* i2c mw 75 0 20 */
346 #address-cells = <1>;
350 ina226@40 { /* u35 */
351 compatible = "ti,ina226";
353 shunt-resistor = <10000>;
354 /* MIO31 is alert which should be routed to PMUFW */
357 i2csw_6: i2c@6 { /* i2c mw 75 0 40 */
358 #address-cells = <1>;
365 i2csw_7: i2c@7 { /* i2c mw 75 0 80 */
366 #address-cells = <1>;
371 * 100kHz - this is default freq for us
379 pinctrl_i2c1_default: i2c1-default {
381 groups = "i2c1_1_grp";
386 groups = "i2c1_1_grp";
388 slew-rate = <SLEW_RATE_SLOW>;
389 io-standard = <IO_STANDARD_LVCMOS18>;
393 pinctrl_i2c1_gpio: i2c1-gpio {
395 groups = "gpio0_4_grp", "gpio0_5_grp";
400 groups = "gpio0_4_grp", "gpio0_5_grp";
401 slew-rate = <SLEW_RATE_SLOW>;
402 io-standard = <IO_STANDARD_LVCMOS18>;
406 pinctrl_sdhci0_default: sdhci0-default {
408 groups = "sdio0_3_grp";
413 groups = "sdio0_3_grp";
414 slew-rate = <SLEW_RATE_SLOW>;
415 io-standard = <IO_STANDARD_LVCMOS18>;
420 groups = "sdio0_cd_0_grp";
421 function = "sdio0_cd";
425 groups = "sdio0_cd_0_grp";
428 slew-rate = <SLEW_RATE_SLOW>;
429 io-standard = <IO_STANDARD_LVCMOS18>;
433 pinctrl_sdhci1_default: sdhci1-default {
435 groups = "sdio1_2_grp";
440 groups = "sdio1_2_grp";
441 slew-rate = <SLEW_RATE_SLOW>;
442 io-standard = <IO_STANDARD_LVCMOS18>;
447 pinctrl_spi0_default: spi0-default {
449 groups = "spi0_3_grp";
454 groups = "spi0_3_grp";
456 slew-rate = <SLEW_RATE_SLOW>;
457 io-standard = <IO_STANDARD_LVCMOS18>;
461 groups = "spi0_ss_9_grp";
462 function = "spi0_ss";
466 groups = "spi0_ss_9_grp";
472 pinctrl_spi1_default: spi1-default {
474 groups = "spi1_0_grp";
479 groups = "spi1_0_grp";
481 slew-rate = <SLEW_RATE_SLOW>;
482 io-standard = <IO_STANDARD_LVCMOS18>;
486 groups = "spi1_ss_0_grp";
487 function = "spi1_ss";
491 groups = "spi1_ss_0_grp";
497 pinctrl_uart0_default: uart0-default {
499 groups = "uart0_0_grp";
504 groups = "uart0_0_grp";
505 slew-rate = <SLEW_RATE_SLOW>;
506 io-standard = <IO_STANDARD_LVCMOS18>;
520 pinctrl_uart1_default: uart1-default {
522 groups = "uart1_0_grp";
527 groups = "uart1_0_grp";
528 slew-rate = <SLEW_RATE_SLOW>;
529 io-standard = <IO_STANDARD_LVCMOS18>;
543 pinctrl_usb0_default: usb0-default {
545 groups = "usb0_0_grp";
550 groups = "usb0_0_grp";
551 slew-rate = <SLEW_RATE_SLOW>;
552 io-standard = <IO_STANDARD_LVCMOS18>;
556 pins = "MIO52", "MIO53", "MIO55";
561 pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59",
562 "MIO60", "MIO61", "MIO62", "MIO63";
567 pinctrl_usb1_default: usb1-default {
569 groups = "usb1_0_grp";
574 groups = "usb1_0_grp";
575 slew-rate = <SLEW_RATE_SLOW>;
576 io-standard = <IO_STANDARD_LVCMOS18>;
580 pins = "MIO64", "MIO65", "MIO67";
585 pins = "MIO66", "MIO68", "MIO69", "MIO70", "MIO71",
586 "MIO72", "MIO73", "MIO74", "MIO75";
596 /* SD0 only supports 3.3V, no level shifter */
600 broken-cd; /* CD has to be enabled by default */
602 pinctrl-names = "default";
603 pinctrl-0 = <&pinctrl_sdhci0_default>;
610 pinctrl-names = "default";
611 pinctrl-0 = <&pinctrl_sdhci1_default>;
616 mmc-pwrseq = <&sdio_pwrseq>;
617 vqmmc-supply = <&wmmcsdio_fixed>;
618 #address-cells = <1>;
621 compatible = "ti,wl1831";
623 interrupt-parent = <&gpio>;
624 interrupts = <76 IRQ_TYPE_EDGE_RISING>; /* MIO76 WLAN_IRQ 1V8 */
632 &spi0 { /* Low Speed connector */
634 pinctrl-names = "default";
635 pinctrl-0 = <&pinctrl_spi0_default>;
638 &spi1 { /* High Speed connector */
640 pinctrl-names = "default";
641 pinctrl-0 = <&pinctrl_spi1_default>;
646 pinctrl-names = "default";
647 pinctrl-0 = <&pinctrl_uart0_default>;
649 compatible = "ti,wl1831-st";
650 enable-gpios = <&gpio 8 GPIO_ACTIVE_HIGH>;
657 pinctrl-names = "default";
658 pinctrl-0 = <&pinctrl_uart1_default>;
662 /* ULPI SMSC USB3320 */
665 pinctrl-names = "default";
666 pinctrl-0 = <&pinctrl_usb0_default>;
671 dr_mode = "peripheral";
672 phy-names = "usb3-phy";
673 phys = <&lane2 PHY_TYPE_USB3 0 0 26000000>;
674 maximum-speed = "super-speed";
677 /* ULPI SMSC USB3320 */
680 pinctrl-names = "default";
681 pinctrl-0 = <&pinctrl_usb1_default>;
687 phy-names = "usb3-phy";
688 phys = <&lane3 PHY_TYPE_USB3 1 0 26000000>;
689 maximum-speed = "super-speed";
698 phy-names = "dp-phy0", "dp-phy1";
699 phys = <&lane1 PHY_TYPE_DP 0 1 27000000>,
700 <&lane0 PHY_TYPE_DP 1 1 27000000>;
703 &zynqmp_dp_snd_pcm0 {
707 &zynqmp_dp_snd_pcm1 {
711 &zynqmp_dp_snd_card0 {
715 &zynqmp_dp_snd_codec0 {