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[zynq/linux.git] / arch / arm64 / boot / dts / xilinx / zynqmp-zcu100-revC.dts
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * dts file for Xilinx ZynqMP ZCU100 revC
4  *
5  * (C) Copyright 2016 - 2018, Xilinx, Inc.
6  *
7  * Michal Simek <michal.simek@xilinx.com>
8  * Nathalie Chan King Choy
9  */
10
11 /dts-v1/;
12
13 #include "zynqmp.dtsi"
14 #include "zynqmp-clk-ccf.dtsi"
15 #include <dt-bindings/interrupt-controller/irq.h>
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
18 #include <dt-bindings/phy/phy.h>
19
20 / {
21         model = "ZynqMP ZCU100 RevC";
22         compatible = "xlnx,zynqmp-zcu100-revC", "xlnx,zynqmp-zcu100", "xlnx,zynqmp";
23
24         aliases {
25                 gpio0 = &gpio;
26                 i2c0 = &i2c1;
27                 rtc0 = &rtc;
28                 serial0 = &uart1;
29                 serial1 = &uart0;
30                 serial2 = &dcc;
31                 spi0 = &spi0;
32                 spi1 = &spi1;
33                 usb0 = &usb0;
34                 usb1 = &usb1;
35                 mmc0 = &sdhci0;
36                 mmc1 = &sdhci1;
37         };
38
39         chosen {
40                 bootargs = "earlycon";
41                 stdout-path = "serial0:115200n8";
42         };
43
44         memory@0 {
45                 device_type = "memory";
46                 reg = <0x0 0x0 0x0 0x80000000>;
47         };
48
49         gpio-keys {
50                 compatible = "gpio-keys";
51                 #address-cells = <1>;
52                 #size-cells = <0>;
53                 autorepeat;
54                 sw4 {
55                         label = "sw4";
56                         gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
57                         linux,code = <108>; /* down */
58                         gpio-key,wakeup; /* FIXME test this */
59                         autorepeat;
60                 };
61         };
62
63         iio-hwmon {
64                 compatible = "iio-hwmon";
65                 io-channels = <&xilinx_ams 0>, <&xilinx_ams 1>, <&xilinx_ams 2>,
66                               <&xilinx_ams 3>, <&xilinx_ams 4>, <&xilinx_ams 5>,
67                               <&xilinx_ams 6>, <&xilinx_ams 7>, <&xilinx_ams 8>,
68                               <&xilinx_ams 9>, <&xilinx_ams 10>,
69                               <&xilinx_ams 11>, <&xilinx_ams 12>;
70         };
71
72         leds {
73                 compatible = "gpio-leds";
74                 ds2 {
75                         label = "ds2";
76                         gpios = <&gpio 20 GPIO_ACTIVE_HIGH>; /* uboot: gpio toggle 20 */
77                         linux,default-trigger = "heartbeat";
78                 };
79
80                 ds3 {
81                         label = "ds3";
82                         gpios = <&gpio 19 GPIO_ACTIVE_HIGH>;
83                         linux,default-trigger = "phy0tx"; /* WLAN tx */
84                         default-state = "off";
85                 };
86
87                 ds4 {
88                         label = "ds4";
89                         gpios = <&gpio 18 GPIO_ACTIVE_HIGH>;
90                         linux,default-trigger = "phy0rx"; /* WLAN rx */
91                         default-state = "off";
92                 };
93
94                 ds5 {
95                         label = "ds5";
96                         gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;
97                         linux,default-trigger = "bluetooth-power";
98                 };
99
100                 /* FIXME this is not correct - used fixed-regulator for it */
101                 vbus_det { /* U5 USB5744  VBUS detection via MIO25 */
102                         label = "vbus_det";
103                         gpios = <&gpio 25 GPIO_ACTIVE_HIGH>;
104                         default-state = "on";
105                 };
106         };
107
108         ltc2954: ltc2954 { /* U7 */
109                 /*
110                  * FIXME this is ltc2954 not ltc2952 - try this driver and
111                  * maybe just extend compatible string.
112                  */
113                 compatible = "lltc,ltc2954", "lltc,ltc2952";
114                 trigger-gpios = <&gpio 26 GPIO_ACTIVE_LOW>; /* INT line - input */
115                 /* If there is HW watchdog on mezzanine this signal should be connected there */
116                 watchdog-gpios = <&gpio 35 GPIO_ACTIVE_HIGH>; /* MIO on PAD */
117                 kill-gpios = <&gpio 34 GPIO_ACTIVE_LOW>; /* KILL signal - output */
118         };
119
120         wmmcsdio_fixed: fixedregulator-mmcsdio {
121                 compatible = "regulator-fixed";
122                 regulator-name = "wmmcsdio_fixed";
123                 regulator-min-microvolt = <3300000>;
124                 regulator-max-microvolt = <3300000>;
125                 regulator-always-on;
126                 regulator-boot-on;
127         };
128
129         sdio_pwrseq: sdio_pwrseq {
130                 compatible = "mmc-pwrseq-simple";
131                 reset-gpios = <&gpio 7 GPIO_ACTIVE_LOW>; /* WIFI_EN */
132         };
133 };
134
135 &dcc {
136         status = "okay";
137 };
138
139 &gpio {
140         status = "okay";
141         gpio-line-names = "UART1_TX", "UART1_RX", "UART0_RX", "UART0_TX", "I2C1_SCL",
142                           "I2C1_SDA", "SPI1_SCLK", "WLAN_EN", "BT_EN", "SPI1_CS",
143                           "SPI1_MISO", "SPI1_MOSI", "I2C_MUX_RESET", "SD0_DAT0", "SD0_DAT1",
144                           "SD0_DAT2", "SD0_DAT3", "PS_LED3", "PS_LED2", "PS_LED1",
145                           "PS_LED0", "SD0_CMD", "SD0_CLK", "GPIO_PB", "SD0_DETECT",
146                           "VBUS_DET", "POWER_INT", "DP_AUX", "DP_HPD", "DP_OE",
147                           "DP_AUX_IN", "INA226_ALERT", "PS_FP_PWR_EN", "PL_PWR_EN", "POWER_KILL",
148                           "", "GPIO-A", "GPIO-B", "SPI0_SCLK", "GPIO-C",
149                           "GPIO-D", "SPI0_CS", "SPI0_MISO", "SPI_MOSI", "GPIO-E",
150                           "GPIO-F", "SD1_D0", "SD1_D1", "SD1_D2", "SD1_D3",
151                           "SD1_CMD", "SD1_CLK", "USB0_CLK", "USB0_DIR", "USB0_DATA2",
152                           "USB0_NXT", "USB0_DATA0", "USB0_DATA1", "USB0_STP", "USB0_DATA3",
153                           "USB0_DATA4", "USB0_DATA5", "USB0_DATA6", "USB0_DATA7", "USB1_CLK",
154                           "USB1_DIR", "USB1_DATA2", "USB1_NXT", "USB1_DATA0", "USB1_DATA1",
155                           "USB1_STP", "USB1_DATA3", "USB1_DATA4", "USB1_DATA5", "USB1_DATA6",
156                           "USB_DATA7", "WLAN_IRQ", "PMIC_IRQ", /* MIO end and EMIO start */
157                           "", "",
158                           "", "", "", "", "", "", "", "", "", "",
159                           "", "", "", "", "", "", "", "", "", "",
160                           "", "", "", "", "", "", "", "", "", "",
161                           "", "", "", "", "", "", "", "", "", "",
162                           "", "", "", "", "", "", "", "", "", "",
163                           "", "", "", "", "", "", "", "", "", "",
164                           "", "", "", "", "", "", "", "", "", "",
165                           "", "", "", "", "", "", "", "", "", "",
166                           "", "", "", "", "", "", "", "", "", "",
167                           "", "", "", "";
168 };
169
170 &gpu {
171         status = "okay";
172 };
173
174 &i2c1 {
175         status = "okay";
176         pinctrl-names = "default", "gpio";
177         pinctrl-0 = <&pinctrl_i2c1_default>;
178         pinctrl-1 = <&pinctrl_i2c1_gpio>;
179         scl-gpios = <&gpio 4 GPIO_ACTIVE_HIGH>;
180         sda-gpios = <&gpio 5 GPIO_ACTIVE_HIGH>;
181         clock-frequency = <100000>;
182         i2cswitch@75 { /* u11 */
183                 compatible = "nxp,pca9548";
184                 #address-cells = <1>;
185                 #size-cells = <0>;
186                 reg = <0x75>;
187                 i2csw_0: i2c@0 { /* i2c mw 75 0 1 */
188                         #address-cells = <1>;
189                         #size-cells = <0>;
190                         reg = <0>;
191                         /*
192                          * LSEXP_I2C0
193                          */
194                 };
195                 i2csw_1: i2c@1 { /* i2c mw 75 0 2 */
196                         #address-cells = <1>;
197                         #size-cells = <0>;
198                         reg = <1>;
199                         /*
200                          * LSEXP_I2C1
201                          */
202                 };
203                 i2csw_2: i2c@2 { /* i2c mw 75 0 4 */
204                         #address-cells = <1>;
205                         #size-cells = <0>;
206                         reg = <2>;
207                         /*
208                          * HSEXP_I2C2
209                          */
210                 };
211                 i2csw_3: i2c@3 { /* i2c mw 75 0 8 */
212                         #address-cells = <1>;
213                         #size-cells = <0>;
214                         reg = <3>;
215                         /*
216                          * HSEXP_I2C3
217                          */
218                 };
219                 i2csw_4: i2c@4 { /* i2c mw 75 0 10 */
220                         #address-cells = <1>;
221                         #size-cells = <0>;
222                         reg = <0x4>;
223
224                         /* Comment it out because will be pre-programmed
225                            at the factory */
226
227                         pmic: tps65086x@5e { // Custom TI PMIC u33
228                                 compatible = "ti,tps65086";
229                                 reg = <0x5e>;
230                                 interrupt-parent = <&gpio>;
231                                 interrupts = <77 GPIO_ACTIVE_LOW>;
232                                 #gpio-cells = <2>;
233                                 gpio-controller;
234
235 /*
236                                 sys-supply = <&some_reg>;
237                                 // spec 12V
238
239                                 buck1 5V0
240                                 buck2 PSINTLP (no idea)
241                                 buck3 VCC_PSDDR 1V1
242                                 buck4 3V3
243                                 buck5 1V2
244                                 buck6 VCC_PSAUX 1V8
245
246                                 vin-sm0-supply = <&some_reg>;
247                                 vin-sm1-supply = <&some_reg>;
248                                 vin-sm2-supply = <&some_reg>;
249                                 vinldo01-supply = <...>;
250                                 vinldo23-supply = <...>;
251                                 vinldo4-supply = <...>;
252                                 vinldo678-supply = <...>;
253                                 vinldo9-supply = <...>;
254
255                                 regulators {
256                                         sys_reg: sys {
257                                                 regulator-name = "vdd_sys";
258                                                 regulator-boot-on;
259                                                 regulator-always-on;
260                                         };
261
262                                         sm0_reg: sm0 {
263                                                 regulator-min-microvolt = < 725000>;
264                                                 regulator-max-microvolt = <1500000>;
265                                                 regulator-boot-on;
266                                                 regulator-always-on;
267                                         };
268
269                                         sm1_reg: sm1 {
270                                                 regulator-min-microvolt = < 725000>;
271                                                 regulator-max-microvolt = <1500000>;
272                                                 regulator-boot-on;
273                                                 regulator-always-on;
274                                         };
275
276                                         sm2_reg: sm2 {
277                                                 regulator-min-microvolt = <3000000>;
278                                                 regulator-max-microvolt = <4550000>;
279                                                 regulator-boot-on;
280                                                 regulator-always-on;
281                                         };
282
283                                         ldo0_reg: ldo0 {
284                                                 regulator-name = "PCIE CLK";
285                                                 regulator-min-microvolt = <3300000>;
286                                                 regulator-max-microvolt = <3300000>;
287                                         };
288
289                                         ldo1_reg: ldo1 {
290                                                 regulator-min-microvolt = < 725000>;
291                                                 regulator-max-microvolt = <1500000>;
292                                         };
293
294                                         ldo2_reg: ldo2 {
295                                                 regulator-min-microvolt = < 725000>;
296                                                 regulator-max-microvolt = <1500000>;
297                                         };
298
299                                         ldo3_reg: ldo3 {
300                                                 regulator-min-microvolt = <1250000>;
301                                                 regulator-max-microvolt = <3300000>;
302                                         };
303
304                                         ldo4_reg: ldo4 {
305                                                 regulator-min-microvolt = <1700000>;
306                                                 regulator-max-microvolt = <2475000>;
307                                         };
308
309                                         ldo5_reg: ldo5 {
310                                                 regulator-min-microvolt = <1250000>;
311                                                 regulator-max-microvolt = <3300000>;
312                                         };
313
314                                         ldo6_reg: ldo6 {
315                                                 regulator-min-microvolt = <1250000>;
316                                                 regulator-max-microvolt = <3300000>;
317                                         };
318
319                                         ldo7_reg: ldo7 {
320                                                 regulator-min-microvolt = <1250000>;
321                                                 regulator-max-microvolt = <3300000>;
322                                         };
323
324                                         ldo8_reg: ldo8 {
325                                                 regulator-min-microvolt = <1250000>;
326                                                 regulator-max-microvolt = <3300000>;
327                                         };
328
329                                         ldo9_reg: ldo9 {
330                                                 regulator-min-microvolt = <1250000>;
331                                                 regulator-max-microvolt = <3300000>;
332                                         };
333
334                                 // FIXME look at this one
335                                         ldo_rtc {
336                                                 regulator-name = "vdd_rtc_out,vdd_cell";
337                                                 regulator-min-microvolt = <3300000>;
338                                                 regulator-max-microvolt = <3300000>;
339                                                 regulator-always-on;
340                                         };
341                                 };
342                                 */
343                         };
344                 };
345                 i2csw_5: i2c@5 { /* i2c mw 75 0 20 */
346                         #address-cells = <1>;
347                         #size-cells = <0>;
348                         reg = <5>;
349                         /* PS_PMBUS */
350                         ina226@40 { /* u35 */
351                                 compatible = "ti,ina226";
352                                 reg = <0x40>;
353                                 shunt-resistor = <10000>;
354                                 /* MIO31 is alert which should be routed to PMUFW */
355                         };
356                 };
357                 i2csw_6: i2c@6 { /* i2c mw 75 0 40 */
358                         #address-cells = <1>;
359                         #size-cells = <0>;
360                         reg = <6>;
361                         /*
362                          * Not Connected
363                          */
364                 };
365                 i2csw_7: i2c@7 { /* i2c mw 75 0 80 */
366                         #address-cells = <1>;
367                         #size-cells = <0>;
368                         reg = <7>;
369                         /*
370                          * usb5744 (DNP) - U5
371                          * 100kHz - this is default freq for us
372                          */
373                 };
374         };
375 };
376
377 &pinctrl0 {
378         status = "okay";
379         pinctrl_i2c1_default: i2c1-default {
380                 mux {
381                         groups = "i2c1_1_grp";
382                         function = "i2c1";
383                 };
384
385                 conf {
386                         groups = "i2c1_1_grp";
387                         bias-pull-up;
388                         slew-rate = <SLEW_RATE_SLOW>;
389                         io-standard = <IO_STANDARD_LVCMOS18>;
390                 };
391         };
392
393         pinctrl_i2c1_gpio: i2c1-gpio {
394                 mux {
395                         groups = "gpio0_4_grp", "gpio0_5_grp";
396                         function = "gpio0";
397                 };
398
399                 conf {
400                         groups = "gpio0_4_grp", "gpio0_5_grp";
401                         slew-rate = <SLEW_RATE_SLOW>;
402                         io-standard = <IO_STANDARD_LVCMOS18>;
403                 };
404         };
405
406         pinctrl_sdhci0_default: sdhci0-default {
407                 mux {
408                         groups = "sdio0_3_grp";
409                         function = "sdio0";
410                 };
411
412                 conf {
413                         groups = "sdio0_3_grp";
414                         slew-rate = <SLEW_RATE_SLOW>;
415                         io-standard = <IO_STANDARD_LVCMOS18>;
416                         bias-disable;
417                 };
418
419                 mux-cd {
420                         groups = "sdio0_cd_0_grp";
421                         function = "sdio0_cd";
422                 };
423
424                 conf-cd {
425                         groups = "sdio0_cd_0_grp";
426                         bias-high-impedance;
427                         bias-pull-up;
428                         slew-rate = <SLEW_RATE_SLOW>;
429                         io-standard = <IO_STANDARD_LVCMOS18>;
430                 };
431         };
432
433         pinctrl_sdhci1_default: sdhci1-default {
434                 mux {
435                         groups = "sdio1_2_grp";
436                         function = "sdio1";
437                 };
438
439                 conf {
440                         groups = "sdio1_2_grp";
441                         slew-rate = <SLEW_RATE_SLOW>;
442                         io-standard = <IO_STANDARD_LVCMOS18>;
443                         bias-disable;
444                 };
445         };
446
447         pinctrl_spi0_default: spi0-default {
448                 mux {
449                         groups = "spi0_3_grp";
450                         function = "spi0";
451                 };
452
453                 conf {
454                         groups = "spi0_3_grp";
455                         bias-disable;
456                         slew-rate = <SLEW_RATE_SLOW>;
457                         io-standard = <IO_STANDARD_LVCMOS18>;
458                 };
459
460                 mux-cs {
461                         groups = "spi0_ss_9_grp";
462                         function = "spi0_ss";
463                 };
464
465                 conf-cs {
466                         groups = "spi0_ss_9_grp";
467                         bias-disable;
468                 };
469
470         };
471
472         pinctrl_spi1_default: spi1-default {
473                 mux {
474                         groups = "spi1_0_grp";
475                         function = "spi1";
476                 };
477
478                 conf {
479                         groups = "spi1_0_grp";
480                         bias-disable;
481                         slew-rate = <SLEW_RATE_SLOW>;
482                         io-standard = <IO_STANDARD_LVCMOS18>;
483                 };
484
485                 mux-cs {
486                         groups = "spi1_ss_0_grp";
487                         function = "spi1_ss";
488                 };
489
490                 conf-cs {
491                         groups = "spi1_ss_0_grp";
492                         bias-disable;
493                 };
494
495         };
496
497         pinctrl_uart0_default: uart0-default {
498                 mux {
499                         groups = "uart0_0_grp";
500                         function = "uart0";
501                 };
502
503                 conf {
504                         groups = "uart0_0_grp";
505                         slew-rate = <SLEW_RATE_SLOW>;
506                         io-standard = <IO_STANDARD_LVCMOS18>;
507                 };
508
509                 conf-rx {
510                         pins = "MIO3";
511                         bias-high-impedance;
512                 };
513
514                 conf-tx {
515                         pins = "MIO2";
516                         bias-disable;
517                 };
518         };
519
520         pinctrl_uart1_default: uart1-default {
521                 mux {
522                         groups = "uart1_0_grp";
523                         function = "uart1";
524                 };
525
526                 conf {
527                         groups = "uart1_0_grp";
528                         slew-rate = <SLEW_RATE_SLOW>;
529                         io-standard = <IO_STANDARD_LVCMOS18>;
530                 };
531
532                 conf-rx {
533                         pins = "MIO1";
534                         bias-high-impedance;
535                 };
536
537                 conf-tx {
538                         pins = "MIO0";
539                         bias-disable;
540                 };
541         };
542
543         pinctrl_usb0_default: usb0-default {
544                 mux {
545                         groups = "usb0_0_grp";
546                         function = "usb0";
547                 };
548
549                 conf {
550                         groups = "usb0_0_grp";
551                         slew-rate = <SLEW_RATE_SLOW>;
552                         io-standard = <IO_STANDARD_LVCMOS18>;
553                 };
554
555                 conf-rx {
556                         pins = "MIO52", "MIO53", "MIO55";
557                         bias-high-impedance;
558                 };
559
560                 conf-tx {
561                         pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59",
562                                "MIO60", "MIO61", "MIO62", "MIO63";
563                         bias-disable;
564                 };
565         };
566
567         pinctrl_usb1_default: usb1-default {
568                 mux {
569                         groups = "usb1_0_grp";
570                         function = "usb1";
571                 };
572
573                 conf {
574                         groups = "usb1_0_grp";
575                         slew-rate = <SLEW_RATE_SLOW>;
576                         io-standard = <IO_STANDARD_LVCMOS18>;
577                 };
578
579                 conf-rx {
580                         pins = "MIO64", "MIO65", "MIO67";
581                         bias-high-impedance;
582                 };
583
584                 conf-tx {
585                         pins = "MIO66", "MIO68", "MIO69", "MIO70", "MIO71",
586                                "MIO72", "MIO73", "MIO74", "MIO75";
587                         bias-disable;
588                 };
589         };
590 };
591
592 &rtc {
593         status = "okay";
594 };
595
596 /* SD0 only supports 3.3V, no level shifter */
597 &sdhci0 {
598         status = "okay";
599         no-1-8-v;
600         broken-cd; /* CD has to be enabled by default */
601         disable-wp;
602         pinctrl-names = "default";
603         pinctrl-0 = <&pinctrl_sdhci0_default>;
604         xlnx,mio_bank = <0>;
605 };
606
607 &sdhci1 {
608         status = "okay";
609         bus-width = <0x4>;
610         pinctrl-names = "default";
611         pinctrl-0 = <&pinctrl_sdhci1_default>;
612         xlnx,mio_bank = <0>;
613         non-removable;
614         disable-wp;
615         cap-power-off-card;
616         mmc-pwrseq = <&sdio_pwrseq>;
617         vqmmc-supply = <&wmmcsdio_fixed>;
618         #address-cells = <1>;
619         #size-cells = <0>;
620         wlcore: wlcore@2 {
621                 compatible = "ti,wl1831";
622                 reg = <2>;
623                 interrupt-parent = <&gpio>;
624                 interrupts = <76 IRQ_TYPE_EDGE_RISING>; /* MIO76 WLAN_IRQ 1V8 */
625         };
626 };
627
628 &serdes {
629         status = "okay";
630 };
631
632 &spi0 { /* Low Speed connector */
633         status = "okay";
634         pinctrl-names = "default";
635         pinctrl-0 = <&pinctrl_spi0_default>;
636 };
637
638 &spi1 { /* High Speed connector */
639         status = "okay";
640         pinctrl-names = "default";
641         pinctrl-0 = <&pinctrl_spi1_default>;
642 };
643
644 &uart0 {
645         status = "okay";
646         pinctrl-names = "default";
647         pinctrl-0 = <&pinctrl_uart0_default>;
648         bluetooth {
649                 compatible = "ti,wl1831-st";
650                 enable-gpios = <&gpio 8 GPIO_ACTIVE_HIGH>;
651         };
652
653 };
654
655 &uart1 {
656         status = "okay";
657         pinctrl-names = "default";
658         pinctrl-0 = <&pinctrl_uart1_default>;
659
660 };
661
662 /* ULPI SMSC USB3320 */
663 &usb0 {
664         status = "okay";
665         pinctrl-names = "default";
666         pinctrl-0 = <&pinctrl_usb0_default>;
667 };
668
669 &dwc3_0 {
670         status = "okay";
671         dr_mode = "peripheral";
672         phy-names = "usb3-phy";
673         phys = <&lane2 PHY_TYPE_USB3 0 0 26000000>;
674         maximum-speed = "super-speed";
675 };
676
677 /* ULPI SMSC USB3320 */
678 &usb1 {
679         status = "okay";
680         pinctrl-names = "default";
681         pinctrl-0 = <&pinctrl_usb1_default>;
682 };
683
684 &dwc3_1 {
685         status = "okay";
686         dr_mode = "host";
687         phy-names = "usb3-phy";
688         phys = <&lane3 PHY_TYPE_USB3 1 0 26000000>;
689         maximum-speed = "super-speed";
690 };
691
692 &watchdog0 {
693         status = "okay";
694 };
695
696 &zynqmp_dpsub {
697         status = "okay";
698         phy-names = "dp-phy0", "dp-phy1";
699         phys = <&lane1 PHY_TYPE_DP 0 1 27000000>,
700                <&lane0 PHY_TYPE_DP 1 1 27000000>;
701 };
702
703 &zynqmp_dp_snd_pcm0 {
704         status = "okay";
705 };
706
707 &zynqmp_dp_snd_pcm1 {
708         status = "okay";
709 };
710
711 &zynqmp_dp_snd_card0 {
712         status = "okay";
713 };
714
715 &zynqmp_dp_snd_codec0 {
716         status = "okay";
717 };
718
719 &xlnx_dpdma {
720         status = "okay";
721 };
722
723 &xilinx_ams {
724         status = "okay";
725 };
726
727 &ams_ps {
728         status = "okay";
729 };