static int read_sr(struct spi_nor *nor)
{
int ret;
- u8 val;
+ u8 val[2];
- ret = nor->read_reg(nor, SPINOR_OP_RDSR, &val, 1);
- if (ret < 0) {
- pr_err("error %d reading SR\n", (int) ret);
- return ret;
+ if (nor->isparallel) {
+ ret = nor->read_reg(nor, SPINOR_OP_RDSR, &val[0], 2);
+ if (ret < 0) {
+ pr_err("error %d reading SR\n", (int) ret);
+ return ret;
+ }
+ val[0] |= val[1];
+ } else {
+ ret = nor->read_reg(nor, SPINOR_OP_RDSR, &val[0], 1);
+ if (ret < 0) {
+ pr_err("error %d reading SR\n", (int) ret);
+ return ret;
+ }
}
- return val;
+ return val[0];
}
/*
static int read_fsr(struct spi_nor *nor)
{
int ret;
- u8 val;
+ u8 val[2];
- ret = nor->read_reg(nor, SPINOR_OP_RDFSR, &val, 1);
- if (ret < 0) {
- pr_err("error %d reading FSR\n", ret);
- return ret;
+ if (nor->isparallel) {
+ ret = nor->read_reg(nor, SPINOR_OP_RDFSR, &val[0], 2);
+ if (ret < 0) {
+ pr_err("error %d reading FSR\n", ret);
+ return ret;
+ }
+ val[0] &= val[1];
+ } else {
+ ret = nor->read_reg(nor, SPINOR_OP_RDFSR, &val[0], 1);
+ if (ret < 0) {
+ pr_err("error %d reading FSR\n", ret);
+ return ret;
+ }
}
- return val;
+ return val[0];
}
/*
if (ret)
return ret;
+ if (nor->isparallel)
+ nor->spi->master->flags |= SPI_DATA_STRIPE;
/* whole-chip erase? */
if (len == mtd->size) {
write_enable(nor);
instr->state = MTD_ERASE_DONE;
mtd_erase_callback(instr);
+ if (nor->isparallel)
+ nor->spi->master->flags &= ~SPI_DATA_STRIPE;
return ret;
erase_err:
spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_ERASE);
instr->state = MTD_ERASE_FAILED;
+ if (nor->isparallel)
+ nor->spi->master->flags &= ~SPI_DATA_STRIPE;
return ret;
}
int tmp;
u8 id[SPI_NOR_MAX_ID_LEN];
struct flash_info *info;
+ nor->spi->master->flags &= ~SPI_BOTH_FLASH;
+ /* If more than one flash are present,need to read id of second flash */
tmp = nor->read_reg(nor, SPINOR_OP_RDID, id, SPI_NOR_MAX_ID_LEN);
if (tmp < 0) {
dev_dbg(nor->dev, " error %d reading JEDEC ID\n", tmp);
ret = spi_nor_lock_and_prep(nor, SPI_NOR_OPS_READ);
if (ret)
return ret;
+ if (nor->isparallel)
+ nor->spi->master->flags |= SPI_DATA_STRIPE;
if (nor->addr_width == 4) {
/* Wait till previous write/erase is done. */
ret = spi_nor_wait_till_ready(nor);
if (ret)
goto read_err;
+ /* Die cross over issue is not handled */
+ if (nor->isparallel)
+ from /= 2;
ret = nor->read(nor, from, len, retlen, buf);
goto read_err;
}
*retlen = read_count;
read_err:
+ if (nor->isparallel)
+ nor->spi->master->flags &= ~SPI_DATA_STRIPE;
spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_READ);
return ret;
}
ret = spi_nor_lock_and_prep(nor, SPI_NOR_OPS_WRITE);
if (ret)
return ret;
+ if (nor->isparallel)
+ nor->spi->master->flags |= SPI_DATA_STRIPE;
if (nor->addr_width == 4) {
+ /* Die cross over issue is not handled */
ret = spi_nor_write(mtd, offset, len, retlen, buf);
goto write_err;
}
*retlen = write_count;
write_err:
+ if (nor->isparallel)
+ nor->spi->master->flags &= ~SPI_DATA_STRIPE;
spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_WRITE);
return ret;
}
u32 is_dual;
np_spi = of_get_next_parent(np);
- if (of_property_match_string(np_spi, "compatible",
- "xlnx,zynq-qspi-1.0") >= 0) {
+ if ((of_property_match_string(np_spi, "compatible",
+ "xlnx,zynq-qspi-1.0") >= 0) ||
+ (of_property_match_string(np_spi, "compatible",
+ "xlnx,zynqmp-qspi-1.0") >= 0)) {
if (of_property_read_u32(np_spi, "is-dual",
&is_dual) < 0) {
/* Default to single if prop not defined */
mtd->size <<= nor->shift;
nor->isparallel = 1;
nor->isstacked = 0;
+ nor->spi->master->flags |=
+ SPI_BOTH_FLASH;
} else {
#ifdef CONFIG_SPI_ZYNQ_QSPI_DUAL_STACKED
/* dual stacked */