arm64: zynqmp: Add support for Xilinx zc1254 board

This patch adds support for Xilinx zc1254 board.

Only QSPI(single) and uarts are wired on this board.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

diff --git a/arch/arm64/boot/dts/xilinx/Makefile b/arch/arm64/boot/dts/xilinx/Makefile
index 87aff7c6efa00d0637d775197a31e5023ba90c95..3afad6eae67f720849ea036fa5c603203776ea7f 100644 (file)
--- a/arch/arm64/boot/dts/xilinx/Makefile
+++ b/arch/arm64/boot/dts/xilinx/Makefile
@@ -1,5 +1,6 @@
 dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-ep108.dtb
 dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zc1232-revA.dtb
+dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zc1254-revA.dtb
 dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zc1751-xm015-dc1.dtb
 dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zc1751-xm016-dc2.dtb
 dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zc1751-xm017-dc3.dtb

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zc1254-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zc1254-revA.dts
new file mode 100644 (file)
index 0000000..6ee8a74
--- /dev/null
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zc1254-revA.dts
@@ -0,0 +1,73 @@
+/*
+ * dts file for Xilinx ZynqMP ZC1254
+ *
+ * (C) Copyright 2015 - 2017, Xilinx, Inc.
+ *
+ * Michal Simek <michal.simek@xilinx.com>
+ * Siva Durga Prasad Paladugu <sivadur@xilinx.com>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+/dts-v1/;
+
+#include "zynqmp.dtsi"
+#include "zynqmp-clk-ccf.dtsi"
+
+/ {
+       model = "ZynqMP ZC1254 RevA";
+       compatible = "xlnx,zynqmp-zc1254-revA", "xlnx,zynqmp-zc1254", "xlnx,zynqmp";
+
+       aliases {
+               serial0 = &uart0;
+               serial1 = &dcc;
+               spi0 = &qspi;
+       };
+
+       chosen {
+               bootargs = "earlycon";
+               stdout-path = "serial0:115200n8";
+       };
+
+       memory@0 {
+               device_type = "memory";
+               reg = <0x0 0x0 0x0 0x80000000>;
+       };
+};
+
+&dcc {
+       status = "okay";
+};
+
+&qspi {
+       status = "okay";
+       flash@0 {
+               compatible = "m25p80"; /* 32MB */
+               #address-cells = <1>;
+               #size-cells = <1>;
+               reg = <0x0>;
+               spi-tx-bus-width = <1>;
+               spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */
+               spi-max-frequency = <108000000>; /* Based on DC1 spec */
+               partition@qspi-fsbl-uboot { /* for testing purpose */
+                       label = "qspi-fsbl-uboot";
+                       reg = <0x0 0x100000>;
+               };
+               partition@qspi-linux { /* for testing purpose */
+                       label = "qspi-linux";
+                       reg = <0x100000 0x500000>;
+               };
+               partition@qspi-device-tree { /* for testing purpose */
+                       label = "qspi-device-tree";
+                       reg = <0x600000 0x20000>;
+               };
+               partition@qspi-rootfs { /* for testing purpose */
+                       label = "qspi-rootfs";
+                       reg = <0x620000 0x5E0000>;
+               };
+       };
+};
+
+&uart0 {
+       status = "okay";
+};