]> rtime.felk.cvut.cz Git - vajnamar/linux-xlnx.git/commitdiff
net: phy: xilinx_phy: Add support for 2p5G phy
authorKedareswara rao Appana <appana.durga.rao@xilinx.com>
Wed, 2 Aug 2017 09:07:06 +0000 (14:37 +0530)
committerMichal Simek <michal.simek@xilinx.com>
Wed, 2 Aug 2017 10:57:49 +0000 (12:57 +0200)
This patch adds support for 2.5G PCS/PMA PHY

Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Acked-by: Harini Katakam <harinik@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
drivers/net/phy/xilinx_phy.c
include/linux/xilinx_phy.h

index 94fd8baf2745580d73af0fb22e22e605a0860b3d..2410fa3a59ade07d7d730284ba5c085f9d75715a 100644 (file)
@@ -89,6 +89,14 @@ static int xilinxphy_read_status(struct phy_device *phydev)
                phydev->speed = SPEED_1000;
        }
 
+       /* For 2500BASE-X Phy Mode the speed/duplex will always be
+        * 2500Mbps/fullduplex
+        */
+       if (phydev->dev_flags == XAE_PHY_TYPE_2500) {
+               phydev->duplex = DUPLEX_FULL;
+               phydev->speed = SPEED_2500;
+       }
+
        return 0;
 }
 
@@ -104,9 +112,12 @@ static int xilinxphy_of_init(struct phy_device *phydev)
        if (!of_node)
                return -ENODEV;
 
-       if (!of_property_read_u32(of_node, "xlnx,phy-type", &phytype))
+       if (!of_property_read_u32(of_node, "xlnx,phy-type", &phytype)) {
                if (phytype == XAE_PHY_TYPE_1000BASE_X)
                        phydev->dev_flags |= XAE_PHY_TYPE_1000BASE_X;
+               if (phytype == XAE_PHY_TYPE_2500)
+                       phydev->dev_flags |= XAE_PHY_TYPE_2500;
+       }
 
        return 0;
 }
index 56cca817423552d8e56b4b8b5dba811f0a740e35..c523fd9a4c5766fa055ecadac2af0954864465b7 100644 (file)
@@ -14,5 +14,6 @@
 #define XAE_PHY_TYPE_RGMII_2_0         3
 #define XAE_PHY_TYPE_SGMII             4
 #define XAE_PHY_TYPE_1000BASE_X                5
+#define XAE_PHY_TYPE_2500              6
 
 #endif /* _XILINX_PHY_H */