]> rtime.felk.cvut.cz Git - vajnamar/linux-xlnx.git/commitdiff
dwc3: Add support for setting USB control registers as phy platform data
authorAnurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com>
Tue, 18 Apr 2017 15:51:15 +0000 (21:21 +0530)
committerMichal Simek <michal.simek@xilinx.com>
Wed, 19 Apr 2017 09:31:13 +0000 (11:31 +0200)
This patch adds support for setting USB vendor specific control registers
as phy platform data. These registers are used by the phy to configure USB
PIPE signals.

Note:
This patch is a temporary workaround which is done to set pipe signals
without effecting usb cci and this will be redesigned. this change will
get it into v2017.1 and expected to change once the proper solution is
available.

Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
drivers/usb/dwc3/core.c
drivers/usb/dwc3/core.h
drivers/usb/dwc3/dwc3-of-simple.c

index 322a82367a5c7b20a9f97aa2ce0add90a3f490b2..667ea18a067966be52b2a02c60e2d87bc99c65a9 100644 (file)
@@ -893,6 +893,8 @@ static int dwc3_core_get_phy(struct dwc3 *dwc)
                        dev_err(dev, "no usb2 phy configured\n");
                        return ret;
                }
+       } else {
+               dwc3_set_phydata(dev, dwc->usb2_generic_phy);
        }
 
        dwc->usb3_generic_phy = devm_phy_get(dev, "usb3-phy");
@@ -906,6 +908,8 @@ static int dwc3_core_get_phy(struct dwc3 *dwc)
                        dev_err(dev, "no usb3 phy configured\n");
                        return ret;
                }
+       } else {
+               dwc3_set_phydata(dev, dwc->usb3_generic_phy);
        }
 
        return 0;
index e9d5e8345cdca805658bf2a37978cea543f6205f..49fbc5bb8991101a3063d7581985e96b3fdece8f 100644 (file)
@@ -1158,9 +1158,12 @@ static inline bool dwc3_is_usb31(struct dwc3 *dwc)
 
 #if IS_ENABLED(CONFIG_USB_DWC3_OF_SIMPLE)
 int dwc3_enable_hw_coherency(struct device *dev);
+void dwc3_set_phydata(struct device *dev, struct phy *phy);
 #else
 static inline int dwc3_enable_hw_coherency(struct device *dev)
 { return 1; }
+static inline void dwc3_set_phydata(struct device *dev, struct phy *phy)
+{ ; }
 #endif
 
 #if IS_ENABLED(CONFIG_USB_DWC3_HOST) || IS_ENABLED(CONFIG_USB_DWC3_DUAL_ROLE)\
index 09a95566d8e3cad55e8cd5f7f7b4950b2f031bc6..2dfb29f895b5e97108ee6c224e99849f8a2345cd 100644 (file)
@@ -32,6 +32,7 @@
 #include <linux/soc/xilinx/zynqmp/fw.h>
 #include <linux/slab.h>
 
+#include <linux/phy/phy-zynqmp.h>
 #include <linux/of_address.h>
 
 #include "core.h"
@@ -47,6 +48,28 @@ struct dwc3_of_simple {
        void __iomem            *regs;
 };
 
+void dwc3_set_phydata(struct device *dev, struct phy *phy)
+{
+       struct device_node *node = of_get_parent(dev->of_node);
+       int ret;
+
+       if ((node != NULL) &&
+               of_device_is_compatible(node, "xlnx,zynqmp-dwc3")) {
+               struct platform_device *pdev_parent;
+               struct dwc3_of_simple   *simple;
+
+               pdev_parent = of_find_device_by_node(node);
+               simple = platform_get_drvdata(pdev_parent);
+
+               /* assign USB vendor regs to phy lane */
+               ret = xpsgtr_set_protregs(phy, simple->regs);
+               if (ret) {
+                       dev_err(&pdev_parent->dev,
+                               "Not able to set PHY data\n");
+               }
+       }
+}
+
 int dwc3_enable_hw_coherency(struct device *dev)
 {
        struct device_node *node = of_get_parent(dev->of_node);