usb: dwc3: Correct usb dma mask for making SMMU work in device mode

By default dma_coherent_mask is set to 32 bits, because of this the
virtual address generated by the SMMU is masked to 32 bit width.
Due to this reason, the events generated by the USB DMA are not being
updated to the correct physical address and undefined behaviour is
generated.
This patch corrects the above said problem by reading and setting
the DMA coherent mask based on the GHWPARAMS0.MDWIDTH value.

Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 0a41794de7f838b0396909d842177a978fe94a53..1fe81bef57aa813c7026bae764491eb3294998a8 100644 (file)
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -1021,6 +1021,7 @@ static int dwc3_probe(struct platform_device *pdev)
        u8                      lpm_nyet_threshold;
        u8                      tx_de_emphasis;
        u8                      hird_threshold;
+       u32                     mdwidth;
 
        int                     ret;
 
@@ -1152,9 +1153,13 @@ static int dwc3_probe(struct platform_device *pdev)
        if (!dev->dma_mask) {
                dev->dma_mask = dev->parent->dma_mask;
                dev->dma_parms = dev->parent->dma_parms;
-               dma_set_coherent_mask(dev, dev->parent->coherent_dma_mask);
        }
 
+       /* Set dma coherent mask to DMA BUS data width */
+       mdwidth = DWC3_GHWPARAMS0_MDWIDTH(dwc->hwparams.hwparams0);
+       dev_dbg(dev, "Enabling %d-bit DMA addresses.\n", mdwidth);
+       dma_set_coherent_mask(dev, DMA_BIT_MASK(mdwidth));
+
        pm_runtime_set_active(dev);
        pm_runtime_use_autosuspend(dev);
        pm_runtime_set_autosuspend_delay(dev, DWC3_DEFAULT_AUTOSUSPEND_DELAY);