This patch adds the correct acknowledgment of the
ISR Flags. Previously all the bitflags are used to
acknowledge all kind of interrupts.But now required
flags are acknowledged.
Signed-off-by: Mousumi Jana <mousumij@xilinx.com>
Reviewed-by: Kedareswara Rao appana<appanad@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
/* Check for the type of interrupt and Processing it */
if (isr & (XCAN_IXR_SLP_MASK | XCAN_IXR_WKUP_MASK)) {
/* Check for the type of interrupt and Processing it */
if (isr & (XCAN_IXR_SLP_MASK | XCAN_IXR_WKUP_MASK)) {
- priv->write_reg(priv, XCAN_ICR_OFFSET, (XCAN_IXR_SLP_MASK |
- XCAN_IXR_WKUP_MASK));
+ if (isr & XCAN_IXR_SLP_MASK)
+ priv->write_reg(priv, XCAN_ICR_OFFSET, XCAN_IXR_SLP_MASK);
+ if (isr & XCAN_IXR_WKUP_MASK)
+ priv->write_reg(priv, XCAN_ICR_OFFSET, XCAN_IXR_WKUP_MASK);
xcan_state_interrupt(ndev, isr);
}
xcan_state_interrupt(ndev, isr);
}
/* Check for the type of error interrupt and Processing it */
if (isr & (XCAN_IXR_ERROR_MASK | XCAN_IXR_RXOFLW_MASK |
XCAN_IXR_BSOFF_MASK | XCAN_IXR_ARBLST_MASK)) {
/* Check for the type of error interrupt and Processing it */
if (isr & (XCAN_IXR_ERROR_MASK | XCAN_IXR_RXOFLW_MASK |
XCAN_IXR_BSOFF_MASK | XCAN_IXR_ARBLST_MASK)) {
- priv->write_reg(priv, XCAN_ICR_OFFSET, (XCAN_IXR_ERROR_MASK |
- XCAN_IXR_RXOFLW_MASK | XCAN_IXR_BSOFF_MASK |
- XCAN_IXR_ARBLST_MASK));
+ if (isr & XCAN_IXR_ERROR_MASK)
+ priv->write_reg(priv, XCAN_ICR_OFFSET, XCAN_IXR_ERROR_MASK);
+ if (isr & XCAN_IXR_RXOFLW_MASK)
+ priv->write_reg(priv, XCAN_ICR_OFFSET, XCAN_IXR_RXOFLW_MASK);
+ if (isr & XCAN_IXR_BSOFF_MASK)
+ priv->write_reg(priv, XCAN_ICR_OFFSET, XCAN_IXR_BSOFF_MASK);
+ if (isr & XCAN_IXR_ARBLST_MASK)
+ priv->write_reg(priv, XCAN_ICR_OFFSET, XCAN_IXR_ARBLST_MASK);
+
xcan_err_interrupt(ndev, isr);
}
if (priv->quirks & CANFD_SUPPORT) {
xcan_err_interrupt(ndev, isr);
}
if (priv->quirks & CANFD_SUPPORT) {