Documentation: DT: Add support for mcdma

THis patch updates the binding doc with mcdma properties.

Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Acked-by: Harini Katakam <harinik@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

diff --git a/Documentation/devicetree/bindings/net/xilinx_axienet.txt b/Documentation/devicetree/bindings/net/xilinx_axienet.txt
index 672b97e740c71a7c937745dc146ee773a64c9abd..6d682fd186c642edf23e9e51f341ae345fea1f1b 100644 (file)
--- a/Documentation/devicetree/bindings/net/xilinx_axienet.txt
+++ b/Documentation/devicetree/bindings/net/xilinx_axienet.txt
@@ -17,6 +17,9 @@ Required properties:
 - phy-handle           : See ethernet.txt file in the same directory.
 - local-mac-address    : See ethernet.txt file in the same directory.
 - phy-mode             : see ethernet.txt file in the same directory.
+Required properties (When AxiEthernet is configured with MCDMA):
+- xlnx,channel-ids     : Queue Identifier associated with the MCDMA Channel.
+- interrupt-names      : Should contain the interrupt names.
 
 Optional properties:
 - xlnx,rxmem           : Max Rx Memory size.
@@ -29,6 +32,8 @@ Optional properties:
 - xlnx,include-dre     : Tells whether DMA h/w is configured with DRE or not.
 - clocks               : Input clock specifier. Refer to common clock bindings.
 - clock-names          : Input clock name, should be ethernet_clk and dma_clk.
+Optional properties (When AxiEthernet is configured with MCDMA):
+- xlnx,num-queues      : Number of queues h/w configured for.
 
 Example: