drivers/char/xilinx_devcfg.c

   1 /*
   2  * Xilinx Zynq Device Config driver
   3  *
   4  * Copyright (c) 2011 - 2013 Xilinx Inc.
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version
   9  * 2 of the License, or (at your option) any later version.
  10  */
  11
  12 #include <linux/cdev.h>
  13 #include <linux/clk.h>
  14 #include <linux/delay.h>
  15 #include <linux/dma-mapping.h>
  16 #include <linux/fs.h>
  17 #include <linux/init.h>
  18 #include <linux/interrupt.h>
  19 #include <linux/io.h>
  20 #include <linux/ioport.h>
  21 #include <linux/kernel.h>
  22 #include <linux/module.h>
  23 #include <linux/mutex.h>
  24 #include <linux/of.h>
  25 #include <linux/platform_device.h>
  26 #include <linux/slab.h>
  27 #include <linux/string.h>
  28 #include <linux/sysctl.h>
  29 #include <linux/types.h>
  30 #include <linux/uaccess.h>
  31 #include <../../arch/arm/mach-zynq/common.h>
  32
  33 #define DRIVER_NAME "xdevcfg"
  34 #define XDEVCFG_DEVICES 1
  35
  36 /* An array, which is set to true when the device is registered. */
  37 static DEFINE_MUTEX(xdevcfg_mutex);
  38
  39 /* Constant Definitions */
  40 #define XDCFG_CTRL_OFFSET               0x00 /* Control Register */
  41 #define XDCFG_LOCK_OFFSET               0x04 /* Lock Register */
  42 #define XDCFG_INT_STS_OFFSET            0x0C /* Interrupt Status Register */
  43 #define XDCFG_INT_MASK_OFFSET           0x10 /* Interrupt Mask Register */
  44 #define XDCFG_STATUS_OFFSET             0x14 /* Status Register */
  45 #define XDCFG_DMA_SRC_ADDR_OFFSET       0x18 /* DMA Source Address Register */
  46 #define XDCFG_DMA_DEST_ADDR_OFFSET      0x1C /* DMA Destination Address Reg */
  47 #define XDCFG_DMA_SRC_LEN_OFFSET        0x20 /* DMA Source Transfer Length */
  48 #define XDCFG_DMA_DEST_LEN_OFFSET       0x24 /* DMA Destination Transfer */
  49 #define XDCFG_UNLOCK_OFFSET             0x34 /* Unlock Register */
  50 #define XDCFG_MCTRL_OFFSET              0x80 /* Misc. Control Register */
  51
  52 /* Control Register Bit definitions */
  53 #define XDCFG_CTRL_PCFG_PROG_B_MASK     0x40000000 /* Program signal to
  54                                                     * Reset FPGA
  55                                                     */
  56 #define XDCFG_CTRL_PCAP_PR_MASK         0x08000000 /* Enable PCAP for PR */
  57 #define XDCFG_CTRL_PCAP_MODE_MASK       0x04000000 /* Enable PCAP */
  58 #define XDCFG_CTRL_PCAP_RATE_EN_MASK  0x02000000 /* Enable PCAP Quad Rate */
  59 #define XDCFG_CTRL_PCFG_AES_EN_MASK     0x00000E00 /* AES Enable Mask */
  60 #define XDCFG_CTRL_SEU_EN_MASK          0x00000100 /* SEU Enable Mask */
  61 #define XDCFG_CTRL_SPNIDEN_MASK         0x00000040 /* Secure Non Invasive
  62                                                     *  Debug Enable
  63                                                     */
  64 #define XDCFG_CTRL_SPIDEN_MASK          0x00000020 /* Secure Invasive
  65                                                     *  Debug Enable
  66                                                     */
  67 #define XDCFG_CTRL_NIDEN_MASK           0x00000010 /* Non-Invasive Debug
  68                                                     *  Enable
  69                                                     */
  70 #define XDCFG_CTRL_DBGEN_MASK           0x00000008 /* Invasive Debug
  71                                                     *  Enable
  72                                                     */
  73 #define XDCFG_CTRL_DAP_EN_MASK          0x00000007 /* DAP Enable Mask */
  74
  75 /* Lock register bit definitions */
  76
  77 #define XDCFG_LOCK_AES_EN_MASK          0x00000008 /* Lock AES_EN update */
  78 #define XDCFG_LOCK_SEU_MASK             0x00000004 /* Lock SEU_En update */
  79 #define XDCFG_LOCK_DBG_MASK             0x00000001 /* This bit locks
  80                                                     *  security config
  81                                                     *  including: DAP_En,
  82                                                     *  DBGEN,NIDEN, SPNIEN
  83                                                     */
  84
  85 /* Miscellaneous Control Register bit definitions */
  86 #define XDCFG_MCTRL_PCAP_LPBK_MASK      0x00000010 /* Internal PCAP loopback */
  87
  88 /* Status register bit definitions */
  89 #define XDCFG_STATUS_PCFG_INIT_MASK     0x00000010 /* FPGA init status */
  90
  91 /* Interrupt Status/Mask Register Bit definitions */
  92 #define XDCFG_IXR_DMA_DONE_MASK         0x00002000 /* DMA Command Done */
  93 #define XDCFG_IXR_D_P_DONE_MASK         0x00001000 /* DMA and PCAP Cmd Done */
  94 #define XDCFG_IXR_PCFG_DONE_MASK        0x00000004 /* FPGA programmed */
  95 #define XDCFG_IXR_ERROR_FLAGS_MASK      0x00F0F860
  96 #define XDCFG_IXR_ALL_MASK              0xF8F7F87F
  97 /* Miscellaneous constant values */
  98 #define XDCFG_DMA_INVALID_ADDRESS       0xFFFFFFFF  /* Invalid DMA address */
  99
 100 static const char * const fclk_name[] = {
 101         "fclk0",
 102         "fclk1",
 103         "fclk2",
 104         "fclk3"
 105 };
 106 #define NUMFCLKS ARRAY_SIZE(fclk_name)
 107
 108 /**
 109  * struct xdevcfg_drvdata - Device Configuration driver structure
 110  *
 111  * @dev: Pointer to the device structure
 112  * @cdev: Instance of the cdev structure
 113  * @devt: Pointer to the dev_t structure
 114  * @class: Pointer to device class
 115  * @fclk_class: Pointer to fclk device class
 116  * @dma_done: The dma_done status bit for the DMA command completion
 117  * @error_status: The error status captured during the DMA transfer
 118  * @irq: Interrupt number
 119  * @clk: Peripheral clock for devcfg
 120  * @fclk: Array holding references to the FPGA clocks
 121  * @fclk_exported: Flag inidcating whether an FPGA clock is exported
 122  * @is_open: The status bit to indicate whether the device is opened
 123  * @sem: Instance for the mutex
 124  * @lock: Instance of spinlock
 125  * @base_address: The virtual device base address of the device registers
 126  * @ep107: Flags is used to identify the platform
 127  * @endian_swap: Flags is used to identify the endianness format
 128  * @residue_buf: Array holding stragglers from last time (0 to 3 bytes)
 129  * @residue_len: stragglers length in bytes
 130  * @is_partial_bitstream: Status bit to indicate partial/full bitstream
 131  */
 132 struct xdevcfg_drvdata {
 133         struct device *dev;
 134         struct cdev cdev;
 135         dev_t devt;
 136         struct class *class;
 137         struct class *fclk_class;
 138         int irq;
 139         struct clk *clk;
 140         struct clk *fclk[NUMFCLKS];
 141         u8 fclk_exported[NUMFCLKS];
 142         bool dma_done;
 143         int error_status;
 144         bool is_open;
 145         struct mutex sem;
 146         spinlock_t lock;
 147         void __iomem *base_address;
 148         int ep107;
 149         bool is_partial_bitstream;
 150         bool endian_swap;
 151         char residue_buf[3];
 152         int residue_len;
 153 };
 154
 155 /**
 156  * struct fclk_data - FPGA clock data
 157  * @clk: Pointer to clock
 158  * @enabled: Flag indicating enable status of the clock
 159  * @rate_rnd: Rate to be rounded for round rate operation
 160  */
 161 struct fclk_data {
 162         struct clk *clk;
 163         int enabled;
 164         unsigned long rate_rnd;
 165 };
 166
 167 /* Register read/write access routines */
 168 #define xdevcfg_writereg(offset, val)   __raw_writel(val, offset)
 169 #define xdevcfg_readreg(offset)         __raw_readl(offset)
 170
 171 /**
 172  * xdevcfg_reset_pl - Reset the programmable logic.
 173  * @base_address:       The base address of the device.
 174  *
 175  * Must be called with PCAP clock enabled
 176  */
 177 static void xdevcfg_reset_pl(void __iomem *base_address)
 178 {
 179         /*
 180          * Create a rising edge on PCFG_INIT. PCFG_INIT follows PCFG_PROG_B,
 181          * so we need to * poll it after setting PCFG_PROG_B to make sure that
 182          * the rising edge happens.
 183          */
 184         xdevcfg_writereg(base_address + XDCFG_CTRL_OFFSET,
 185                         (xdevcfg_readreg(base_address + XDCFG_CTRL_OFFSET) &
 186                          ~XDCFG_CTRL_PCFG_PROG_B_MASK));
 187         while (xdevcfg_readreg(base_address + XDCFG_STATUS_OFFSET) &
 188                         XDCFG_STATUS_PCFG_INIT_MASK)
 189                 ;
 190
 191         usleep_range(5000, 5100);
 192         xdevcfg_writereg(base_address + XDCFG_CTRL_OFFSET,
 193                         (xdevcfg_readreg(base_address + XDCFG_CTRL_OFFSET) |
 194                          XDCFG_CTRL_PCFG_PROG_B_MASK));
 195         while (!(xdevcfg_readreg(base_address + XDCFG_STATUS_OFFSET) &
 196                                 XDCFG_STATUS_PCFG_INIT_MASK))
 197                 ;
 198 }
 199
 200 /**
 201  * xdevcfg_irq - The main interrupt handler.
 202  * @irq:        The interrupt number.
 203  * @data:       Pointer to the driver data structure.
 204  * returns: IRQ_HANDLED after the interrupt is handled.
 205  **/
 206 static irqreturn_t xdevcfg_irq(int irq, void *data)
 207 {
 208         u32 intr_status;
 209         struct xdevcfg_drvdata *drvdata = data;
 210
 211         spin_lock(&drvdata->lock);
 212
 213         intr_status = xdevcfg_readreg(drvdata->base_address +
 214                                         XDCFG_INT_STS_OFFSET);
 215
 216         /* Clear the interrupts */
 217         xdevcfg_writereg(drvdata->base_address + XDCFG_INT_STS_OFFSET,
 218                                 intr_status);
 219
 220         if ((intr_status & XDCFG_IXR_D_P_DONE_MASK) ==
 221                                 XDCFG_IXR_D_P_DONE_MASK)
 222                 drvdata->dma_done = 1;
 223
 224         if ((intr_status & XDCFG_IXR_ERROR_FLAGS_MASK) ==
 225                         XDCFG_IXR_ERROR_FLAGS_MASK)
 226                 drvdata->error_status = 1;
 227
 228         spin_unlock(&drvdata->lock);
 229
 230         return IRQ_HANDLED;
 231 }
 232
 233 /**
 234  * xdevcfg_write - The is the driver write function.
 235  *
 236  * @file:       Pointer to the file structure.
 237  * @buf:        Pointer to the bitstream location.
 238  * @count:      The number of bytes to be written.
 239  * @ppos:       Pointer to the offset value
 240  * returns:     Success or error status.
 241  **/
 242 static ssize_t
 243 xdevcfg_write(struct file *file, const char __user *buf, size_t count,
 244                 loff_t *ppos)
 245 {
 246         char *kbuf;
 247         int status;
 248         unsigned long timeout;
 249         u32 intr_reg, dma_len;
 250         dma_addr_t dma_addr;
 251         u32 transfer_length = 0;
 252         struct xdevcfg_drvdata *drvdata = file->private_data;
 253         size_t user_count = count;
 254         int i;
 255
 256         status = clk_enable(drvdata->clk);
 257         if (status)
 258                 return status;
 259
 260         status = mutex_lock_interruptible(&drvdata->sem);
 261
 262         if (status)
 263                 goto err_clk;
 264
 265         dma_len = count + drvdata->residue_len;
 266         kbuf = dma_alloc_coherent(drvdata->dev, dma_len, &dma_addr, GFP_KERNEL);
 267         if (!kbuf) {
 268                 status = -ENOMEM;
 269                 goto err_unlock;
 270         }
 271
 272         /* Collect stragglers from last time (0 to 3 bytes) */
 273         memcpy(kbuf, drvdata->residue_buf, drvdata->residue_len);
 274
 275         /* Fetch user data, appending to stragglers */
 276         if (copy_from_user(kbuf + drvdata->residue_len, buf, count)) {
 277                 status = -EFAULT;
 278                 goto error;
 279         }
 280
 281         /* Include stragglers in total bytes to be handled */
 282         count += drvdata->residue_len;
 283
 284         /* First block contains a header */
 285         if (*ppos == 0 && count > 4) {
 286                 /* Look for sync word */
 287                 for (i = 0; i < count - 4; i++) {
 288                         if (memcmp(kbuf + i, "\x66\x55\x99\xAA", 4) == 0) {
 289                                 pr_debug("Found normal sync word\n");
 290                                 drvdata->endian_swap = 0;
 291                                 break;
 292                         }
 293                         if (memcmp(kbuf + i, "\xAA\x99\x55\x66", 4) == 0) {
 294                                 pr_debug("Found swapped sync word\n");
 295                                 drvdata->endian_swap = 1;
 296                                 break;
 297                         }
 298                 }
 299                 /* Remove the header, aligning the data on word boundary */
 300                 if (i != count - 4) {
 301                         count -= i;
 302                         memmove(kbuf, kbuf + i, count);
 303                 }
 304         }
 305
 306         /* Save stragglers for next time */
 307         drvdata->residue_len = count % 4;
 308         count -= drvdata->residue_len;
 309         memcpy(drvdata->residue_buf, kbuf + count, drvdata->residue_len);
 310
 311         /* Fixup endianess of the data */
 312         if (drvdata->endian_swap) {
 313                 for (i = 0; i < count; i += 4) {
 314                         u32 *p = (u32 *)&kbuf[i];
 315                         *p = swab32(*p);
 316                 }
 317         }
 318
 319         /* Enable DMA and error interrupts */
 320         xdevcfg_writereg(drvdata->base_address + XDCFG_INT_STS_OFFSET,
 321                                 XDCFG_IXR_ALL_MASK);
 322
 323
 324         xdevcfg_writereg(drvdata->base_address + XDCFG_INT_MASK_OFFSET,
 325                                 (u32) (~(XDCFG_IXR_D_P_DONE_MASK |
 326                                 XDCFG_IXR_ERROR_FLAGS_MASK)));
 327
 328         drvdata->dma_done = 0;
 329         drvdata->error_status = 0;
 330
 331         /* Initiate DMA write command */
 332         if (count < 0x1000)
 333                 xdevcfg_writereg(drvdata->base_address +
 334                         XDCFG_DMA_SRC_ADDR_OFFSET, (u32)(dma_addr + 1));
 335         else
 336                 xdevcfg_writereg(drvdata->base_address +
 337                         XDCFG_DMA_SRC_ADDR_OFFSET, (u32) dma_addr);
 338
 339         xdevcfg_writereg(drvdata->base_address + XDCFG_DMA_DEST_ADDR_OFFSET,
 340                                 (u32)XDCFG_DMA_INVALID_ADDRESS);
 341         /* Convert number of bytes to number of words.  */
 342         if (count % 4)
 343                 transfer_length = (count / 4 + 1);
 344         else
 345                 transfer_length = count / 4;
 346         xdevcfg_writereg(drvdata->base_address + XDCFG_DMA_SRC_LEN_OFFSET,
 347                                 transfer_length);
 348         xdevcfg_writereg(drvdata->base_address + XDCFG_DMA_DEST_LEN_OFFSET, 0);
 349
 350         timeout = jiffies + msecs_to_jiffies(1000);
 351
 352         while (!READ_ONCE(drvdata->dma_done)) {
 353                 if (time_after(jiffies, timeout)) {
 354                         status = -ETIMEDOUT;
 355                         goto error;
 356                 }
 357         }
 358
 359         if (READ_ONCE(drvdata->error_status))
 360                 status = drvdata->error_status;
 361
 362         /* Disable the DMA and error interrupts */
 363         intr_reg = xdevcfg_readreg(drvdata->base_address +
 364                                         XDCFG_INT_MASK_OFFSET);
 365         xdevcfg_writereg(drvdata->base_address + XDCFG_INT_MASK_OFFSET,
 366                                 intr_reg | (XDCFG_IXR_D_P_DONE_MASK |
 367                                 XDCFG_IXR_ERROR_FLAGS_MASK));
 368
 369         /* If we didn't write correctly, then bail out. */
 370         if (status) {
 371                 status = -EFAULT;
 372                 goto error;
 373         }
 374
 375         *ppos += user_count;
 376         status = user_count;
 377
 378 error:
 379         dma_free_coherent(drvdata->dev, dma_len, kbuf, dma_addr);
 380 err_unlock:
 381         mutex_unlock(&drvdata->sem);
 382 err_clk:
 383         clk_disable(drvdata->clk);
 384         return status;
 385 }
 386
 387
 388 /**
 389  * xdevcfg_read - The is the driver read function.
 390  * @file:       Pointer to the file structure.
 391  * @buf:        Pointer to the bitstream location.
 392  * @count:      The number of bytes read.
 393  * @ppos:       Pointer to the offsetvalue
 394  * returns:     Success or error status.
 395  */
 396 static ssize_t
 397 xdevcfg_read(struct file *file, char __user *buf, size_t count, loff_t *ppos)
 398 {
 399         u32 *kbuf;
 400         int status;
 401         unsigned long timeout;
 402         dma_addr_t dma_addr;
 403         struct xdevcfg_drvdata *drvdata = file->private_data;
 404         u32 intr_reg;
 405
 406         status = clk_enable(drvdata->clk);
 407         if (status)
 408                 return status;
 409
 410         status = mutex_lock_interruptible(&drvdata->sem);
 411         if (status)
 412                 goto err_clk;
 413
 414         /* Get new data from the ICAP, and return was requested. */
 415         kbuf = dma_alloc_coherent(drvdata->dev, count, &dma_addr, GFP_KERNEL);
 416         if (!kbuf) {
 417                 status = -ENOMEM;
 418                 goto err_unlock;
 419         }
 420
 421         drvdata->dma_done = 0;
 422         drvdata->error_status = 0;
 423
 424         /* Enable DMA and error interrupts */
 425         xdevcfg_writereg(drvdata->base_address + XDCFG_INT_STS_OFFSET,
 426                                 XDCFG_IXR_ALL_MASK);
 427
 428         xdevcfg_writereg(drvdata->base_address + XDCFG_INT_MASK_OFFSET,
 429                                 (u32) (~(XDCFG_IXR_D_P_DONE_MASK |
 430                                 XDCFG_IXR_ERROR_FLAGS_MASK)));
 431         /* Initiate DMA read command */
 432         xdevcfg_writereg(drvdata->base_address + XDCFG_DMA_SRC_ADDR_OFFSET,
 433                                 (u32)XDCFG_DMA_INVALID_ADDRESS);
 434         xdevcfg_writereg(drvdata->base_address + XDCFG_DMA_DEST_ADDR_OFFSET,
 435                                 (u32)dma_addr);
 436         xdevcfg_writereg(drvdata->base_address + XDCFG_DMA_SRC_LEN_OFFSET, 0);
 437         xdevcfg_writereg(drvdata->base_address + XDCFG_DMA_DEST_LEN_OFFSET,
 438                                 count / 4);
 439
 440         timeout = jiffies + msecs_to_jiffies(1000);
 441
 442         while (!drvdata->dma_done) {
 443                 if (time_after(jiffies, timeout)) {
 444                         status = -ETIMEDOUT;
 445                         goto error;
 446                 }
 447         }
 448
 449         if (drvdata->error_status)
 450                 status = drvdata->error_status;
 451
 452         /* Disable and clear DMA and error interrupts */
 453         intr_reg = xdevcfg_readreg(drvdata->base_address +
 454                                         XDCFG_INT_MASK_OFFSET);
 455         xdevcfg_writereg(drvdata->base_address + XDCFG_INT_MASK_OFFSET,
 456                                 intr_reg | (XDCFG_IXR_D_P_DONE_MASK |
 457                                 XDCFG_IXR_ERROR_FLAGS_MASK));
 458
 459
 460         /* If we didn't read correctly, then bail out. */
 461         if (status) {
 462                 status = -EFAULT;
 463                 goto error;
 464         }
 465
 466         /* If we fail to return the data to the user, then bail out. */
 467         if (copy_to_user(buf, kbuf, count)) {
 468                 status = -EFAULT;
 469                 goto error;
 470         }
 471
 472         status = count;
 473 error:
 474         dma_free_coherent(drvdata->dev, count, kbuf, dma_addr);
 475 err_unlock:
 476         mutex_unlock(&drvdata->sem);
 477 err_clk:
 478         clk_disable(drvdata->clk);
 479
 480         return status;
 481 }
 482
 483 static void xdevcfg_enable_partial(struct xdevcfg_drvdata *drvdata)
 484 {
 485         u32 reg = xdevcfg_readreg(drvdata->base_address + XDCFG_CTRL_OFFSET);
 486
 487         xdevcfg_writereg(drvdata->base_address + XDCFG_CTRL_OFFSET,
 488                          reg | XDCFG_CTRL_PCAP_PR_MASK);
 489 }
 490
 491 static void xdevcfg_disable_partial(struct xdevcfg_drvdata *drvdata)
 492 {
 493         u32 reg = xdevcfg_readreg(drvdata->base_address + XDCFG_CTRL_OFFSET);
 494
 495         xdevcfg_writereg(drvdata->base_address + XDCFG_CTRL_OFFSET,
 496                          reg & ~XDCFG_CTRL_PCAP_PR_MASK);
 497 }
 498
 499 /**
 500  * xdevcfg_open - The is the driver open function.
 501  * @inode:      Pointer to the inode structure of this device.
 502  * @file:       Pointer to the file structure.
 503  * returns:     Success or error status.
 504  */
 505 static int xdevcfg_open(struct inode *inode, struct file *file)
 506 {
 507         struct xdevcfg_drvdata *drvdata;
 508         int status;
 509
 510         drvdata = container_of(inode->i_cdev, struct xdevcfg_drvdata, cdev);
 511
 512         status = clk_enable(drvdata->clk);
 513         if (status)
 514                 return status;
 515
 516         status = mutex_lock_interruptible(&drvdata->sem);
 517         if (status)
 518                 goto err_clk;
 519
 520         if (drvdata->is_open) {
 521                 status = -EBUSY;
 522                 goto error;
 523         }
 524
 525         file->private_data = drvdata;
 526         drvdata->is_open = 1;
 527         drvdata->endian_swap = 0;
 528         drvdata->residue_len = 0;
 529
 530         /*
 531          * If is_partial_bitstream is set, then PROG_B is not asserted
 532          * (xdevcfg_reset_pl function) and also zynq_slcr_init_preload_fpga and
 533          * zynq_slcr_init_postload_fpga functions are not invoked.
 534          */
 535         if (drvdata->is_partial_bitstream)
 536                 xdevcfg_enable_partial(drvdata);
 537         else
 538                 zynq_slcr_init_preload_fpga();
 539
 540         /*
 541          * Only do the reset of the PL for Zynq as it causes problems on the
 542          * EP107 and the issue is not understood, but not worth investigating
 543          * as the emulation platform is very different than silicon and not a
 544          * complete implementation. Also, do not reset if it is a partial
 545          * bitstream.
 546          */
 547         if ((!drvdata->ep107) && (!drvdata->is_partial_bitstream))
 548                 xdevcfg_reset_pl(drvdata->base_address);
 549
 550         xdevcfg_writereg(drvdata->base_address + XDCFG_INT_STS_OFFSET,
 551                         XDCFG_IXR_PCFG_DONE_MASK);
 552
 553 error:
 554         mutex_unlock(&drvdata->sem);
 555 err_clk:
 556         clk_disable(drvdata->clk);
 557         return status;
 558 }
 559
 560 /**
 561  * xdevcfg_release - The is the driver release function.
 562  * @inode:      Pointer to the inode structure of this device.
 563  * @file:       Pointer to the file structure.
 564  * returns:     Success.
 565  */
 566 static int xdevcfg_release(struct inode *inode, struct file *file)
 567 {
 568         struct xdevcfg_drvdata *drvdata = file->private_data;
 569
 570         if (drvdata->is_partial_bitstream)
 571                 xdevcfg_disable_partial(drvdata);
 572         else
 573                 zynq_slcr_init_postload_fpga();
 574
 575         if (drvdata->residue_len)
 576                 dev_info(drvdata->dev, "Did not transfer last %d bytes\n",
 577                          drvdata->residue_len);
 578
 579         drvdata->is_open = 0;
 580
 581         return 0;
 582 }
 583
 584 static const struct file_operations xdevcfg_fops = {
 585         .owner = THIS_MODULE,
 586         .write = xdevcfg_write,
 587         .read = xdevcfg_read,
 588         .open = xdevcfg_open,
 589         .release = xdevcfg_release,
 590 };
 591
 592 /*
 593  * The following functions are the routines provided to the user to
 594  * set/get the status bit value in the control/lock registers.
 595  */
 596
 597 /**
 598  * xdevcfg_set_dap_en - This function sets the DAP bits in the
 599  * control register with the given value.
 600  * @dev:        Pointer to the device structure.
 601  * @attr:       Pointer to the device attribute structure.
 602  * @buf:        Pointer to the buffer location for the configuration
 603  *              data.
 604  * @size:       The number of bytes used from the buffer
 605  * returns:     negative error if the string could not be converted
 606  *              or the size of the buffer.
 607  */
 608 static ssize_t xdevcfg_set_dap_en(struct device *dev,
 609                 struct device_attribute *attr, const char *buf, size_t size)
 610 {
 611         u32 ctrl_reg_status;
 612         unsigned long flags;
 613         unsigned long mask_bit;
 614         int status;
 615         struct xdevcfg_drvdata *drvdata = dev_get_drvdata(dev);
 616
 617         status = clk_enable(drvdata->clk);
 618         if (status)
 619                 return status;
 620
 621         ctrl_reg_status = xdevcfg_readreg(drvdata->base_address +
 622                                 XDCFG_CTRL_OFFSET);
 623         spin_lock_irqsave(&drvdata->lock, flags);
 624
 625         status = kstrtoul(buf, 10, &mask_bit);
 626
 627         if (status)
 628                 goto err_unlock;
 629
 630         if (mask_bit > 7) {
 631                 status = -EINVAL;
 632                 goto err_unlock;
 633         }
 634
 635         xdevcfg_writereg(drvdata->base_address + XDCFG_CTRL_OFFSET,
 636                         (ctrl_reg_status |
 637                          (((u32)mask_bit) & XDCFG_CTRL_DAP_EN_MASK)));
 638
 639         spin_unlock_irqrestore(&drvdata->lock, flags);
 640
 641         clk_disable(drvdata->clk);
 642
 643         return size;
 644
 645 err_unlock:
 646         spin_unlock_irqrestore(&drvdata->lock, flags);
 647         clk_disable(drvdata->clk);
 648
 649         return status;
 650 }
 651
 652 /**
 653  * xdevcfg_show_dap_en_status - The function returns the DAP_EN bits status in
 654  * the control register.
 655  * @dev:        Pointer to the device structure.
 656  * @attr:       Pointer to the device attribute structure.
 657  * @buf:        Pointer to the buffer location for the configuration
 658  *              data.
 659  * returns:     Size of the buffer.
 660  */
 661 static ssize_t xdevcfg_show_dap_en_status(struct device *dev,
 662                 struct device_attribute *attr, char *buf)
 663 {
 664         u32 dap_en_status;
 665         int status;
 666         struct xdevcfg_drvdata *drvdata = dev_get_drvdata(dev);
 667
 668         status = clk_enable(drvdata->clk);
 669         if (status)
 670                 return status;
 671
 672         dap_en_status = xdevcfg_readreg(drvdata->base_address +
 673                                 XDCFG_CTRL_OFFSET) & XDCFG_CTRL_DAP_EN_MASK;
 674
 675         clk_disable(drvdata->clk);
 676
 677         status = sprintf(buf, "%d\n", dap_en_status);
 678
 679         return status;
 680 }
 681
 682 static DEVICE_ATTR(enable_dap, 0644, xdevcfg_show_dap_en_status,
 683                                 xdevcfg_set_dap_en);
 684
 685 /**
 686  * xdevcfg_set_dbgen - This function sets the DBGEN bit in the
 687  * control register with the given value.
 688  * @dev:        Pointer to the device structure.
 689  * @attr:       Pointer to the device attribute structure.
 690  * @buf:        Pointer to the buffer location for the configuration
 691  *              data.
 692  * @size:       The number of bytes used from the buffer
 693  * returns:     -EINVAL if invalid parameter is sent or size
 694  */
 695 static ssize_t xdevcfg_set_dbgen(struct device *dev,
 696                 struct device_attribute *attr, const char *buf, size_t size)
 697 {
 698         u32 ctrl_reg_status;
 699         unsigned long flags;
 700         unsigned long mask_bit;
 701         int status;
 702         struct xdevcfg_drvdata *drvdata = dev_get_drvdata(dev);
 703
 704         status = clk_enable(drvdata->clk);
 705         if (status)
 706                 return status;
 707
 708         ctrl_reg_status = xdevcfg_readreg(drvdata->base_address +
 709                                 XDCFG_CTRL_OFFSET);
 710
 711         status = kstrtoul(buf, 10, &mask_bit);
 712
 713         if (status)
 714                 goto err_clk;
 715
 716         if (mask_bit > 1) {
 717                 status = -EINVAL;
 718                 goto err_clk;
 719         }
 720
 721         spin_lock_irqsave(&drvdata->lock, flags);
 722
 723         if (mask_bit)
 724                 xdevcfg_writereg(drvdata->base_address + XDCFG_CTRL_OFFSET,
 725                                 (ctrl_reg_status | XDCFG_CTRL_DBGEN_MASK));
 726         else
 727                 xdevcfg_writereg(drvdata->base_address + XDCFG_CTRL_OFFSET,
 728                                 (ctrl_reg_status & (~XDCFG_CTRL_DBGEN_MASK)));
 729
 730         spin_unlock_irqrestore(&drvdata->lock, flags);
 731
 732         clk_disable(drvdata->clk);
 733
 734         return size;
 735
 736 err_clk:
 737         clk_disable(drvdata->clk);
 738
 739         return status;
 740 }
 741
 742 /**
 743  * xdevcfg_show_dbgen_status - The function returns the DBGEN bit status in
 744  * the control register.
 745  * @dev:        Pointer to the device structure.
 746  * @attr:       Pointer to the device attribute structure.
 747  * @buf:        Pointer to the buffer location for the configuration
 748  *              data.
 749  * returns:     Size of the buffer.
 750  */
 751 static ssize_t xdevcfg_show_dbgen_status(struct device *dev,
 752                 struct device_attribute *attr, char *buf)
 753 {
 754         u32 dbgen_status;
 755         ssize_t status;
 756         struct xdevcfg_drvdata *drvdata = dev_get_drvdata(dev);
 757
 758         status = clk_enable(drvdata->clk);
 759         if (status)
 760                 return status;
 761
 762         dbgen_status = xdevcfg_readreg(drvdata->base_address +
 763                                 XDCFG_CTRL_OFFSET) & XDCFG_CTRL_DBGEN_MASK;
 764
 765         clk_disable(drvdata->clk);
 766
 767         status = sprintf(buf, "%d\n", (dbgen_status >> 3));
 768
 769         return status;
 770 }
 771
 772 static DEVICE_ATTR(enable_dbg_in, 0644, xdevcfg_show_dbgen_status,
 773                                 xdevcfg_set_dbgen);
 774
 775 /**
 776  * xdevcfg_set_niden - This function sets the NIDEN bit in the
 777  * control register with the given value.
 778  * @dev:        Pointer to the device structure.
 779  * @attr:       Pointer to the device attribute structure.
 780  * @buf:        Pointer to the buffer location for the configuration
 781  *              data.
 782  * @size:       The number of bytes used from the buffer
 783  * returns:     -EINVAL if invalid parameter is sent or size
 784  */
 785 static ssize_t xdevcfg_set_niden(struct device *dev,
 786                 struct device_attribute *attr, const char *buf, size_t size)
 787 {
 788         u32 ctrl_reg_status;
 789         unsigned long flags;
 790         unsigned long mask_bit;
 791         int status;
 792         struct xdevcfg_drvdata *drvdata = dev_get_drvdata(dev);
 793
 794         status = clk_enable(drvdata->clk);
 795         if (status)
 796                 return status;
 797
 798         ctrl_reg_status = xdevcfg_readreg(drvdata->base_address +
 799                                 XDCFG_CTRL_OFFSET);
 800
 801         status = kstrtoul(buf, 10, &mask_bit);
 802
 803         if (status)
 804                 goto err_clk;
 805
 806         if (mask_bit > 1) {
 807                 status = -EINVAL;
 808                 goto err_clk;
 809         }
 810
 811         spin_lock_irqsave(&drvdata->lock, flags);
 812
 813         if (mask_bit)
 814                 xdevcfg_writereg(drvdata->base_address + XDCFG_CTRL_OFFSET,
 815                                 (ctrl_reg_status | XDCFG_CTRL_NIDEN_MASK));
 816         else
 817                 xdevcfg_writereg(drvdata->base_address + XDCFG_CTRL_OFFSET,
 818                                 (ctrl_reg_status & (~XDCFG_CTRL_NIDEN_MASK)));
 819
 820         spin_unlock_irqrestore(&drvdata->lock, flags);
 821
 822         clk_disable(drvdata->clk);
 823
 824         return size;
 825
 826 err_clk:
 827         clk_disable(drvdata->clk);
 828
 829         return status;
 830 }
 831
 832 /**
 833  * xdevcfg_show_niden_status - The function returns the NIDEN bit status in
 834  * the control register.
 835  * @dev:        Pointer to the device structure.
 836  * @attr:       Pointer to the device attribute structure.
 837  * @buf:        Pointer to the buffer location for the configuration
 838  *              data.
 839  * returns:     Size of the buffer.
 840  */
 841 static ssize_t xdevcfg_show_niden_status(struct device *dev,
 842                 struct device_attribute *attr, char *buf)
 843 {
 844         u32 niden_status;
 845         ssize_t status;
 846         struct xdevcfg_drvdata *drvdata = dev_get_drvdata(dev);
 847
 848         status = clk_enable(drvdata->clk);
 849         if (status)
 850                 return status;
 851
 852         niden_status = xdevcfg_readreg(drvdata->base_address +
 853                                 XDCFG_CTRL_OFFSET) & XDCFG_CTRL_NIDEN_MASK;
 854
 855         clk_disable(drvdata->clk);
 856
 857         status = sprintf(buf, "%d\n", (niden_status >> 4));
 858
 859         return status;
 860 }
 861
 862 static DEVICE_ATTR(enable_dbg_nonin, 0644, xdevcfg_show_niden_status,
 863                         xdevcfg_set_niden);
 864
 865 /**
 866  * xdevcfg_set_spiden - This function sets the SPIDEN bit in the
 867  * control register with the given value.
 868  * @dev:        Pointer to the device structure.
 869  * @attr:       Pointer to the device attribute structure.
 870  * @buf:        Pointer to the buffer location for the configuration
 871  *              data.
 872  * @size:       The number of bytes used from the buffer
 873  * returns:     -EINVAL if invalid parameter is sent or size
 874  */
 875 static ssize_t xdevcfg_set_spiden(struct device *dev,
 876                 struct device_attribute *attr, const char *buf, size_t size)
 877 {
 878         u32 ctrl_reg_status;
 879         unsigned long flags;
 880         unsigned long mask_bit;
 881         int status;
 882         struct xdevcfg_drvdata *drvdata = dev_get_drvdata(dev);
 883
 884         status = clk_enable(drvdata->clk);
 885         if (status)
 886                 return status;
 887
 888         ctrl_reg_status = xdevcfg_readreg(drvdata->base_address +
 889                                 XDCFG_CTRL_OFFSET);
 890
 891         status = kstrtoul(buf, 10, &mask_bit);
 892
 893         if (status)
 894                 goto err_clk;
 895
 896         if (mask_bit > 1) {
 897                 status = -EINVAL;
 898                 goto err_clk;
 899         }
 900
 901         spin_lock_irqsave(&drvdata->lock, flags);
 902
 903         if (mask_bit)
 904                 xdevcfg_writereg(drvdata->base_address + XDCFG_CTRL_OFFSET,
 905                                 (ctrl_reg_status | XDCFG_CTRL_SPIDEN_MASK));
 906         else
 907
 908                 xdevcfg_writereg(drvdata->base_address + XDCFG_CTRL_OFFSET,
 909                                 (ctrl_reg_status & (~XDCFG_CTRL_SPIDEN_MASK)));
 910
 911         spin_unlock_irqrestore(&drvdata->lock, flags);
 912
 913         clk_disable(drvdata->clk);
 914
 915         return size;
 916
 917 err_clk:
 918         clk_disable(drvdata->clk);
 919
 920         return status;
 921 }
 922
 923 /**
 924  * xdevcfg_show_spiden_status - The function returns the SPIDEN bit status in
 925  * the control register.
 926  * @dev:        Pointer to the device structure.
 927  * @attr:       Pointer to the device attribute structure.
 928  * @buf:        Pointer to the buffer location for the configuration
 929  *              data.
 930  * returns:     Size of the buffer.
 931  */
 932 static ssize_t xdevcfg_show_spiden_status(struct device *dev,
 933                 struct device_attribute *attr, char *buf)
 934 {
 935         u32 spiden_status;
 936         ssize_t status;
 937         struct xdevcfg_drvdata *drvdata = dev_get_drvdata(dev);
 938
 939         status = clk_enable(drvdata->clk);
 940         if (status)
 941                 return status;
 942
 943         spiden_status = xdevcfg_readreg(drvdata->base_address +
 944                         XDCFG_CTRL_OFFSET) & XDCFG_CTRL_SPIDEN_MASK;
 945
 946         clk_disable(drvdata->clk);
 947
 948         status = sprintf(buf, "%d\n", (spiden_status >> 5));
 949
 950         return status;
 951 }
 952
 953 static DEVICE_ATTR(enable_sec_dbg_in, 0644, xdevcfg_show_spiden_status,
 954                                 xdevcfg_set_spiden);
 955
 956 /**
 957  * xdevcfg_set_spniden - This function sets the SPNIDEN bit in the
 958  * control register with the given value.
 959  * @dev:        Pointer to the device structure.
 960  * @attr:       Pointer to the device attribute structure.
 961  * @buf:        Pointer to the buffer location for the configuration
 962  *              data.
 963  * @size:       The number of bytes used from the buffer
 964  * returns:     -EINVAL if invalid parameter is sent or the size of buffer
 965  */
 966 static ssize_t xdevcfg_set_spniden(struct device *dev,
 967                 struct device_attribute *attr, const char *buf, size_t size)
 968 {
 969         u32 ctrl_reg_status;
 970         unsigned long flags;
 971         unsigned long mask_bit;
 972         ssize_t status;
 973         struct xdevcfg_drvdata *drvdata = dev_get_drvdata(dev);
 974
 975         status = clk_enable(drvdata->clk);
 976         if (status)
 977                 return status;
 978
 979         ctrl_reg_status = xdevcfg_readreg(drvdata->base_address +
 980                                 XDCFG_CTRL_OFFSET);
 981         status = kstrtoul(buf, 10, &mask_bit);
 982
 983         if (status)
 984                 goto err_clk;
 985
 986         if (mask_bit > 1) {
 987                 status = -EINVAL;
 988                 goto err_clk;
 989         }
 990
 991         spin_lock_irqsave(&drvdata->lock, flags);
 992
 993         if (mask_bit)
 994                 xdevcfg_writereg(drvdata->base_address + XDCFG_CTRL_OFFSET,
 995                                 (ctrl_reg_status | XDCFG_CTRL_SPNIDEN_MASK));
 996         else
 997                 xdevcfg_writereg(drvdata->base_address + XDCFG_CTRL_OFFSET,
 998                                 (ctrl_reg_status & (~XDCFG_CTRL_SPNIDEN_MASK)));
 999
1000         spin_unlock_irqrestore(&drvdata->lock, flags);
1001
1002         clk_disable(drvdata->clk);
1003
1004         return size;
1005
1006 err_clk:
1007         clk_disable(drvdata->clk);
1008
1009         return status;
1010 }
1011
1012 /**
1013  * xdevcfg_show_spniden_status - The function returns the SPNIDEN bit status
1014  * in the control register.
1015  * @dev:        Pointer to the device structure.
1016  * @attr:       Pointer to the device attribute structure.
1017  * @buf:        Pointer to the buffer location for the configuration
1018  *              data.
1019  * returns:     Size of the buffer.
1020  */
1021 static ssize_t xdevcfg_show_spniden_status(struct device *dev,
1022                 struct device_attribute *attr, char *buf)
1023 {
1024         u32 spniden_status;
1025         ssize_t status;
1026         struct xdevcfg_drvdata *drvdata = dev_get_drvdata(dev);
1027
1028         status = clk_enable(drvdata->clk);
1029         if (status)
1030                 return status;
1031
1032         spniden_status = xdevcfg_readreg(drvdata->base_address +
1033                         XDCFG_CTRL_OFFSET) & XDCFG_CTRL_SPNIDEN_MASK;
1034
1035         clk_disable(drvdata->clk);
1036
1037         status = sprintf(buf, "%d\n", (spniden_status >> 6));
1038
1039         return status;
1040 }
1041
1042 static DEVICE_ATTR(enable_sec_dbg_nonin, 0644, xdevcfg_show_spniden_status,
1043                                         xdevcfg_set_spniden);
1044
1045 /**
1046  * xdevcfg_set_seu - This function sets the SEU_EN bit in the
1047  * control register with the given value
1048  * @dev:        Pointer to the device structure.
1049  * @attr:       Pointer to the device attribute structure.
1050  * @buf:        Pointer to the buffer location for the configuration
1051  *              data.
1052  * @size:       The number of bytes used from the buffer
1053  * returns:     -EINVAL if invalid parameter is sent or size
1054  */
1055 static ssize_t xdevcfg_set_seu(struct device *dev,
1056                 struct device_attribute *attr, const char *buf, size_t size)
1057 {
1058         u32 ctrl_reg_status;
1059         unsigned long flags;
1060         unsigned long mask_bit;
1061         ssize_t status;
1062         struct xdevcfg_drvdata *drvdata = dev_get_drvdata(dev);
1063
1064         status = clk_enable(drvdata->clk);
1065         if (status)
1066                 return status;
1067
1068         ctrl_reg_status = xdevcfg_readreg(drvdata->base_address +
1069                                 XDCFG_CTRL_OFFSET);
1070
1071         status = kstrtoul(buf, 10, &mask_bit);
1072
1073         if (status)
1074                 goto err_clk;
1075
1076         if (mask_bit > 1) {
1077                 status = -EINVAL;
1078                 goto err_clk;
1079         }
1080
1081         spin_lock_irqsave(&drvdata->lock, flags);
1082
1083         if (mask_bit)
1084                 xdevcfg_writereg(drvdata->base_address + XDCFG_CTRL_OFFSET,
1085                                 (ctrl_reg_status | XDCFG_CTRL_SEU_EN_MASK));
1086         else
1087                 xdevcfg_writereg(drvdata->base_address + XDCFG_CTRL_OFFSET,
1088                                 (ctrl_reg_status & (~XDCFG_CTRL_SEU_EN_MASK)));
1089
1090         spin_unlock_irqrestore(&drvdata->lock, flags);
1091
1092         clk_disable(drvdata->clk);
1093
1094         return size;
1095
1096 err_clk:
1097         clk_disable(drvdata->clk);
1098
1099         return status;
1100 }
1101
1102 /**
1103  * xdevcfg_show_seu_status - The function returns the SEU_EN bit status
1104  * in the control register.
1105  * @dev:        Pointer to the device structure.
1106  * @attr:       Pointer to the device attribute structure.
1107  * @buf:        Pointer to the buffer location for the configuration
1108  *              data.
1109  * returns:     size of the buffer.
1110  */
1111 static ssize_t xdevcfg_show_seu_status(struct device *dev,
1112                 struct device_attribute *attr, char *buf)
1113 {
1114         u32 seu_status;
1115         ssize_t status;
1116         struct xdevcfg_drvdata *drvdata = dev_get_drvdata(dev);
1117
1118         status = clk_enable(drvdata->clk);
1119         if (status)
1120                 return status;
1121
1122         seu_status = xdevcfg_readreg(drvdata->base_address +
1123                         XDCFG_CTRL_OFFSET) & XDCFG_CTRL_SEU_EN_MASK;
1124
1125         clk_disable(drvdata->clk);
1126
1127         status = sprintf(buf, "%d\n", (seu_status > 8));
1128
1129         return status;
1130 }
1131
1132 static DEVICE_ATTR(enable_seu, 0644, xdevcfg_show_seu_status, xdevcfg_set_seu);
1133
1134 /**
1135  * xdevcfg_set_aes - This function sets the AES_EN bits in the
1136  * control register with either all 1s or all 0s.
1137  * @dev:        Pointer to the device structure.
1138  * @attr:       Pointer to the device attribute structure.
1139  * @buf:        Pointer to the buffer location for the configuration
1140  *              data.
1141  * @size:       The number of bytes used from the buffer
1142  * returns:     -EINVAL if invalid parameter is sent or size
1143  *
1144  * The user must send only one bit in the buffer to notify whether he wants to
1145  * either set or reset these bits.
1146  */
1147 static ssize_t xdevcfg_set_aes(struct device *dev,
1148                 struct device_attribute *attr, const char *buf, size_t size)
1149 {
1150         u32 ctrl_reg_status;
1151         unsigned long flags;
1152         unsigned long mask_bit;
1153         int status;
1154         struct xdevcfg_drvdata *drvdata = dev_get_drvdata(dev);
1155
1156         status = clk_enable(drvdata->clk);
1157         if (status)
1158                 return status;
1159
1160         ctrl_reg_status = xdevcfg_readreg(drvdata->base_address +
1161                                 XDCFG_CTRL_OFFSET);
1162
1163         status = kstrtoul(buf, 10, &mask_bit);
1164
1165         if (status < 0)
1166                 goto err_clk;
1167
1168         if (mask_bit > 1) {
1169                 status = -EINVAL;
1170                 goto err_clk;
1171         }
1172
1173
1174         spin_lock_irqsave(&drvdata->lock, flags);
1175
1176         if (mask_bit)
1177                 xdevcfg_writereg(drvdata->base_address + XDCFG_CTRL_OFFSET,
1178                                 (ctrl_reg_status |
1179                                  XDCFG_CTRL_PCFG_AES_EN_MASK |
1180                                  XDCFG_CTRL_PCAP_RATE_EN_MASK));
1181         else
1182                 xdevcfg_writereg(drvdata->base_address + XDCFG_CTRL_OFFSET,
1183                                 (ctrl_reg_status &
1184                                  ~(XDCFG_CTRL_PCFG_AES_EN_MASK |
1185                                  XDCFG_CTRL_PCAP_RATE_EN_MASK)));
1186
1187         spin_unlock_irqrestore(&drvdata->lock, flags);
1188
1189         clk_disable(drvdata->clk);
1190
1191         return size;
1192
1193 err_clk:
1194         clk_disable(drvdata->clk);
1195
1196         return status;
1197 }
1198
1199 /**
1200  * xdevcfg_show_aes_status - The function returns the AES_EN bit status
1201  * in the control register.
1202  * @dev:        Pointer to the device structure.
1203  * @attr:       Pointer to the device attribute structure.
1204  * @buf:        Pointer to the buffer location for the configuration
1205  *              data.
1206  * returns:     size of the buffer.
1207  */
1208 static ssize_t xdevcfg_show_aes_status(struct device *dev,
1209                 struct device_attribute *attr, char *buf)
1210 {
1211         u32 aes_status;
1212         ssize_t status;
1213         struct xdevcfg_drvdata *drvdata = dev_get_drvdata(dev);
1214
1215         status = clk_enable(drvdata->clk);
1216         if (status)
1217                 return status;
1218
1219         aes_status = xdevcfg_readreg(drvdata->base_address +
1220                         XDCFG_CTRL_OFFSET) & XDCFG_CTRL_PCFG_AES_EN_MASK;
1221
1222         clk_disable(drvdata->clk);
1223
1224         status = sprintf(buf, "%d\n", (aes_status >> 9));
1225
1226         return status;
1227 }
1228
1229 static DEVICE_ATTR(enable_aes, 0644, xdevcfg_show_aes_status, xdevcfg_set_aes);
1230
1231 /**
1232  * xdevcfg_set_aes_en_lock - This function sets the LOCK_AES_EN bit in the
1233  * lock register.
1234  * @dev:        Pointer to the device structure.
1235  * @attr:       Pointer to the device attribute structure.
1236  * @buf:        Pointer to the buffer location for the configuration
1237  *              data.
1238  * @size:       The number of bytes used from the buffer
1239  * returns:     -EINVAL if invalid parameter is sent or size
1240  */
1241 static ssize_t xdevcfg_set_aes_en_lock(struct device *dev,
1242                 struct device_attribute *attr, const char *buf, size_t size)
1243 {
1244         u32 aes_en_lock_status;
1245         unsigned long flags;
1246         unsigned long mask_bit;
1247         ssize_t status;
1248         struct xdevcfg_drvdata *drvdata = dev_get_drvdata(dev);
1249
1250         status = clk_enable(drvdata->clk);
1251         if (status)
1252                 return status;
1253
1254         aes_en_lock_status = xdevcfg_readreg(drvdata->base_address +
1255                                 XDCFG_LOCK_OFFSET);
1256
1257         status = kstrtoul(buf, 10, &mask_bit);
1258
1259         if (status)
1260                 goto err_clk;
1261
1262         if (mask_bit > 1) {
1263                 status = -EINVAL;
1264                 goto err_clk;
1265         }
1266
1267         spin_lock_irqsave(&drvdata->lock, flags);
1268
1269         if (mask_bit)
1270                 xdevcfg_writereg(drvdata->base_address + XDCFG_LOCK_OFFSET,
1271                                 (aes_en_lock_status | XDCFG_LOCK_AES_EN_MASK));
1272         else
1273                 xdevcfg_writereg(drvdata->base_address + XDCFG_LOCK_OFFSET,
1274                                 (aes_en_lock_status &
1275                                  (~XDCFG_LOCK_AES_EN_MASK)));
1276
1277         spin_unlock_irqrestore(&drvdata->lock, flags);
1278
1279         clk_disable(drvdata->clk);
1280
1281         return size;
1282
1283 err_clk:
1284         clk_disable(drvdata->clk);
1285
1286         return status;
1287 }
1288
1289 /**
1290  * xdevcfg_show_aes_en_lock_status - The function returns the LOCK_AES_EN bit
1291  * status in the lock register.
1292  * @dev:        Pointer to the device structure.
1293  * @attr:       Pointer to the device attribute structure.
1294  * @buf:        Pointer to the buffer location for the configuration
1295  *              data.
1296  * returns:     size of the buffer.
1297  */
1298 static ssize_t xdevcfg_show_aes_en_lock_status(struct device *dev,
1299                 struct device_attribute *attr, char *buf)
1300 {
1301         u32 aes_en_lock_status;
1302         ssize_t status;
1303         struct xdevcfg_drvdata *drvdata = dev_get_drvdata(dev);
1304
1305         status = clk_enable(drvdata->clk);
1306         if (status)
1307                 return status;
1308
1309         aes_en_lock_status = xdevcfg_readreg(drvdata->base_address +
1310                         XDCFG_LOCK_OFFSET) & XDCFG_LOCK_AES_EN_MASK;
1311
1312         clk_disable(drvdata->clk);
1313
1314         status = sprintf(buf, "%d\n", (aes_en_lock_status >> 3));
1315
1316         return status;
1317 }
1318
1319 static DEVICE_ATTR(aes_en_lock, 0644, xdevcfg_show_aes_en_lock_status,
1320                                 xdevcfg_set_aes_en_lock);
1321
1322 /**
1323  * xdevcfg_set_seu_lock - This function sets the LOCK_SEU bit in the
1324  * lock register.
1325  * @dev:        Pointer to the device structure.
1326  * @attr:       Pointer to the device attribute structure.
1327  * @buf:        Pointer to the buffer location for the configuration
1328  *              data.
1329  * @size:       The number of bytes used from the buffer
1330  * returns:     -EINVAL if invalid parameter is sent or size
1331  */
1332 static ssize_t xdevcfg_set_seu_lock(struct device *dev,
1333                 struct device_attribute *attr, const char *buf, size_t size)
1334 {
1335         u32 seu_lock_status;
1336         unsigned long flags;
1337         unsigned long mask_bit;
1338         ssize_t status;
1339         struct xdevcfg_drvdata *drvdata = dev_get_drvdata(dev);
1340
1341         status = clk_enable(drvdata->clk);
1342         if (status)
1343                 return status;
1344
1345         seu_lock_status = xdevcfg_readreg(drvdata->base_address +
1346                                 XDCFG_LOCK_OFFSET);
1347
1348         status = kstrtoul(buf, 10, &mask_bit);
1349
1350         if (status)
1351                 goto err_clk;
1352
1353         if (mask_bit > 1) {
1354                 status = -EINVAL;
1355                 goto err_clk;
1356         }
1357
1358         spin_lock_irqsave(&drvdata->lock, flags);
1359
1360         if (mask_bit)
1361                 xdevcfg_writereg(drvdata->base_address + XDCFG_LOCK_OFFSET,
1362                                 (seu_lock_status | XDCFG_LOCK_SEU_MASK));
1363         else
1364                 xdevcfg_writereg(drvdata->base_address + XDCFG_LOCK_OFFSET,
1365                                 (seu_lock_status  & (~XDCFG_LOCK_SEU_MASK)));
1366
1367         spin_unlock_irqrestore(&drvdata->lock, flags);
1368
1369         clk_disable(drvdata->clk);
1370
1371         return size;
1372
1373 err_clk:
1374         clk_disable(drvdata->clk);
1375
1376         return status;
1377 }
1378
1379 /**
1380  * xdevcfg_show_seu_lock_status - The function returns the LOCK_SEU bit
1381  * status in the lock register.
1382  * @dev:        Pointer to the device structure.
1383  * @attr:       Pointer to the device attribute structure.
1384  * @buf:        Pointer to the buffer location for the configuration
1385  *              data.
1386  * returns:     size of the buffer.
1387  */
1388 static ssize_t xdevcfg_show_seu_lock_status(struct device *dev,
1389                 struct device_attribute *attr, char *buf)
1390 {
1391         u32 seu_lock_status;
1392         ssize_t status;
1393         struct xdevcfg_drvdata *drvdata = dev_get_drvdata(dev);
1394
1395         status = clk_enable(drvdata->clk);
1396         if (status)
1397                 return status;
1398
1399         seu_lock_status = xdevcfg_readreg(drvdata->base_address +
1400                         XDCFG_LOCK_OFFSET) & XDCFG_LOCK_SEU_MASK;
1401
1402         clk_disable(drvdata->clk);
1403
1404         status = sprintf(buf, "%d\n", (seu_lock_status >> 2));
1405
1406         return status;
1407 }
1408
1409 static DEVICE_ATTR(seu_lock, 0644, xdevcfg_show_seu_lock_status,
1410                                         xdevcfg_set_seu_lock);
1411
1412 /**
1413  * xdevcfg_set_dbg_lock - This function sets the LOCK_DBG bit in the
1414  * lock register.
1415  * @dev:        Pointer to the device structure.
1416  * @attr:       Pointer to the device attribute structure.
1417  * @buf:        Pointer to the buffer location for the configuration
1418  *              data.
1419  * @size:       The number of bytes used from the buffer
1420  * returns:     -EINVAL if invalid parameter is sent or size
1421  */
1422 static ssize_t xdevcfg_set_dbg_lock(struct device *dev,
1423                 struct device_attribute *attr, const char *buf, size_t size)
1424 {
1425         u32 lock_reg_status;
1426         unsigned long flags;
1427         unsigned long mask_bit;
1428         ssize_t status;
1429         struct xdevcfg_drvdata *drvdata = dev_get_drvdata(dev);
1430
1431         status = clk_enable(drvdata->clk);
1432         if (status)
1433                 return status;
1434
1435         lock_reg_status = xdevcfg_readreg(drvdata->base_address +
1436                                 XDCFG_LOCK_OFFSET);
1437         status = kstrtoul(buf, 10, &mask_bit);
1438
1439         if (status)
1440                 goto err_clk;
1441
1442         if (mask_bit > 1) {
1443                 status = -EINVAL;
1444                 goto err_clk;
1445         }
1446
1447         spin_lock_irqsave(&drvdata->lock, flags);
1448
1449         if (mask_bit)
1450                 xdevcfg_writereg(drvdata->base_address + XDCFG_LOCK_OFFSET,
1451                                 (lock_reg_status | XDCFG_LOCK_DBG_MASK));
1452         else
1453                 xdevcfg_writereg(drvdata->base_address + XDCFG_LOCK_OFFSET,
1454                                 (lock_reg_status & (~XDCFG_LOCK_DBG_MASK)));
1455
1456         spin_unlock_irqrestore(&drvdata->lock, flags);
1457
1458         clk_disable(drvdata->clk);
1459
1460         return size;
1461
1462 err_clk:
1463         clk_disable(drvdata->clk);
1464
1465         return status;
1466 }
1467
1468 /**
1469  * xdevcfg_show_dbg_lock_status - The function returns the LOCK_DBG bit
1470  * status in the lock register.
1471  * @dev:        Pointer to the device structure.
1472  * @attr:       Pointer to the device attribute structure.
1473  * @buf:        Pointer to the buffer location for the configuration
1474  *              data.
1475  * returns:     size of the buffer.
1476  */
1477 static ssize_t xdevcfg_show_dbg_lock_status(struct device *dev,
1478                 struct device_attribute *attr, char *buf)
1479 {
1480         u32 dbg_lock_status;
1481         ssize_t status;
1482         struct xdevcfg_drvdata *drvdata = dev_get_drvdata(dev);
1483
1484         status = clk_enable(drvdata->clk);
1485         if (status)
1486                 return status;
1487
1488         dbg_lock_status = xdevcfg_readreg(drvdata->base_address +
1489                         XDCFG_LOCK_OFFSET) & XDCFG_LOCK_DBG_MASK;
1490
1491         clk_disable(drvdata->clk);
1492
1493         status = sprintf(buf, "%d\n", dbg_lock_status);
1494
1495         return status;
1496 }
1497
1498 static DEVICE_ATTR(dbg_lock, 0644, xdevcfg_show_dbg_lock_status,
1499                                 xdevcfg_set_dbg_lock);
1500
1501 /**
1502  * xdevcfg_show_prog_done_status - The function returns the PROG_DONE bit
1503  * status in the interrupt status register.
1504  * @dev:        Pointer to the device structure.
1505  * @attr:       Pointer to the device attribute structure.
1506  * @buf:        Pointer to the buffer location for the configuration
1507  *              data.
1508  * returns:     size of the buffer.
1509  */
1510 static ssize_t xdevcfg_show_prog_done_status(struct device *dev,
1511                 struct device_attribute *attr, char *buf)
1512 {
1513         u32 prog_done_status;
1514         ssize_t status;
1515         struct xdevcfg_drvdata *drvdata = dev_get_drvdata(dev);
1516
1517         status = clk_enable(drvdata->clk);
1518         if (status)
1519                 return status;
1520
1521         prog_done_status = xdevcfg_readreg(drvdata->base_address +
1522                         XDCFG_INT_STS_OFFSET) & XDCFG_IXR_PCFG_DONE_MASK;
1523
1524         clk_disable(drvdata->clk);
1525
1526         status = sprintf(buf, "%d\n", (prog_done_status >> 2));
1527
1528         return status;
1529 }
1530
1531 static DEVICE_ATTR(prog_done, 0644, xdevcfg_show_prog_done_status,
1532                                 NULL);
1533
1534 /**
1535  * xdevcfg_set_is_partial_bitstream - This function sets the
1536  * is_partial_bitstream variable. If is_partial_bitstream is set,
1537  * then PROG_B is not asserted (xdevcfg_reset_pl) and also
1538  * zynq_slcr_init_preload_fpga and zynq_slcr_init_postload_fpga functions
1539  * are not invoked.
1540  * @dev:        Pointer to the device structure.
1541  * @attr:       Pointer to the device attribute structure.
1542  * @buf:        Pointer to the buffer location for the configuration
1543  *              data.
1544  * @size:       The number of bytes used from the buffer
1545  * returns:     -EINVAL if invalid parameter is sent or size
1546  */
1547 static ssize_t xdevcfg_set_is_partial_bitstream(struct device *dev,
1548                 struct device_attribute *attr, const char *buf, size_t size)
1549 {
1550         unsigned long mask_bit;
1551         ssize_t status;
1552         struct xdevcfg_drvdata *drvdata = dev_get_drvdata(dev);
1553
1554         status = kstrtoul(buf, 10, &mask_bit);
1555
1556         if (status)
1557                 return status;
1558
1559         if (mask_bit > 1)
1560                 return -EINVAL;
1561
1562         if (mask_bit)
1563                 drvdata->is_partial_bitstream = 1;
1564         else
1565                 drvdata->is_partial_bitstream = 0;
1566
1567         return size;
1568 }
1569
1570 /**
1571  * xdevcfg_show_is_partial_bitstream_status - The function returns the
1572  * value of is_partial_bitstream variable.
1573  * @dev:        Pointer to the device structure.
1574  * @attr:       Pointer to the device attribute structure.
1575  * @buf:        Pointer to the buffer location for the configuration
1576  *              data.
1577  * returns:     size of the buffer.
1578  */
1579 static ssize_t xdevcfg_show_is_partial_bitstream_status(struct device *dev,
1580                 struct device_attribute *attr, char *buf)
1581 {
1582         ssize_t status;
1583         struct xdevcfg_drvdata *drvdata = dev_get_drvdata(dev);
1584
1585         status = sprintf(buf, "%d\n", drvdata->is_partial_bitstream);
1586
1587         return status;
1588 }
1589
1590 static DEVICE_ATTR(is_partial_bitstream, 0644,
1591                                 xdevcfg_show_is_partial_bitstream_status,
1592                                 xdevcfg_set_is_partial_bitstream);
1593
1594 static const struct attribute *xdevcfg_attrs[] = {
1595         &dev_attr_prog_done.attr, /* PCFG_DONE bit in Intr Status register */
1596         &dev_attr_dbg_lock.attr, /* Debug lock bit in Lock register */
1597         &dev_attr_seu_lock.attr, /* SEU lock bit in Lock register */
1598         &dev_attr_aes_en_lock.attr, /* AES EN lock bit in Lock register */
1599         &dev_attr_enable_aes.attr, /* AES EN bit in Control register */
1600         &dev_attr_enable_seu.attr, /* SEU EN bit in Control register */
1601         &dev_attr_enable_sec_dbg_nonin.attr, /*SPNIDEN bit in Control register*/
1602         &dev_attr_enable_sec_dbg_in.attr, /*SPIDEN bit in Control register */
1603         &dev_attr_enable_dbg_nonin.attr, /* NIDEN bit in Control register */
1604         &dev_attr_enable_dbg_in.attr, /* DBGEN bit in Control register */
1605         &dev_attr_enable_dap.attr, /* DAP_EN bits in Control register */
1606         &dev_attr_is_partial_bitstream.attr, /* Flag for partial bitstream */
1607         NULL,
1608 };
1609
1610
1611 static const struct attribute_group xdevcfg_attr_group = {
1612         .attrs = (struct attribute **) xdevcfg_attrs,
1613 };
1614
1615 static ssize_t fclk_enable_show(struct device *dev,
1616                 struct device_attribute *attr, char *buf)
1617 {
1618         struct fclk_data *pdata = dev_get_drvdata(dev);
1619
1620         return scnprintf(buf, PAGE_SIZE, "%u\n", pdata->enabled);
1621 }
1622
1623 static ssize_t fclk_enable_store(struct device *dev,
1624                 struct device_attribute *attr, const char *buf, size_t count)
1625 {
1626         unsigned long enable;
1627         int ret;
1628         struct fclk_data *pdata = dev_get_drvdata(dev);
1629
1630         ret = kstrtoul(buf, 0, &enable);
1631         if (ret)
1632                 return -EINVAL;
1633
1634         enable = !!enable;
1635         if (enable == pdata->enabled)
1636                 return count;
1637
1638         if (enable)
1639                 ret = clk_enable(pdata->clk);
1640         else
1641                 clk_disable(pdata->clk);
1642
1643         if (ret)
1644                 return ret;
1645
1646         pdata->enabled = enable;
1647         return count;
1648 }
1649
1650 static DEVICE_ATTR(enable, 0644, fclk_enable_show, fclk_enable_store);
1651
1652 static ssize_t fclk_set_rate_show(struct device *dev,
1653                 struct device_attribute *attr, char *buf)
1654 {
1655         struct fclk_data *pdata = dev_get_drvdata(dev);
1656
1657         return scnprintf(buf, PAGE_SIZE, "%lu\n", clk_get_rate(pdata->clk));
1658 }
1659
1660 static ssize_t fclk_set_rate_store(struct device *dev,
1661                 struct device_attribute *attr, const char *buf, size_t count)
1662 {
1663         int ret = 0;
1664         unsigned long rate;
1665         struct fclk_data *pdata = dev_get_drvdata(dev);
1666
1667         ret = kstrtoul(buf, 0, &rate);
1668         if (ret)
1669                 return -EINVAL;
1670
1671         rate = clk_round_rate(pdata->clk, rate);
1672         ret = clk_set_rate(pdata->clk, rate);
1673
1674         return ret ? ret : count;
1675 }
1676
1677 static DEVICE_ATTR(set_rate, 0644, fclk_set_rate_show, fclk_set_rate_store);
1678
1679 static ssize_t fclk_round_rate_show(struct device *dev,
1680                 struct device_attribute *attr, char *buf)
1681 {
1682         struct fclk_data *pdata = dev_get_drvdata(dev);
1683
1684         return scnprintf(buf, PAGE_SIZE, "%lu => %lu\n", pdata->rate_rnd,
1685                         clk_round_rate(pdata->clk, pdata->rate_rnd));
1686 }
1687
1688 static ssize_t fclk_round_rate_store(struct device *dev,
1689                 struct device_attribute *attr, const char *buf, size_t count)
1690 {
1691         int ret = 0;
1692         unsigned long rate;
1693         struct fclk_data *pdata = dev_get_drvdata(dev);
1694
1695         ret = kstrtoul(buf, 0, &rate);
1696         if (ret)
1697                 return -EINVAL;
1698
1699         pdata->rate_rnd = rate;
1700
1701         return count;
1702 }
1703
1704 static DEVICE_ATTR(round_rate, 0644, fclk_round_rate_show,
1705                 fclk_round_rate_store);
1706
1707 static const struct attribute *fclk_ctrl_attrs[] = {
1708         &dev_attr_enable.attr,
1709         &dev_attr_set_rate.attr,
1710         &dev_attr_round_rate.attr,
1711         NULL,
1712 };
1713
1714 static const struct attribute_group fclk_ctrl_attr_grp = {
1715         .attrs = (struct attribute **)fclk_ctrl_attrs,
1716 };
1717
1718 static ssize_t xdevcfg_fclk_export_store(struct device *dev,
1719                 struct device_attribute *attr, const char *buf, size_t size)
1720 {
1721         int i, ret;
1722         struct device *subdev;
1723         struct fclk_data *fdata;
1724         struct xdevcfg_drvdata *drvdata = dev_get_drvdata(dev);
1725
1726         for (i = 0; i < NUMFCLKS; i++) {
1727                 if (!strncmp(buf, fclk_name[i], strlen(fclk_name[i])))
1728                         break;
1729         }
1730
1731         if (i < NUMFCLKS && !drvdata->fclk_exported[i]) {
1732                 drvdata->fclk_exported[i] = 1;
1733                 subdev = device_create(drvdata->fclk_class, dev, MKDEV(0, 0),
1734                                 NULL, fclk_name[i]);
1735                 if (IS_ERR(subdev))
1736                         return PTR_ERR(subdev);
1737                 ret = clk_prepare(drvdata->fclk[i]);
1738                 if (ret)
1739                         return ret;
1740                 fdata = kzalloc(sizeof(*fdata), GFP_KERNEL);
1741                 if (!fdata) {
1742                         ret = -ENOMEM;
1743                         goto err_unprepare;
1744                 }
1745                 fdata->clk = drvdata->fclk[i];
1746                 dev_set_drvdata(subdev, fdata);
1747                 ret = sysfs_create_group(&subdev->kobj, &fclk_ctrl_attr_grp);
1748                 if (ret)
1749                         goto err_free;
1750         } else {
1751                 return -EINVAL;
1752         }
1753
1754         return size;
1755
1756 err_free:
1757         kfree(fdata);
1758 err_unprepare:
1759         clk_unprepare(drvdata->fclk[i]);
1760
1761         return ret;
1762 }
1763
1764 static ssize_t xdevcfg_fclk_export_show(struct device *dev,
1765                 struct device_attribute *attr, char *buf)
1766 {
1767         int i;
1768         ssize_t count = 0;
1769         struct xdevcfg_drvdata *drvdata = dev_get_drvdata(dev);
1770
1771         for (i = 0; i < NUMFCLKS; i++) {
1772                 if (!drvdata->fclk_exported[i])
1773                         count += scnprintf(buf + count, PAGE_SIZE - count,
1774                                         "%s\n", fclk_name[i]);
1775         }
1776         return count;
1777 }
1778
1779 static DEVICE_ATTR(fclk_export, 0644, xdevcfg_fclk_export_show,
1780                 xdevcfg_fclk_export_store);
1781
1782 static int match_fclk(struct device *dev, const void *data)
1783 {
1784         struct fclk_data *fdata = dev_get_drvdata(dev);
1785
1786         return fdata->clk == data;
1787 }
1788
1789 static ssize_t xdevcfg_fclk_unexport_store(struct device *dev,
1790                 struct device_attribute *attr, const char *buf, size_t size)
1791 {
1792         int i;
1793         struct xdevcfg_drvdata *drvdata = dev_get_drvdata(dev);
1794
1795         for (i = 0; i < NUMFCLKS; i++) {
1796                 if (!strncmp(buf, fclk_name[i], strlen(fclk_name[i])))
1797                         break;
1798         }
1799
1800         if (i < NUMFCLKS && drvdata->fclk_exported[i]) {
1801                 struct fclk_data *fdata;
1802                 struct device *subdev;
1803
1804                 drvdata->fclk_exported[i] = 0;
1805                 subdev = class_find_device(drvdata->fclk_class, NULL,
1806                                 drvdata->fclk[i], match_fclk);
1807                 fdata = dev_get_drvdata(subdev);
1808                 if (fdata->enabled)
1809                         clk_disable(fdata->clk);
1810                 clk_unprepare(fdata->clk);
1811                 kfree(fdata);
1812                 device_unregister(subdev);
1813                 put_device(subdev);
1814         } else {
1815                 return -EINVAL;
1816         }
1817
1818         return size;
1819 }
1820
1821 static ssize_t xdevcfg_fclk_unexport_show(struct device *dev,
1822                 struct device_attribute *attr, char *buf)
1823 {
1824         int i;
1825         ssize_t count = 0;
1826         struct xdevcfg_drvdata *drvdata = dev_get_drvdata(dev);
1827
1828         for (i = 0; i < NUMFCLKS; i++) {
1829                 if (drvdata->fclk_exported[i])
1830                         count += scnprintf(buf + count, PAGE_SIZE - count,
1831                                         "%s\n", fclk_name[i]);
1832         }
1833         return count;
1834 }
1835
1836 static DEVICE_ATTR(fclk_unexport, 0644, xdevcfg_fclk_unexport_show,
1837                 xdevcfg_fclk_unexport_store);
1838
1839 static const struct attribute *fclk_exp_attrs[] = {
1840         &dev_attr_fclk_export.attr,
1841         &dev_attr_fclk_unexport.attr,
1842         NULL,
1843 };
1844
1845 static const struct attribute_group fclk_exp_attr_grp = {
1846         .attrs = (struct attribute **)fclk_exp_attrs,
1847 };
1848
1849 static void xdevcfg_fclk_init(struct device *dev)
1850 {
1851         int i;
1852         struct xdevcfg_drvdata *drvdata = dev_get_drvdata(dev);
1853
1854         for (i = 0; i < NUMFCLKS; i++) {
1855                 drvdata->fclk[i] = clk_get(dev, fclk_name[i]);
1856                 if (IS_ERR(drvdata->fclk[i])) {
1857                         dev_warn(dev, "fclk not found\n");
1858                         return;
1859                 }
1860         }
1861
1862         drvdata->fclk_class = class_create(THIS_MODULE, "fclk");
1863         if (IS_ERR(drvdata->fclk_class)) {
1864                 dev_warn(dev, "failed to create fclk class\n");
1865                 return;
1866         }
1867
1868         if (sysfs_create_group(&dev->kobj, &fclk_exp_attr_grp))
1869                 dev_warn(dev, "failed to create sysfs entries\n");
1870 }
1871
1872 static void xdevcfg_fclk_remove(struct device *dev)
1873 {
1874         int i;
1875         struct xdevcfg_drvdata *drvdata = dev_get_drvdata(dev);
1876
1877         for (i = 0; i < NUMFCLKS; i++) {
1878                 if (drvdata->fclk_exported[i]) {
1879                         struct fclk_data *fdata;
1880                         struct device *subdev;
1881
1882                         drvdata->fclk_exported[i] = 0;
1883                         subdev = class_find_device(drvdata->fclk_class, NULL,
1884                                         drvdata->fclk[i], match_fclk);
1885                         fdata = dev_get_drvdata(subdev);
1886                         if (fdata->enabled)
1887                                 clk_disable(fdata->clk);
1888                         clk_unprepare(fdata->clk);
1889                         kfree(fdata);
1890                         device_unregister(subdev);
1891                         put_device(subdev);
1892
1893                 }
1894         }
1895
1896         class_destroy(drvdata->fclk_class);
1897         sysfs_remove_group(&dev->kobj, &fclk_exp_attr_grp);
1898
1899 }
1900
1901 /**
1902  * xdevcfg_drv_probe -  Probe call for the device.
1903  *
1904  * @pdev:       handle to the platform device structure.
1905  *
1906  * Returns: 0 on success, negative error otherwise.
1907  *
1908  * It does all the memory allocation and registration for the device.
1909  */
1910 static int xdevcfg_drv_probe(struct platform_device *pdev)
1911 {
1912         struct resource *res;
1913         struct xdevcfg_drvdata *drvdata;
1914         dev_t devt;
1915         int retval;
1916         u32 ctrlreg;
1917         struct device_node *np;
1918         const void *prop;
1919         int size;
1920         struct device *dev;
1921
1922         drvdata = devm_kzalloc(&pdev->dev, sizeof(*drvdata), GFP_KERNEL);
1923         if (!drvdata)
1924                 return -ENOMEM;
1925
1926         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1927         drvdata->base_address = devm_ioremap_resource(&pdev->dev, res);
1928         if (IS_ERR(drvdata->base_address))
1929                 return PTR_ERR(drvdata->base_address);
1930
1931         drvdata->irq = platform_get_irq(pdev, 0);
1932         retval = devm_request_irq(&pdev->dev, drvdata->irq, &xdevcfg_irq,
1933                                 0, dev_name(&pdev->dev), drvdata);
1934         if (retval) {
1935                 dev_err(&pdev->dev, "No IRQ available");
1936                 return retval;
1937         }
1938
1939         platform_set_drvdata(pdev, drvdata);
1940         spin_lock_init(&drvdata->lock);
1941         mutex_init(&drvdata->sem);
1942         drvdata->is_open = 0;
1943         drvdata->is_partial_bitstream = 0;
1944         drvdata->dma_done = 0;
1945         drvdata->error_status = 0;
1946         dev_info(&pdev->dev, "ioremap %pa to %p\n",
1947                  &res->start, drvdata->base_address);
1948
1949         drvdata->clk = devm_clk_get(&pdev->dev, "ref_clk");
1950         if (IS_ERR(drvdata->clk)) {
1951                 dev_err(&pdev->dev, "input clock not found\n");
1952                 return PTR_ERR(drvdata->clk);
1953         }
1954
1955         retval = clk_prepare_enable(drvdata->clk);
1956         if (retval) {
1957                 dev_err(&pdev->dev, "unable to enable clock\n");
1958                 return retval;
1959         }
1960
1961         /*
1962          * Figure out from the device tree if this is running on the EP107
1963          * emulation platform as it doesn't match the silicon exactly and the
1964          * driver needs to work accordingly.
1965          */
1966         np = of_get_next_parent(pdev->dev.of_node);
1967         np = of_get_next_parent(np);
1968         prop = of_get_property(np, "compatible", &size);
1969
1970         if (prop != NULL) {
1971                 if ((strcmp((const char *)prop, "xlnx,zynq-ep107")) == 0)
1972                         drvdata->ep107 = 1;
1973                 else
1974                         drvdata->ep107 = 0;
1975         }
1976
1977         /* Unlock the device */
1978         xdevcfg_writereg(drvdata->base_address + XDCFG_UNLOCK_OFFSET,
1979                                 0x757BDF0D);
1980
1981         /*
1982          * Set the configuration register with the following options
1983          *  - Reset FPGA
1984          *  - Enable the PCAP interface
1985          *  - Set the throughput rate for maximum speed
1986          *  - Set the CPU in user mode
1987          */
1988         ctrlreg = xdevcfg_readreg(drvdata->base_address + XDCFG_CTRL_OFFSET);
1989         ctrlreg &= ~XDCFG_CTRL_PCAP_PR_MASK;
1990         ctrlreg |= XDCFG_CTRL_PCFG_PROG_B_MASK | XDCFG_CTRL_PCAP_MODE_MASK;
1991         xdevcfg_writereg(drvdata->base_address + XDCFG_CTRL_OFFSET, ctrlreg);
1992
1993         /* Ensure internal PCAP loopback is disabled */
1994         ctrlreg = xdevcfg_readreg(drvdata->base_address + XDCFG_MCTRL_OFFSET);
1995         xdevcfg_writereg(drvdata->base_address + XDCFG_MCTRL_OFFSET,
1996                                 (~XDCFG_MCTRL_PCAP_LPBK_MASK &
1997                                 ctrlreg));
1998
1999
2000         retval = alloc_chrdev_region(&devt, 0, XDEVCFG_DEVICES, DRIVER_NAME);
2001         if (retval < 0)
2002                 goto failed5;
2003
2004         drvdata->devt = devt;
2005
2006         cdev_init(&drvdata->cdev, &xdevcfg_fops);
2007         drvdata->cdev.owner = THIS_MODULE;
2008         retval = cdev_add(&drvdata->cdev, devt, 1);
2009         if (retval) {
2010                 dev_err(&pdev->dev, "cdev_add() failed\n");
2011                 goto failed6;
2012         }
2013
2014         drvdata->class = class_create(THIS_MODULE, DRIVER_NAME);
2015         if (IS_ERR(drvdata->class)) {
2016                 dev_err(&pdev->dev, "failed to create class\n");
2017                 goto failed6;
2018         }
2019
2020         dev = device_create(drvdata->class, &pdev->dev, devt, drvdata,
2021                         DRIVER_NAME);
2022         if (IS_ERR(dev)) {
2023                 dev_err(&pdev->dev, "unable to create device\n");
2024                 goto failed7;
2025         }
2026
2027         /* create sysfs files for the device */
2028         retval = sysfs_create_group(&(pdev->dev.kobj), &xdevcfg_attr_group);
2029         if (retval) {
2030                 dev_err(&pdev->dev, "Failed to create sysfs attr group\n");
2031                 cdev_del(&drvdata->cdev);
2032                 goto failed8;
2033         }
2034
2035         xdevcfg_fclk_init(&pdev->dev);
2036
2037         clk_disable(drvdata->clk);
2038
2039         return 0;               /* Success */
2040
2041 failed8:
2042         device_destroy(drvdata->class, drvdata->devt);
2043 failed7:
2044         class_destroy(drvdata->class);
2045 failed6:
2046         /* Unregister char driver */
2047         unregister_chrdev_region(devt, XDEVCFG_DEVICES);
2048 failed5:
2049         clk_disable_unprepare(drvdata->clk);
2050
2051         return retval;
2052 }
2053
2054 /**
2055  * xdevcfg_drv_remove -  Remove call for the device.
2056  *
2057  * @pdev:       handle to the platform device structure.
2058  *
2059  * Returns: 0 or error status.
2060  *
2061  * Unregister the device after releasing the resources.
2062  */
2063 static int xdevcfg_drv_remove(struct platform_device *pdev)
2064 {
2065         struct xdevcfg_drvdata *drvdata;
2066
2067         drvdata = platform_get_drvdata(pdev);
2068
2069         if (!drvdata)
2070                 return -ENODEV;
2071
2072         unregister_chrdev_region(drvdata->devt, XDEVCFG_DEVICES);
2073
2074         sysfs_remove_group(&pdev->dev.kobj, &xdevcfg_attr_group);
2075
2076         xdevcfg_fclk_remove(&pdev->dev);
2077         device_destroy(drvdata->class, drvdata->devt);
2078         class_destroy(drvdata->class);
2079         cdev_del(&drvdata->cdev);
2080         clk_unprepare(drvdata->clk);
2081
2082         return 0;               /* Success */
2083 }
2084
2085 static const struct of_device_id xdevcfg_of_match[] = {
2086         { .compatible = "xlnx,zynq-devcfg-1.0", },
2087         { /* end of table */}
2088 };
2089 MODULE_DEVICE_TABLE(of, xdevcfg_of_match);
2090
2091 /* Driver Structure */
2092 static struct platform_driver xdevcfg_platform_driver = {
2093         .probe = xdevcfg_drv_probe,
2094         .remove = xdevcfg_drv_remove,
2095         .driver = {
2096                 .owner = THIS_MODULE,
2097                 .name = DRIVER_NAME,
2098                 .of_match_table = xdevcfg_of_match,
2099         },
2100 };
2101
2102 module_platform_driver(xdevcfg_platform_driver);
2103
2104 MODULE_AUTHOR("Xilinx, Inc");
2105 MODULE_DESCRIPTION("Xilinx Device Config Driver");
2106 MODULE_LICENSE("GPL");