2 * Copyright (C) 2005 David Brownell
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 #include <linux/device.h>
23 #include <linux/mod_devicetable.h>
24 #include <linux/slab.h>
25 #include <linux/kthread.h>
28 * INTERFACES between SPI master-side drivers and SPI infrastructure.
29 * (There's no SPI slave support for Linux yet...)
31 extern struct bus_type spi_bus_type;
34 * struct spi_device - Master side proxy for an SPI slave device
35 * @dev: Driver model representation of the device.
36 * @master: SPI controller used with the device.
37 * @max_speed_hz: Maximum clock rate to be used with this chip
38 * (on this board); may be changed by the device's driver.
39 * The spi_transfer.speed_hz can override this for each transfer.
40 * @chip_select: Chipselect, distinguishing chips handled by @master.
41 * @mode: The spi mode defines how data is clocked out and in.
42 * This may be changed by the device's driver.
43 * The "active low" default for chipselect mode can be overridden
44 * (by specifying SPI_CS_HIGH) as can the "MSB first" default for
45 * each word in a transfer (by specifying SPI_LSB_FIRST).
46 * @bits_per_word: Data transfers involve one or more words; word sizes
47 * like eight or 12 bits are common. In-memory wordsizes are
48 * powers of two bytes (e.g. 20 bit samples use 32 bits).
49 * This may be changed by the device's driver, or left at the
50 * default (0) indicating protocol words are eight bit bytes.
51 * The spi_transfer.bits_per_word can override this for each transfer.
52 * @irq: Negative, or the number passed to request_irq() to receive
53 * interrupts from this device.
54 * @controller_state: Controller's runtime state
55 * @controller_data: Board-specific definitions for controller, such as
56 * FIFO initialization parameters; from board_info.controller_data
57 * @modalias: Name of the driver to use with this device, or an alias
58 * for that name. This appears in the sysfs "modalias" attribute
59 * for driver coldplugging, and in uevents used for hotplugging
60 * @cs_gpio: gpio number of the chipselect line (optional, -ENOENT when
61 * when not using a GPIO line)
63 * A @spi_device is used to interchange data between an SPI slave
64 * (usually a discrete chip) and CPU memory.
66 * In @dev, the platform_data is used to hold information about this
67 * device that's meaningful to the device's protocol driver, but not
68 * to its controller. One example might be an identifier for a chip
69 * variant with slightly different functionality; another might be
70 * information about how this particular board wires the chip's pins.
74 struct spi_master *master;
78 #define SPI_CPHA 0x01 /* clock phase */
79 #define SPI_CPOL 0x02 /* clock polarity */
80 #define SPI_MODE_0 (0|0) /* (original MicroWire) */
81 #define SPI_MODE_1 (0|SPI_CPHA)
82 #define SPI_MODE_2 (SPI_CPOL|0)
83 #define SPI_MODE_3 (SPI_CPOL|SPI_CPHA)
84 #define SPI_CS_HIGH 0x04 /* chipselect active high? */
85 #define SPI_LSB_FIRST 0x08 /* per-word bits-on-wire */
86 #define SPI_3WIRE 0x10 /* SI/SO signals shared */
87 #define SPI_LOOP 0x20 /* loopback mode */
88 #define SPI_NO_CS 0x40 /* 1 dev/bus, no chipselect */
89 #define SPI_READY 0x80 /* slave pulls low to pause */
92 void *controller_state;
93 void *controller_data;
94 char modalias[SPI_NAME_SIZE];
95 int cs_gpio; /* chip select gpio */
98 * likely need more hooks for more protocol options affecting how
99 * the controller talks to each chip, like:
100 * - memory packing (12 bit samples into low bits, others zeroed)
102 * - drop chipselect after each word
103 * - chipselect delays
108 static inline struct spi_device *to_spi_device(struct device *dev)
110 return dev ? container_of(dev, struct spi_device, dev) : NULL;
113 /* most drivers won't need to care about device refcounting */
114 static inline struct spi_device *spi_dev_get(struct spi_device *spi)
116 return (spi && get_device(&spi->dev)) ? spi : NULL;
119 static inline void spi_dev_put(struct spi_device *spi)
122 put_device(&spi->dev);
125 /* ctldata is for the bus_master driver's runtime state */
126 static inline void *spi_get_ctldata(struct spi_device *spi)
128 return spi->controller_state;
131 static inline void spi_set_ctldata(struct spi_device *spi, void *state)
133 spi->controller_state = state;
136 /* device driver data */
138 static inline void spi_set_drvdata(struct spi_device *spi, void *data)
140 dev_set_drvdata(&spi->dev, data);
143 static inline void *spi_get_drvdata(struct spi_device *spi)
145 return dev_get_drvdata(&spi->dev);
153 * struct spi_driver - Host side "protocol" driver
154 * @id_table: List of SPI devices supported by this driver
155 * @probe: Binds this driver to the spi device. Drivers can verify
156 * that the device is actually present, and may need to configure
157 * characteristics (such as bits_per_word) which weren't needed for
158 * the initial configuration done during system setup.
159 * @remove: Unbinds this driver from the spi device
160 * @shutdown: Standard shutdown callback used during system state
161 * transitions such as powerdown/halt and kexec
162 * @suspend: Standard suspend callback used during system state transitions
163 * @resume: Standard resume callback used during system state transitions
164 * @driver: SPI device drivers should initialize the name and owner
165 * field of this structure.
167 * This represents the kind of device driver that uses SPI messages to
168 * interact with the hardware at the other end of a SPI link. It's called
169 * a "protocol" driver because it works through messages rather than talking
170 * directly to SPI hardware (which is what the underlying SPI controller
171 * driver does to pass those messages). These protocols are defined in the
172 * specification for the device(s) supported by the driver.
174 * As a rule, those device protocols represent the lowest level interface
175 * supported by a driver, and it will support upper level interfaces too.
176 * Examples of such upper levels include frameworks like MTD, networking,
177 * MMC, RTC, filesystem character device nodes, and hardware monitoring.
180 const struct spi_device_id *id_table;
181 int (*probe)(struct spi_device *spi);
182 int (*remove)(struct spi_device *spi);
183 void (*shutdown)(struct spi_device *spi);
184 int (*suspend)(struct spi_device *spi, pm_message_t mesg);
185 int (*resume)(struct spi_device *spi);
186 struct device_driver driver;
189 static inline struct spi_driver *to_spi_driver(struct device_driver *drv)
191 return drv ? container_of(drv, struct spi_driver, driver) : NULL;
194 extern int spi_register_driver(struct spi_driver *sdrv);
197 * spi_unregister_driver - reverse effect of spi_register_driver
198 * @sdrv: the driver to unregister
201 static inline void spi_unregister_driver(struct spi_driver *sdrv)
204 driver_unregister(&sdrv->driver);
208 * module_spi_driver() - Helper macro for registering a SPI driver
209 * @__spi_driver: spi_driver struct
211 * Helper macro for SPI drivers which do not do anything special in module
212 * init/exit. This eliminates a lot of boilerplate. Each module may only
213 * use this macro once, and calling it replaces module_init() and module_exit()
215 #define module_spi_driver(__spi_driver) \
216 module_driver(__spi_driver, spi_register_driver, \
217 spi_unregister_driver)
220 * struct spi_master - interface to SPI master controller
221 * @dev: device interface to this driver
222 * @list: link with the global spi_master list
223 * @bus_num: board-specific (and often SOC-specific) identifier for a
224 * given SPI controller.
225 * @num_chipselect: chipselects are used to distinguish individual
226 * SPI slaves, and are numbered from zero to num_chipselects.
227 * each slave has a chipselect signal, but it's common that not
228 * every chipselect is connected to a slave.
229 * @dma_alignment: SPI controller constraint on DMA buffers alignment.
230 * @mode_bits: flags understood by this controller driver
231 * @bits_per_word_mask: A mask indicating which values of bits_per_word are
232 * supported by the driver. Bit n indicates that a bits_per_word n+1 is
233 * suported. If set, the SPI core will reject any transfer with an
234 * unsupported bits_per_word. If not set, this value is simply ignored,
235 * and it's up to the individual driver to perform any validation.
236 * @flags: other constraints relevant to this driver
237 * @bus_lock_spinlock: spinlock for SPI bus locking
238 * @bus_lock_mutex: mutex for SPI bus locking
239 * @bus_lock_flag: indicates that the SPI bus is locked for exclusive use
240 * @setup: updates the device mode and clocking records used by a
241 * device's SPI controller; protocol code may call this. This
242 * must fail if an unrecognized or unsupported mode is requested.
243 * It's always safe to call this unless transfers are pending on
244 * the device whose settings are being modified.
245 * @transfer: adds a message to the controller's transfer queue.
246 * @cleanup: frees controller-specific state
247 * @queued: whether this master is providing an internal message queue
248 * @kworker: thread struct for message pump
249 * @kworker_task: pointer to task for message pump kworker thread
250 * @pump_messages: work struct for scheduling work to the message pump
251 * @queue_lock: spinlock to syncronise access to message queue
252 * @queue: message queue
253 * @cur_msg: the currently in-flight message
254 * @busy: message pump is busy
255 * @running: message pump is running
256 * @rt: whether this queue is set to run as a realtime task
257 * @prepare_transfer_hardware: a message will soon arrive from the queue
258 * so the subsystem requests the driver to prepare the transfer hardware
259 * by issuing this call
260 * @transfer_one_message: the subsystem calls the driver to transfer a single
261 * message while queuing transfers that arrive in the meantime. When the
262 * driver is finished with this message, it must call
263 * spi_finalize_current_message() so the subsystem can issue the next
265 * @unprepare_transfer_hardware: there are currently no more messages on the
266 * queue so the subsystem notifies the driver that it may relax the
267 * hardware by issuing this call
268 * @cs_gpios: Array of GPIOs to use as chip select lines; one per CS
269 * number. Any individual value may be -ENOENT for CS lines that
270 * are not GPIOs (driven by the SPI controller itself).
272 * Each SPI master controller can communicate with one or more @spi_device
273 * children. These make a small bus, sharing MOSI, MISO and SCK signals
274 * but not chip select signals. Each device may be configured to use a
275 * different clock rate, since those shared signals are ignored unless
276 * the chip is selected.
278 * The driver for an SPI controller manages access to those devices through
279 * a queue of spi_message transactions, copying data between CPU memory and
280 * an SPI slave device. For each such message it queues, it calls the
281 * message's completion function when the transaction completes.
286 struct list_head list;
288 /* other than negative (== assign one dynamically), bus_num is fully
289 * board-specific. usually that simplifies to being SOC-specific.
290 * example: one SOC has three SPI controllers, numbered 0..2,
291 * and one board's schematics might show it using SPI-2. software
292 * would normally use bus_num=2 for that controller.
296 /* chipselects will be integral to many controllers; some others
297 * might use board-specific GPIOs.
301 /* some SPI controllers pose alignment requirements on DMAable
302 * buffers; let protocol drivers know about these requirements.
306 /* spi_device.mode flags understood by this controller driver */
309 /* bitmask of supported bits_per_word for transfers */
310 u32 bits_per_word_mask;
312 /* other constraints relevant to this driver */
314 #define SPI_MASTER_HALF_DUPLEX BIT(0) /* can't do full duplex */
315 #define SPI_MASTER_NO_RX BIT(1) /* can't do buffer read */
316 #define SPI_MASTER_NO_TX BIT(2) /* can't do buffer write */
317 #define SPI_MASTER_U_PAGE BIT(3) /* select upper flash */
319 /* lock and mutex for SPI bus locking */
320 spinlock_t bus_lock_spinlock;
321 struct mutex bus_lock_mutex;
323 /* flag indicating that the SPI bus is locked for exclusive use */
326 /* Setup mode and clock, etc (spi driver may call many times).
328 * IMPORTANT: this may be called when transfers to another
329 * device are active. DO NOT UPDATE SHARED REGISTERS in ways
330 * which could break those transfers.
332 int (*setup)(struct spi_device *spi);
334 /* bidirectional bulk transfers
336 * + The transfer() method may not sleep; its main role is
337 * just to add the message to the queue.
338 * + For now there's no remove-from-queue operation, or
339 * any other request management
340 * + To a given spi_device, message queueing is pure fifo
342 * + The master's main job is to process its message queue,
343 * selecting a chip then transferring data
344 * + If there are multiple spi_device children, the i/o queue
345 * arbitration algorithm is unspecified (round robin, fifo,
346 * priority, reservations, preemption, etc)
348 * + Chipselect stays active during the entire message
349 * (unless modified by spi_transfer.cs_change != 0).
350 * + The message transfers use clock and SPI mode parameters
351 * previously established by setup() for this device
353 int (*transfer)(struct spi_device *spi,
354 struct spi_message *mesg);
356 /* called on release() to free memory provided by spi_master */
357 void (*cleanup)(struct spi_device *spi);
360 * These hooks are for drivers that want to use the generic
361 * master transfer queueing mechanism. If these are used, the
362 * transfer() function above must NOT be specified by the driver.
363 * Over time we expect SPI drivers to be phased over to this API.
366 struct kthread_worker kworker;
367 struct task_struct *kworker_task;
368 struct kthread_work pump_messages;
369 spinlock_t queue_lock;
370 struct list_head queue;
371 struct spi_message *cur_msg;
376 int (*prepare_transfer_hardware)(struct spi_master *master);
377 int (*transfer_one_message)(struct spi_master *master,
378 struct spi_message *mesg);
379 int (*unprepare_transfer_hardware)(struct spi_master *master);
380 /* gpio chip select */
384 static inline void *spi_master_get_devdata(struct spi_master *master)
386 return dev_get_drvdata(&master->dev);
389 static inline void spi_master_set_devdata(struct spi_master *master, void *data)
391 dev_set_drvdata(&master->dev, data);
394 static inline struct spi_master *spi_master_get(struct spi_master *master)
396 if (!master || !get_device(&master->dev))
401 static inline void spi_master_put(struct spi_master *master)
404 put_device(&master->dev);
407 /* PM calls that need to be issued by the driver */
408 extern int spi_master_suspend(struct spi_master *master);
409 extern int spi_master_resume(struct spi_master *master);
411 /* Calls the driver make to interact with the message queue */
412 extern struct spi_message *spi_get_next_queued_message(struct spi_master *master);
413 extern void spi_finalize_current_message(struct spi_master *master);
415 /* the spi driver core manages memory for the spi_master classdev */
416 extern struct spi_master *
417 spi_alloc_master(struct device *host, unsigned size);
419 extern int spi_register_master(struct spi_master *master);
420 extern void spi_unregister_master(struct spi_master *master);
422 extern struct spi_master *spi_busnum_to_master(u16 busnum);
424 /*---------------------------------------------------------------------------*/
427 * I/O INTERFACE between SPI controller and protocol drivers
429 * Protocol drivers use a queue of spi_messages, each transferring data
430 * between the controller and memory buffers.
432 * The spi_messages themselves consist of a series of read+write transfer
433 * segments. Those segments always read the same number of bits as they
434 * write; but one or the other is easily ignored by passing a null buffer
435 * pointer. (This is unlike most types of I/O API, because SPI hardware
438 * NOTE: Allocation of spi_transfer and spi_message memory is entirely
439 * up to the protocol driver, which guarantees the integrity of both (as
440 * well as the data buffers) for as long as the message is queued.
444 * struct spi_transfer - a read/write buffer pair
445 * @tx_buf: data to be written (dma-safe memory), or NULL
446 * @rx_buf: data to be read (dma-safe memory), or NULL
447 * @tx_dma: DMA address of tx_buf, if @spi_message.is_dma_mapped
448 * @rx_dma: DMA address of rx_buf, if @spi_message.is_dma_mapped
449 * @len: size of rx and tx buffers (in bytes)
450 * @speed_hz: Select a speed other than the device default for this
451 * transfer. If 0 the default (from @spi_device) is used.
452 * @bits_per_word: select a bits_per_word other than the device default
453 * for this transfer. If 0 the default (from @spi_device) is used.
454 * @cs_change: affects chipselect after this transfer completes
455 * @delay_usecs: microseconds to delay after this transfer before
456 * (optionally) changing the chipselect status, then starting
457 * the next transfer or completing this @spi_message.
458 * @transfer_list: transfers are sequenced through @spi_message.transfers
460 * SPI transfers always write the same number of bytes as they read.
461 * Protocol drivers should always provide @rx_buf and/or @tx_buf.
462 * In some cases, they may also want to provide DMA addresses for
463 * the data being transferred; that may reduce overhead, when the
464 * underlying driver uses dma.
466 * If the transmit buffer is null, zeroes will be shifted out
467 * while filling @rx_buf. If the receive buffer is null, the data
468 * shifted in will be discarded. Only "len" bytes shift out (or in).
469 * It's an error to try to shift out a partial word. (For example, by
470 * shifting out three bytes with word size of sixteen or twenty bits;
471 * the former uses two bytes per word, the latter uses four bytes.)
473 * In-memory data values are always in native CPU byte order, translated
474 * from the wire byte order (big-endian except with SPI_LSB_FIRST). So
475 * for example when bits_per_word is sixteen, buffers are 2N bytes long
476 * (@len = 2N) and hold N sixteen bit words in CPU byte order.
478 * When the word size of the SPI transfer is not a power-of-two multiple
479 * of eight bits, those in-memory words include extra bits. In-memory
480 * words are always seen by protocol drivers as right-justified, so the
481 * undefined (rx) or unused (tx) bits are always the most significant bits.
483 * All SPI transfers start with the relevant chipselect active. Normally
484 * it stays selected until after the last transfer in a message. Drivers
485 * can affect the chipselect signal using cs_change.
487 * (i) If the transfer isn't the last one in the message, this flag is
488 * used to make the chipselect briefly go inactive in the middle of the
489 * message. Toggling chipselect in this way may be needed to terminate
490 * a chip command, letting a single spi_message perform all of group of
491 * chip transactions together.
493 * (ii) When the transfer is the last one in the message, the chip may
494 * stay selected until the next transfer. On multi-device SPI busses
495 * with nothing blocking messages going to other devices, this is just
496 * a performance hint; starting a message to another device deselects
497 * this one. But in other cases, this can be used to ensure correctness.
498 * Some devices need protocol transactions to be built from a series of
499 * spi_message submissions, where the content of one message is determined
500 * by the results of previous messages and where the whole transaction
501 * ends when the chipselect goes intactive.
503 * The code that submits an spi_message (and its spi_transfers)
504 * to the lower layers is responsible for managing its memory.
505 * Zero-initialize every field you don't set up explicitly, to
506 * insulate against future API updates. After you submit a message
507 * and its transfers, ignore them until its completion callback.
509 struct spi_transfer {
510 /* it's ok if tx_buf == rx_buf (right?)
511 * for MicroWire, one buffer must be null
512 * buffers must work with dma_*map_single() calls, unless
513 * spi_message.is_dma_mapped reports a pre-existing mapping
522 unsigned cs_change:1;
527 struct list_head transfer_list;
531 * struct spi_message - one multi-segment SPI transaction
532 * @transfers: list of transfer segments in this transaction
533 * @spi: SPI device to which the transaction is queued
534 * @is_dma_mapped: if true, the caller provided both dma and cpu virtual
535 * addresses for each transfer buffer
536 * @complete: called to report transaction completions
537 * @context: the argument to complete() when it's called
538 * @actual_length: the total number of bytes that were transferred in all
539 * successful segments
540 * @status: zero for success, else negative errno
541 * @queue: for use by whichever driver currently owns the message
542 * @state: for use by whichever driver currently owns the message
544 * A @spi_message is used to execute an atomic sequence of data transfers,
545 * each represented by a struct spi_transfer. The sequence is "atomic"
546 * in the sense that no other spi_message may use that SPI bus until that
547 * sequence completes. On some systems, many such sequences can execute as
548 * as single programmed DMA transfer. On all systems, these messages are
549 * queued, and might complete after transactions to other devices. Messages
550 * sent to a given spi_device are alway executed in FIFO order.
552 * The code that submits an spi_message (and its spi_transfers)
553 * to the lower layers is responsible for managing its memory.
554 * Zero-initialize every field you don't set up explicitly, to
555 * insulate against future API updates. After you submit a message
556 * and its transfers, ignore them until its completion callback.
559 struct list_head transfers;
561 struct spi_device *spi;
563 unsigned is_dma_mapped:1;
565 /* REVISIT: we might want a flag affecting the behavior of the
566 * last transfer ... allowing things like "read 16 bit length L"
567 * immediately followed by "read L bytes". Basically imposing
568 * a specific message scheduling algorithm.
570 * Some controller drivers (message-at-a-time queue processing)
571 * could provide that as their default scheduling algorithm. But
572 * others (with multi-message pipelines) could need a flag to
573 * tell them about such special cases.
576 /* completion is reported through a callback */
577 void (*complete)(void *context);
579 unsigned actual_length;
582 /* for optional use by whatever driver currently owns the
583 * spi_message ... between calls to spi_async and then later
584 * complete(), that's the spi_master controller driver.
586 struct list_head queue;
590 static inline void spi_message_init(struct spi_message *m)
592 memset(m, 0, sizeof *m);
593 INIT_LIST_HEAD(&m->transfers);
597 spi_message_add_tail(struct spi_transfer *t, struct spi_message *m)
599 list_add_tail(&t->transfer_list, &m->transfers);
603 spi_transfer_del(struct spi_transfer *t)
605 list_del(&t->transfer_list);
609 * spi_message_init_with_transfers - Initialize spi_message and append transfers
610 * @m: spi_message to be initialized
611 * @xfers: An array of spi transfers
612 * @num_xfers: Number of items in the xfer array
614 * This function initializes the given spi_message and adds each spi_transfer in
615 * the given array to the message.
618 spi_message_init_with_transfers(struct spi_message *m,
619 struct spi_transfer *xfers, unsigned int num_xfers)
624 for (i = 0; i < num_xfers; ++i)
625 spi_message_add_tail(&xfers[i], m);
628 /* It's fine to embed message and transaction structures in other data
629 * structures so long as you don't free them while they're in use.
632 static inline struct spi_message *spi_message_alloc(unsigned ntrans, gfp_t flags)
634 struct spi_message *m;
636 m = kzalloc(sizeof(struct spi_message)
637 + ntrans * sizeof(struct spi_transfer),
641 struct spi_transfer *t = (struct spi_transfer *)(m + 1);
643 INIT_LIST_HEAD(&m->transfers);
644 for (i = 0; i < ntrans; i++, t++)
645 spi_message_add_tail(t, m);
650 static inline void spi_message_free(struct spi_message *m)
655 extern int spi_setup(struct spi_device *spi);
656 extern int spi_async(struct spi_device *spi, struct spi_message *message);
657 extern int spi_async_locked(struct spi_device *spi,
658 struct spi_message *message);
660 /*---------------------------------------------------------------------------*/
662 /* All these synchronous SPI transfer routines are utilities layered
663 * over the core async transfer primitive. Here, "synchronous" means
664 * they will sleep uninterruptibly until the async transfer completes.
667 extern int spi_sync(struct spi_device *spi, struct spi_message *message);
668 extern int spi_sync_locked(struct spi_device *spi, struct spi_message *message);
669 extern int spi_bus_lock(struct spi_master *master);
670 extern int spi_bus_unlock(struct spi_master *master);
673 * spi_write - SPI synchronous write
674 * @spi: device to which data will be written
676 * @len: data buffer size
679 * This writes the buffer and returns zero or a negative error code.
680 * Callable only from contexts that can sleep.
683 spi_write(struct spi_device *spi, const void *buf, size_t len)
685 struct spi_transfer t = {
689 struct spi_message m;
691 spi_message_init(&m);
692 spi_message_add_tail(&t, &m);
693 return spi_sync(spi, &m);
697 * spi_read - SPI synchronous read
698 * @spi: device from which data will be read
700 * @len: data buffer size
703 * This reads the buffer and returns zero or a negative error code.
704 * Callable only from contexts that can sleep.
707 spi_read(struct spi_device *spi, void *buf, size_t len)
709 struct spi_transfer t = {
713 struct spi_message m;
715 spi_message_init(&m);
716 spi_message_add_tail(&t, &m);
717 return spi_sync(spi, &m);
721 * spi_sync_transfer - synchronous SPI data transfer
722 * @spi: device with which data will be exchanged
723 * @xfers: An array of spi_transfers
724 * @num_xfers: Number of items in the xfer array
727 * Does a synchronous SPI data transfer of the given spi_transfer array.
729 * For more specific semantics see spi_sync().
731 * It returns zero on success, else a negative error code.
734 spi_sync_transfer(struct spi_device *spi, struct spi_transfer *xfers,
735 unsigned int num_xfers)
737 struct spi_message msg;
739 spi_message_init_with_transfers(&msg, xfers, num_xfers);
741 return spi_sync(spi, &msg);
744 /* this copies txbuf and rxbuf data; for small transfers only! */
745 extern int spi_write_then_read(struct spi_device *spi,
746 const void *txbuf, unsigned n_tx,
747 void *rxbuf, unsigned n_rx);
750 * spi_w8r8 - SPI synchronous 8 bit write followed by 8 bit read
751 * @spi: device with which data will be exchanged
752 * @cmd: command to be written before data is read back
755 * This returns the (unsigned) eight bit number returned by the
756 * device, or else a negative error code. Callable only from
757 * contexts that can sleep.
759 static inline ssize_t spi_w8r8(struct spi_device *spi, u8 cmd)
764 status = spi_write_then_read(spi, &cmd, 1, &result, 1);
766 /* return negative errno or unsigned value */
767 return (status < 0) ? status : result;
771 * spi_w8r16 - SPI synchronous 8 bit write followed by 16 bit read
772 * @spi: device with which data will be exchanged
773 * @cmd: command to be written before data is read back
776 * This returns the (unsigned) sixteen bit number returned by the
777 * device, or else a negative error code. Callable only from
778 * contexts that can sleep.
780 * The number is returned in wire-order, which is at least sometimes
783 static inline ssize_t spi_w8r16(struct spi_device *spi, u8 cmd)
788 status = spi_write_then_read(spi, &cmd, 1, (u8 *) &result, 2);
790 /* return negative errno or unsigned value */
791 return (status < 0) ? status : result;
794 /*---------------------------------------------------------------------------*/
797 * INTERFACE between board init code and SPI infrastructure.
799 * No SPI driver ever sees these SPI device table segments, but
800 * it's how the SPI core (or adapters that get hotplugged) grows
801 * the driver model tree.
803 * As a rule, SPI devices can't be probed. Instead, board init code
804 * provides a table listing the devices which are present, with enough
805 * information to bind and set up the device's driver. There's basic
806 * support for nonstatic configurations too; enough to handle adding
807 * parport adapters, or microcontrollers acting as USB-to-SPI bridges.
811 * struct spi_board_info - board-specific template for a SPI device
812 * @modalias: Initializes spi_device.modalias; identifies the driver.
813 * @platform_data: Initializes spi_device.platform_data; the particular
814 * data stored there is driver-specific.
815 * @controller_data: Initializes spi_device.controller_data; some
816 * controllers need hints about hardware setup, e.g. for DMA.
817 * @irq: Initializes spi_device.irq; depends on how the board is wired.
818 * @max_speed_hz: Initializes spi_device.max_speed_hz; based on limits
819 * from the chip datasheet and board-specific signal quality issues.
820 * @bus_num: Identifies which spi_master parents the spi_device; unused
821 * by spi_new_device(), and otherwise depends on board wiring.
822 * @chip_select: Initializes spi_device.chip_select; depends on how
823 * the board is wired.
824 * @mode: Initializes spi_device.mode; based on the chip datasheet, board
825 * wiring (some devices support both 3WIRE and standard modes), and
826 * possibly presence of an inverter in the chipselect path.
828 * When adding new SPI devices to the device tree, these structures serve
829 * as a partial device template. They hold information which can't always
830 * be determined by drivers. Information that probe() can establish (such
831 * as the default transfer wordsize) is not included here.
833 * These structures are used in two places. Their primary role is to
834 * be stored in tables of board-specific device descriptors, which are
835 * declared early in board initialization and then used (much later) to
836 * populate a controller's device tree after the that controller's driver
837 * initializes. A secondary (and atypical) role is as a parameter to
838 * spi_new_device() call, which happens after those controller drivers
839 * are active in some dynamic board configuration models.
841 struct spi_board_info {
842 /* the device name and module name are coupled, like platform_bus;
843 * "modalias" is normally the driver name.
845 * platform_data goes to spi_device.dev.platform_data,
846 * controller_data goes to spi_device.controller_data,
849 char modalias[SPI_NAME_SIZE];
850 const void *platform_data;
851 void *controller_data;
854 /* slower signaling on noisy or low voltage boards */
858 /* bus_num is board specific and matches the bus_num of some
859 * spi_master that will probably be registered later.
861 * chip_select reflects how this chip is wired to that master;
862 * it's less than num_chipselect.
867 /* mode becomes spi_device.mode, and is essential for chips
868 * where the default of SPI_CS_HIGH = 0 is wrong.
872 /* ... may need additional spi_device chip config data here.
873 * avoid stuff protocol drivers can set; but include stuff
874 * needed to behave without being bound to a driver:
875 * - quirks like clock rate mattering when not selected
881 spi_register_board_info(struct spi_board_info const *info, unsigned n);
883 /* board init code may ignore whether SPI is configured or not */
885 spi_register_board_info(struct spi_board_info const *info, unsigned n)
890 /* If you're hotplugging an adapter with devices (parport, usb, etc)
891 * use spi_new_device() to describe each device. You can also call
892 * spi_unregister_device() to start making that device vanish, but
893 * normally that would be handled by spi_unregister_master().
895 * You can also use spi_alloc_device() and spi_add_device() to use a two
896 * stage registration sequence for each spi_device. This gives the caller
897 * some more control over the spi_device structure before it is registered,
898 * but requires that caller to initialize fields that would otherwise
899 * be defined using the board info.
901 extern struct spi_device *
902 spi_alloc_device(struct spi_master *master);
905 spi_add_device(struct spi_device *spi);
907 extern struct spi_device *
908 spi_new_device(struct spi_master *, struct spi_board_info *);
911 spi_unregister_device(struct spi_device *spi)
914 device_unregister(&spi->dev);
917 extern const struct spi_device_id *
918 spi_get_device_id(const struct spi_device *sdev);
920 #endif /* __LINUX_SPI_H */