--- /dev/null
+# Generic directory or leaf node makefile for OCERA make framework
+
+ifndef MAKERULES_DIR
+MAKERULES_DIR := $(shell ( old_pwd="" ; while [ ! -e Makefile.rules ] ; do if [ "$$old_pwd" == `pwd` ] ; then exit 1 ; else old_pwd=`pwd` ; cd -L .. 2>/dev/null ; fi ; done ; pwd ) )
+endif
+
+ifeq ($(MAKERULES_DIR),)
+all : default
+.DEFAULT::
+ @echo -e "\nThe Makefile.rules has not been found in this or partent directory\n"
+else
+include $(MAKERULES_DIR)/Makefile.rules
+endif
+
--- /dev/null
+# -*- makefile -*-
+
+SUBDIRS = defines libs
--- /dev/null
+# -*- makefile -*-
+
+ARCH=h8300
+MACH=2638
+BOARD=h8mirosot
+
+
+CROSS_COMPILE = h8300-coff-
+TARGET_ARCH = -ms
+
+# Set default C flags. If theese are set elsewhere (e.g. on a command
+# line), these default flags are not used.
+DEBUG ?= -g
+OPTIMIZE ?= -O2
+
+-include $(MAKERULES_DIR)/config.tohit
+HIT_BAUD ?= 57600
+HIT_DEV ?= /dev/ttyS0
+TOHIT = $(MAKERULES_DIR)/$(COMPILED_DIR_NAME)/bin-utils/tohit --baud $(HIT_BAUD) --sdev $(HIT_DEV)
+LOAD_CMD-boot = \
+ $(TOHIT) --erase --start 0x000000 --length 0x1600; \
+ $(TOHIT) --command 1 --blockmode 32 --start 0x000000
+LOAD_CMD-bload = $(TOHIT) --command B --blockmode 128 --baud 4800
+LOAD_CMD-flash = \
+ $(TOHIT) --erase --start 0x004000 --length 0x03C000; \
+ $(TOHIT) --command 1 --blockmode 32 --start 0x004000
+
+RUN_CMD-ram = $(TOHIT) --go 0x200000
+
+# This selects linker script
+LD_SCRIPT = h8canusb
+DEFAULT_LD_SCRIPT_VARIANT = ram
+
+OUTPUT_FORMATS = bin
--- /dev/null
+# Generic directory or leaf node makefile for OCERA make framework
+
+ifndef MAKERULES_DIR
+MAKERULES_DIR := $(shell ( old_pwd="" ; while [ ! -e Makefile.rules ] ; do if [ "$$old_pwd" == `pwd` ] ; then exit 1 ; else old_pwd=`pwd` ; cd -L .. 2>/dev/null ; fi ; done ; pwd ) )
+endif
+
+ifeq ($(MAKERULES_DIR),)
+all : default
+.DEFAULT::
+ @echo -e "\nThe Makefile.rules has not been found in this or partent directory\n"
+else
+include $(MAKERULES_DIR)/Makefile.rules
+endif
+
--- /dev/null
+# -*- makefile -*-
+include_HEADERS = $(notdir $(wildcard $(SOURCES_DIR)/*.h))
--- /dev/null
+/*******************************************************************
+ Components for embedded applications builded for
+ laboratory and medical instruments firmware
+
+ system_def.h - common cover for definition of hardware adresses,
+ registers, timing and other hardware dependant
+ parts of embedded hardware
+
+ Copyright (C) 2001 by Pavel Pisa pisa@cmp.felk.cvut.cz
+ (C) 2002 by PiKRON Ltd. http://www.pikron.com
+
+ *******************************************************************/
+
+#ifndef _SYSTEM_DEF_H_
+#define _SYSTEM_DEF_H_
+
+#include <types.h>
+
+#define WITH_SFI_SEL
+
+#define VER_CODE(major,minor,patch) (major*0x10000+minor*0x100+patch)
+/* Software version */
+#define SW_VER_ID "H8CANUSB"
+#define SW_VER_MAJOR 0
+#define SW_VER_MINOR 1
+#define SW_VER_PATCH 0
+#define SW_VER_CODE VER_CODE(SW_VER_MAJOR,SW_VER_MINOR,SW_VER_PATCH)
+/* Hardware version */
+#define HW_VER_ID "H8CANUSB"
+#define HW_VER_MAJOR 1
+#define HW_VER_MINOR 0
+#define HW_VER_PATCH 0
+#define HW_VER_CODE VER_CODE(HW_VER_MAJOR,HW_VER_MINOR,HW_VER_PATCH)
+/* Version of mechanical */
+#define MECH_VER_ID "H8CANUSB"
+#define MECH_VER_MAJOR 0
+#define MECH_VER_MINOR 0
+#define MECH_VER_PATCH 0
+#define MECH_VER_CODE VER_CODE(MECH_VER_MAJOR,MECH_VER_MINOR,MECH_VER_PATCH)
+
+/*#include <system_def_jt_usb1.h>*/
+#include <system_def_h8mirosot.h>
+
+#endif /* _SYSTEM_DEF_H_ */
--- /dev/null
+/*******************************************************************
+ Components for embedded applications builded for
+ laboratory and medical instruments firmware
+
+ system_def_h8canusb.h - definition of hardware adresses and registers
+
+ Copyright (C) 2002 by Pavel Pisa pisa@cmp.felk.cvut.cz
+ (C) 2002 by PiKRON Ltd. http://www.pikron.com
+
+ *******************************************************************/
+
+#ifndef _SYSTEM_DEF_HW01_H_
+#define _SYSTEM_DEF_HW01_H_
+
+#define CPU_REF_HZ 20000000l /* reference clock for H8CANUSB */
+#define CPU_SYS_HZ 20000000l /* default system for H8CANUSB */
+
+
+unsigned long cpu_ref_hz; /* actual external XTAL reference */
+unsigned long cpu_sys_hz; /* actual system clock frequency */
+
+volatile unsigned long msec_time;
+
+
+/* Buffer stransferred to second board power control register */
+volatile short scch_pwrctrl_buf;
+
+/* SRAM 32 kB (CS3) */
+//#define SRAM_START (volatile __u8 * const)(0x610000)
+
+
+#if 0
+#define ISR_USB_INTV EXCPTVEC_IRQ2 /* pin IRQ2 on PF.0 */
+#define PDIUSB_READ_DATA_ADDR (volatile __u8 * const)(0x500000)
+#define PDIUSB_WRITE_DATA_ADDR (volatile __u8 * const)(0x500000)
+#define PDIUSB_COMMAND_ADDR (volatile __u8 * const)(0x500001)
+
+/* P1.0 .. DACK_N/DMACK0, P7.0 .. DMREQ/DREQ0, P7.2 .. EOT_N/TEND0 */
+#undef PDIUSB_WITH_ADD_IRQ_HANDLER
+#define PDIUSB_WITH_EXCPTVECT_SET
+#define PDIUSB_SUPPORT_ENABLED
+#endif
+
+
+#if 0
+/* IDE (CS4) (CS5) powered by PF2 */
+#define SIDE_START1 (volatile __u8 * const)(0x800000)
+#define SIDE_START2 (volatile __u8 * const)(0xA00000)
+#define IDE0_DATA (volatile __u16 * const)(SIDE_START1+0) /* DATA */
+#define IDE0_ERROR (SIDE_START1+2) /* Error/Features RO/WO */
+#define IDE0_NSECTOR (SIDE_START1+4) /* Sector Count R/W */
+#define IDE0_SECTOR (SIDE_START1+6) /* SN, LBA 0-7 */
+#define IDE0_LCYL (SIDE_START1+8) /* CL, LBA 8-15 */
+#define IDE0_HCYL (SIDE_START1+10) /* CH, LBA 16-23 */
+#define IDE0_CURRENT (SIDE_START1+12) /* 1L1DHHHH , LBA 24-27 */
+#define IDE0_STATUS (SIDE_START1+14) /* Status */
+#define IDE0_SELECT IDE0_CURRENT
+#define IDE0_FEATURE IDE0_ERROR
+#define IDE0_COMMAND IDE0_STATUS /* Command */
+
+#define IDE0_DEVCTRL (SIDE_START2+12) /* used for resets */
+#define IDE0_ALTSTATUS (SIDE_START2+14) /* IDE0_STATUS - no clear irq */
+
+#define IDE0_SETPWR(pwr) do{ \
+ if(pwr) atomic_clear_mask_b1(4,DIO_PFDR); \
+ else atomic_set_mask_b1(4,DIO_PFDR); \
+ }while(0)
+
+#define IDE0_PRESENT_M() ((*DIO_PORT9)&0x20)
+
+#if (HW_VER_MAJOR == 0) && (HW_VER_MINOR == 2)
+ #define IDE_SWAP_BYTES
+#endif
+
+#define IDE0_SUPPORT_ENABLED
+#endif
+
+
+/* IRAM 16 kB of on-chip memory */
+/* 0xffb000-0xffcfff .. 8 kB free */
+/* 0xffd000-0xffdfff .. 4 kB for Flash emulation */
+/* 0xffe000-0xffffc0 .. 4 kB - 64 B free*/
+/* 0xffffc0-0xffffff .. 64 B free*/
+#define IRAM_START (volatile __u8 * const)(0xffb000)
+#define IRAM_START1 (volatile __u8 * const)(0xffe000)
+#define FRAM_START (volatile __u8 * const)(0xffffc0)
+
+/* SCI0 - IrDA */
+/* SCI1 - IIC0 (P34, P35) */
+/* SCI2 - Boot */
+/* SCI3 - SPI */
+/* SCI4 - RS232/485 */
+
+/* IRQ0 - RTC */
+/* IRQ1 - Index mark */
+/* IRQ6 - IDE */
+
+/* Some registers are read only on H8S processors */
+/* We use shaddow registers for some of them */
+#define SHADDOW_REG_ALT(_reg,_mask,_xor) \
+ (*(_reg)=_reg##_shaddow=(_reg##_shaddow&~(_mask))^(_xor))
+
+#define SHADDOW_REG_SET(_reg,_mask) \
+ (*(_reg)=_reg##_shaddow|=(_mask))
+
+#define SHADDOW_REG_CLR(_reg,_mask) \
+ (*(_reg)=_reg##_shaddow&=~(_mask))
+
+#define SHADDOW_REG_RD(_reg) \
+ (_reg##_shaddow)
+
+#define SHADDOW_REG_WR(_reg,_val) \
+ (*(_reg)=_reg##_shaddow=(_val))
+
+__u8 DIO_P1DDR_shaddow;
+__u8 DIO_P3DDR_shaddow;
+__u8 DIO_PEDDR_shaddow;
+__u8 DIO_PFDDR_shaddow;
+__u8 PWRCTRL_OUT_shaddow;
+
+#endif /* _SYSTEM_DEF_HW01_H_ */
--- /dev/null
+# Generic directory or leaf node makefile for OCERA make framework
+
+ifndef MAKERULES_DIR
+MAKERULES_DIR := $(shell ( old_pwd="" ; while [ ! -e Makefile.rules ] ; do if [ "$$old_pwd" == `pwd` ] ; then exit 1 ; else old_pwd=`pwd` ; cd -L .. 2>/dev/null ; fi ; done ; pwd ) )
+endif
+
+ifeq ($(MAKERULES_DIR),)
+all : default
+.DEFAULT::
+ @echo -e "\nThe Makefile.rules has not been found in this or partent directory\n"
+else
+include $(MAKERULES_DIR)/Makefile.rules
+endif
+
--- /dev/null
+# -*- makefile -*-
+lib_LDSCRIPTS = $(notdir $(wildcard $(SOURCES_DIR)/*.ld*))
+# ldscript_ADD_PREFIX_PATH = crt0\.o
--- /dev/null
+/* linker script for inteligent boot block (hardwired boot mode) */
+
+INCLUDE "h8canusb.ld-cfg"
+
+PROVIDE( ___stack_top = ( __iram0_end & ~ 3 ) - 4 );
+
+SECTIONS
+{
+ .text :
+ {
+ text_start = . ;
+/* KEEP (crt0.o(.text))*/
+ *(EXCLUDE_FILE(*boot_fn.o) .text)
+ *(EXCLUDE_FILE(*boot_fn.o) .rodata)
+ *(.strings)
+ . = ALIGN( 4 ) ;
+ ___boot_fn_start = ALIGN( 0x4 ) ;
+ KEEP (*boot_fn.o(.text))
+ KEEP (*boot_fn.o(.rodata))
+ . = ALIGN( 4 ) ;
+ ___boot_fn_end = ALIGN( 0x4 ) ;
+ . = ALIGN( 0x4 ) ;
+ _etext = ALIGN( 0x4 ) ;
+ } > bloader
+
+ .tors :
+ {
+ ___ctors = . ;
+ *(.ctors)
+ ___ctors_end = . ;
+ ___dtors = . ;
+ *(.dtors)
+ ___dtors_end = . ;
+ . = ALIGN( 0x4 ) ;
+ } > bloader
+
+ .data :
+ {
+ ___data_lma = . ;
+ _data_start = . ;
+ *(.data)
+ . = ALIGN( 0x4 ) ;
+ _edata = ALIGN( 0x4 ) ;
+ } > bloader
+
+ .bss :
+ {
+ . = ALIGN( 0x4 ) ;
+ _bss_start = ALIGN( 0x4 ) ;
+ *(.bss)
+ *(COMMON)
+ . = ALIGN( 0x4 ) ;
+ _end = ALIGN( 0x4 ) ; ;
+ } > bloader
+
+ .stab 0 (NOLOAD) :
+ {
+ [ .stab ]
+ }
+
+ .stabstr 0 (NOLOAD) :
+ {
+ [ .stabstr ]
+ }
+}
--- /dev/null
+/* linker script for inteligent boot block (for user-program-mode boot-loader in flash) */
+
+INCLUDE "h8canusb.ld-cfg"
+
+PROVIDE( ___stack_top = ( __iram0_end & ~ 3 ) - 4 );
+
+STARTUP(crt0.o)
+
+SECTIONS
+{
+ .fvector :
+ {
+ ___flashbb_vector = . ;
+ LONG( ABSOLUTE( _start ) )
+ *(.fvector)
+ } > flashvec
+
+ .text :
+ {
+ text_start = . ;
+ KEEP (crt0.o(.text))
+ . = ALIGN( 4 ) ;
+ ___boot_fn_start = ALIGN( 0x4 ) ;
+ KEEP (*boot_fn.o(.text))
+ KEEP (*boot_fn.o(.rodata))
+ . = ALIGN( 4 ) ;
+ ___boot_fn_end = ALIGN( 0x4 ) ;
+ *(.text)
+ *(.rodata)
+ *(.strings)
+ . = ALIGN( 0x4 ) ;
+ _etext = ALIGN( 0x4 ) ;
+ } > flashbb
+
+ .tors :
+ {
+ ___ctors = . ;
+ *(.ctors)
+ ___ctors_end = . ;
+ ___dtors = . ;
+ *(.dtors)
+ ___dtors_end = . ;
+ . = ALIGN( 0x4 ) ;
+ ___data_lma = ALIGN( 0x4 ) ;
+ } > flashbb /*at> flashusr*/
+
+ .data :
+ AT ( ADDR( .tors ) + SIZEOF( .tors ) )
+ {
+ _data_start = . ;
+ *(.data)
+ . = ALIGN( 0x4 ) ;
+ _edata = ALIGN( 0x4 ) ;
+ } > iram1
+
+ /* ___data_lma = LOADADDR(.data) ; */
+
+ .bss :
+ {
+ _bss_start = ALIGN( 0x10 ) ;
+ *(.bss)
+ *(COMMON)
+ . = ALIGN( 0x4 ) ;
+ _end = . ;
+ } > iram0
+
+ .flashusr :
+ {
+ _usrprog_start = . ;
+ } > flashusr
+
+ .stab 0 (NOLOAD) :
+ {
+ [ .stab ]
+ }
+
+ .stabstr 0 (NOLOAD) :
+ {
+ [ .stabstr ]
+ }
+}
--- /dev/null
+/* memory ranges configuration for ID_CPU1 board */
+
+OUTPUT_FORMAT("coff-h8300")
+OUTPUT_ARCH(h8300s)
+
+ __flash_base = 0x000000 ;
+ __flash_size = 0x040000 ;
+ __flashbb_size = 0x002000 ;
+ __flashpb_size = 0x001000 ;
+ __ram_base = 0x200000 ;
+ __ram_end = 0x2fffff ;
+ __iram0_base = 0xffb000 ;
+ __iram0_end = 0xffcfff ;
+
+ __flashpb_base = __flash_base + __flashbb_size ;
+
+MEMORY
+ {
+ iramvec (w) : ORIGIN = 0x000000, LENGTH = 0x400
+ flashvec (rx) : ORIGIN = 0x000000, LENGTH = 0x400
+ iramdtc (w) : ORIGIN = 0x000400, LENGTH = 0x100
+ flashdtc (rx) : ORIGIN = 0x000400, LENGTH = 0x100
+ iramlow (w) : ORIGIN = 0x000500, LENGTH = 0x1000-0x500
+ flashbb (rx) : ORIGIN = 0x000500, LENGTH = 0x2000-0x500
+ flashpb1 (rx) : ORIGIN = 0x002000, LENGTH = 0x1000
+ flashpb2 (rx) : ORIGIN = 0x003000, LENGTH = 0x1000
+ flashusr (rx) : ORIGIN = 0x004000, LENGTH = 0x40000-0x4000
+ ram (w) : ORIGIN = 0x200000, LENGTH = 0x100000
+ ramstby (w) : ORIGIN = 0x610000, LENGTH = 0x8000
+ iram0 (w) : ORIGIN = 0xffb000, LENGTH = 0x2000
+ bloader (w) : ORIGIN = 0xffc000, LENGTH = 0x2000
+ iram1 (w) : ORIGIN = 0xffe000, LENGTH = 0x1000-0x40
+ eight (w) : ORIGIN = 0xffffc0, LENGTH = 0x40
+ }
+
--- /dev/null
+/* linker script for applications running from FLASH */
+
+INCLUDE "h8canusb.ld-cfg"
+
+/* PROVIDE ( sym = val ); */
+
+PROVIDE( ___stack_top = ( __iram0_end & ~ 3 ) - 4 );
+PROVIDE( ___heap_end = __ram_end );
+
+STARTUP(crt0.o)
+
+SECTIONS
+{
+ .text :
+ {
+ . = ALIGN( 4 ) ;
+ text_start = . ;
+ LONG( ABSOLUTE( _start ) + 0x5a000000 ) /* JMP _start */
+/* KEEP (crt0.o(.text)) */
+ . = ALIGN( 4 ) ;
+ ___boot_fn_start = ALIGN( 0x4 ) ;
+ KEEP (*boot_fn.o(.text))
+ KEEP (*boot_fn.o(.rodata))
+ . = ALIGN( 4 ) ;
+ ___boot_fn_end = ALIGN( 0x4 ) ;
+ *(.text)
+ *(.rodata)
+ . = ALIGN( 4 ) ;
+ ___nls_str_start = ALIGN( 0x4 ) ;
+ *(.nls_str)
+ ___nls_str_end = ALIGN( 0x4 ) ;
+ *(.strings)
+ _etext = ALIGN( 0x10 ) ;
+ } > flashusr
+
+ .tors :
+ {
+ ___ctors = . ;
+ *(.ctors)
+ ___ctors_end = . ;
+ ___dtors = . ;
+ *(.dtors)
+ ___dtors_end = . ;
+ . = ALIGN( 0x10 ) ;
+ ___data_lma = ALIGN( 0x10 ) ;
+ } > flashusr
+
+ .data :
+ AT ( ADDR( .tors ) + SIZEOF( .tors ) )
+ {
+ _data_start = . ;
+ *(.data)
+ . = ALIGN( 0x4 ) ;
+ _edata = ALIGN( 0x4 ) ;
+ } > ram /*at> flashusr*/
+
+ /* ___data_lma = LOADADDR(.data) ; */
+
+ .bss :
+ {
+ _bss_start = ALIGN( 0x10 ) ;
+ *(.bss)
+ *(COMMON)
+ . = ALIGN( 0x4 ) ;
+ _end = ALIGN( 0x4 ) ;
+ } > ram
+
+ .tiny :
+ {
+ *(.tiny)
+ } > iram0
+
+ .eight :
+ {
+ *(.eight)
+ } > eight
+
+ .stab 0 (NOLOAD) :
+ {
+ [ .stab ]
+ }
+
+ .stabstr 0 (NOLOAD) :
+ {
+ [ .stabstr ]
+ }
+}
projects / sysless.git / commitdiff