+#include "startcfg.h"\r
+#include <errno.h> \r
+#include <lpc21xx.h> /* LPC21xx definitions */\r
+\r
+\r
+// ----------------- PLL part ------------------------\r
+#define PLL_OFF 0 // fully disable PLL\r
+#define PLL_ACTIVE 1 // activate PLL \r
+#define PLL_CONNECT 3 // connect PLL to Cclk\r
+\r
+#define PLL_FEED_1 0xAA // PLL feed sequence 1\r
+#define PLL_FEED_2 0x55 // PLL feed sequence 3 \r
+#define PLL_LOCK_MASK 0x400 // PLL lock mask\r
+\r
+\r
+\r
+#define PLL_DIV_MASK_2 (0<<5)\r
+#define PLL_DIV_MASK_4 (1<<5)\r
+#define PLL_DIV_MASK_8 (2<<5)\r
+#define PLL_DIV_MASK_16 (3<<5)\r
+\r
+// ----------------- MAM part ------------------------\r
+\r
+#define MAM_1ST_BOUND 20000\r
+#define MAM_2ND_BOUND 40000\r
+#define MAM_TIM_1 1\r
+#define MAM_TIM_2 2\r
+#define MAM_TIM_3 3\r
+\r
+\r
+//------------------ code ----------------------------\r
+\r
+void wait(void)\r
+{\r
+ unsigned int i =2000000;\r
+ while(--i);\r
+}\r
+\r
+\r
+void deb_led(char leds)\r
+{\r
+ IO0DIR |= ((1<<21) | (1<<22) | (1<<23) | (1<<24));\r
+\r
+ if (leds & 0x1) IOSET0 |= (1<<21);\r
+ else IOCLR0 |= (1<<21);\r
+\r
+ if (leds & 0x2) IOSET0 |= (1<<22);\r
+ else IOCLR0 |= (1<<22);\r
+\r
+ if (leds & 0x4) IOSET0 |= (1<<23);\r
+ else IOCLR0 |= (1<<23);\r
+\r
+ if (leds & 0x8) IOSET0 |= (1<<24);\r
+ else IOCLR0 |= (1<<24);\r
+}\r
+\r
+\r
+\r
+\r
+\r
+// setup procesor PLL\r
+unsigned char init_PLL(char mul,char div, char mode)\r
+{\r
+ \r
+ unsigned int fcco, cclk; \r
+\r
+\r
+ PLLCON = PLL_OFF; // disable PLL \r
+ PLLFEED = PLL_FEED_1; // PLL change sequence\r
+ PLLFEED = PLL_FEED_2;\r
+ \r
+ if (mode == PLL_MODE_DISABLE)\r
+ {\r
+ return 0;\r
+ }\r
+\r
+ fcco = FOSC * 2 * (mul + 1) * div ; // count Fcco\r
+ if (( FCCO_MIN > fcco)|(fcco > FCCO_MAX)) // check Fcco range\r
+ {\r
+ return ERANGE;\r
+ }\r
+\r
+ cclk = (mul + 1) * FOSC; // count cclk\r
+ if (( CCLK_MIN > cclk)|(cclk > CCLK_MAX)) // check cclk range\r
+ {\r
+ return ERANGE;\r
+ }\r
+\r
+ switch(div)\r
+ {\r
+ case(PLL_DIV_2): div = PLL_DIV_MASK_2;\r
+ break;\r
+\r
+ case(PLL_DIV_4): div = PLL_DIV_MASK_4;\r
+ break;\r
+\r
+ case(PLL_DIV_8): div = PLL_DIV_MASK_8;\r
+ break;\r
+\r
+ case(PLL_DIV_16): div = PLL_DIV_MASK_16;\r
+ break;\r
+\r
+ default: return ERANGE;\r
+ }\r
+\r
+\r
+ PLLCFG = mul | div; // write multiplicator and dividet to PLL config\r
+ PLLCON = PLL_ACTIVE; // enable PLL \r
+ PLLFEED = PLL_FEED_1; // PLL change sequence\r
+ PLLFEED = PLL_FEED_2;\r
+\r
+ while( (PLLSTAT & PLL_LOCK_MASK) == 0); // wait for PLL LOCK\r
+\r
+ PLLCON = PLL_CONNECT; // connect PLL to Cclk\r
+ PLLFEED = PLL_FEED_1; // PLL change sequence\r
+ PLLFEED = PLL_FEED_2;\r
+\r
+ return 0;\r
+}\r
+\r
+\r
+// get procesor speed\r
+unsigned int get_sys_speed(void)\r
+{\r
+ if( (PLLCON & PLL_CONNECT) == PLL_CONNECT) // if PLL is connected return PLL-Cclk speed\r
+ {\r
+ return( FOSC * ((PLLCFG & 0x1F) + 1));\r
+ }\r
+\r
+ return FOSC; // if PLL is disabled return native Fosc\r
+\r
+}\r
+\r
+\r
+// setup MAM module\r
+\r
+unsigned char init_MAM(char mode)\r
+{\r
+ unsigned int clk;\r
+\r
+ MAMCR = MAM_OFF;\r
+\r
+ #ifdef MEM_RAM // FIXME udelat pomoci linker scriptu\r
+ return 0;\r
+ #endif\r
+\r
+\r
+ if (mode == MAM_OFF) return 0;\r
+ \r
+\r
+ clk = get_sys_speed();\r
+\r
+ if(clk > MAM_2ND_BOUND)\r
+ {\r
+ MAMTIM = MAM_TIM_3; \r
+ } \r
+ else if (clk > MAM_1ST_BOUND) \r
+ {\r
+ MAMTIM = MAM_TIM_2;\r
+ }\r
+ else MAMTIM = MAM_TIM_1;\r
+\r
+ MAMCR = mode;\r
+\r
+ return 0;\r
+}\r
+\r
+// setup APB module\r
+unsigned char set_APB(char div)\r
+{\r
+ VPBDIV = div;\r
+ return 0;\r
+}\r
+\r
+\r
+unsigned int get_apb_speed(void)\r
+{\r
+ int sysClk,div;\r
+\r
+ switch( VPBDIV & 0x03)\r
+ {\r
+ case APB_DIV_1: div = 1;\r
+ break;\r
+\r
+ case APB_DIV_2: div = 2;\r
+ break;\r
+\r
+ case APB_DIV_4: div = 4;\r
+ break;\r
+\r
+ default: return ERANGE;\r
+ }\r
+\r
+\r
+ sysClk = get_sys_speed();\r
+\r
+ return (sysClk / div);\r
+\r
+\r
+}\r
+\r
+\r