1 #include "startcfg.h"
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3 #include <lpc2xxx.h> /* LPC21xx definitions */
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6 // ----------------- PLL part ------------------------
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7 #define PLL_OFF 0 // fully disable PLL
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8 #define PLL_ACTIVE 1 // activate PLL
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9 #define PLL_CONNECT 3 // connect PLL to Cclk
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11 #define PLL_FEED_1 0xAA // PLL feed sequence 1
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12 #define PLL_FEED_2 0x55 // PLL feed sequence 3
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13 #define PLL_LOCK_MASK 0x400 // PLL lock mask
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17 #define PLL_DIV_MASK_2 (0<<5)
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18 #define PLL_DIV_MASK_4 (1<<5)
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19 #define PLL_DIV_MASK_8 (2<<5)
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20 #define PLL_DIV_MASK_16 (3<<5)
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22 // ----------------- MAM part ------------------------
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24 #define MAM_1ST_BOUND 20000
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25 #define MAM_2ND_BOUND 40000
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31 //------------------ code ----------------------------
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35 unsigned int i =2000000;
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40 void deb_led(char leds)
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42 IO0DIR |= ((1<<21) | (1<<22) | (1<<23) | (1<<24));
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44 if (leds & 0x1) IOSET0 |= (1<<21);
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45 else IOCLR0 |= (1<<21);
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47 if (leds & 0x2) IOSET0 |= (1<<22);
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48 else IOCLR0 |= (1<<22);
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50 if (leds & 0x4) IOSET0 |= (1<<23);
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51 else IOCLR0 |= (1<<23);
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53 if (leds & 0x8) IOSET0 |= (1<<24);
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54 else IOCLR0 |= (1<<24);
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61 // setup procesor PLL
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62 unsigned char init_PLL(char mul,char div, char mode)
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65 unsigned int fcco, cclk;
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68 PLLCON = PLL_OFF; // disable PLL
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69 PLLFEED = PLL_FEED_1; // PLL change sequence
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70 PLLFEED = PLL_FEED_2;
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72 if (mode == PLL_MODE_DISABLE)
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77 fcco = FOSC * 2 * (mul + 1) * div ; // count Fcco
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78 if (( FCCO_MIN > fcco)|(fcco > FCCO_MAX)) // check Fcco range
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83 cclk = (mul + 1) * FOSC; // count cclk
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84 if (( CCLK_MIN > cclk)|(cclk > CCLK_MAX)) // check cclk range
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91 case(PLL_DIV_2): div = PLL_DIV_MASK_2;
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94 case(PLL_DIV_4): div = PLL_DIV_MASK_4;
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97 case(PLL_DIV_8): div = PLL_DIV_MASK_8;
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100 case(PLL_DIV_16): div = PLL_DIV_MASK_16;
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103 default: return ERANGE;
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107 PLLCFG = mul | div; // write multiplicator and dividet to PLL config
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108 PLLCON = PLL_ACTIVE; // enable PLL
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109 PLLFEED = PLL_FEED_1; // PLL change sequence
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110 PLLFEED = PLL_FEED_2;
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112 while( (PLLSTAT & PLL_LOCK_MASK) == 0); // wait for PLL LOCK
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114 PLLCON = PLL_CONNECT; // connect PLL to Cclk
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115 PLLFEED = PLL_FEED_1; // PLL change sequence
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116 PLLFEED = PLL_FEED_2;
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122 // get procesor speed
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123 unsigned int get_sys_speed(void)
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125 if( (PLLCON & PLL_CONNECT) == PLL_CONNECT) // if PLL is connected return PLL-Cclk speed
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127 return( FOSC * ((PLLCFG & 0x1F) + 1));
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130 return FOSC; // if PLL is disabled return native Fosc
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135 // setup MAM module
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137 unsigned char init_MAM(char mode)
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143 #ifdef MEM_RAM // FIXME udelat pomoci linker scriptu
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148 if (mode == MAM_OFF) return 0;
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151 clk = get_sys_speed();
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153 if(clk > MAM_2ND_BOUND)
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155 MAMTIM = MAM_TIM_3;
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157 else if (clk > MAM_1ST_BOUND)
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159 MAMTIM = MAM_TIM_2;
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161 else MAMTIM = MAM_TIM_1;
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168 // setup APB module
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169 unsigned char set_APB(char div)
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176 unsigned int get_apb_speed(void)
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180 switch( VPBDIV & 0x03)
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182 case APB_DIV_1: div = 1;
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185 case APB_DIV_2: div = 2;
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188 case APB_DIV_4: div = 4;
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191 default: return ERANGE;
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195 sysClk = get_sys_speed();
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197 return (sysClk / div);
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