1 // ----------------------------------------------------------------------------
2 // ATMEL Microcontroller Software Support - ROUSSET -
3 // ----------------------------------------------------------------------------
4 // The software is delivered "AS IS" without warranty or condition of any
5 // kind, either express, implied or statutory. This includes without
6 // limitation any warranty or condition with respect to merchantability or
7 // fitness for any particular purpose, or against the infringements of
8 // intellectual property rights of others.
9 // ----------------------------------------------------------------------------
10 // File Name : Cstartup_SAM7.c
11 // Object : Low level initializations written in C for IAR
12 // 1.0 08/Sep/04 JPP : Creation
13 // 1.10 10/Sep/04 JPP : Update AT91C_CKGR_PLLCOUNT filed
14 // 1.11 07/Jan/07 RV : Cleaned up, modifed for SAM7XC256
19 * Derived from the M2M implementation of Open Controller, by Ruud Vlaming
20 * and Peter W. Zuidema.
21 * Tran Duy Khanh <tran@pbmaster.org>
23 * This program is free software; you can redistribute it and/or modify it
24 * under the terms of the GNU General Public License as published by the
25 * Free Software Foundation; either version 2, or (at your option) any
28 * This program is distributed in the hope that it will be useful, but
29 * WITHOUT ANY WARRANTY; without even the implied warranty of
30 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
31 * General Public License for more details.
34 /* Include the board file description */
35 #include <AT91SAM7XC256.h>
36 #include <system_def.h>
37 #include <lib_AT91SAM7XC256.h>
40 void AT91F_LowLevelInit(void);
42 /* The following functions must also be compiled in ARM mode */
43 extern void AT91F_Spurious_Handler(void);
44 extern void AT91F_Default_IRQ_Handler(void);
45 extern void AT91F_Default_FIQ_Handler(void);
48 //*----------------------------------------------------------------------------
49 //* \fn AT91F_LowLevelInit
50 //* \brief This function performs very low level HW initialization.
51 //*----------------------------------------------------------------------------
52 void AT91F_LowLevelInit(void)
55 AT91PS_PMC pPMC = AT91C_BASE_PMC;
57 /* Set Flash Wait state */
58 AT91C_BASE_MC->MC_FMR =
59 ((AT91C_MC_FMCN) & (50 << 16)) | AT91C_MC_FWS_1FWS;
61 /* Watchdog Disable */
62 AT91C_BASE_WDTC->WDTC_WDMR= AT91C_WDTC_WDDIS;
64 /* Set MCK at 47 923 200 Hz
65 * 1. Enabling the Main Oscillator:
66 * SCK = 1/32768 = 30.51 microseconds
67 * Start up time = 8 * 6 / SCK = 56 * 30.51 = 1,46484375 ms */
68 pPMC->PMC_MOR = ((AT91C_CKGR_OSCOUNT & (0x06 <<8)) | AT91C_CKGR_MOSCEN);
69 /* Wait the startup time */
70 while (!(pPMC->PMC_SR & AT91C_PMC_MOSCS))
73 /* Set the PLL with board specific values */
76 /* Wait the startup time */
77 while (!(pPMC->PMC_SR & AT91C_PMC_LOCK))
80 /* 4. Selection of Master Clock and Processor Clock
81 * select the PLL clock divided by 2 */
82 pPMC->PMC_MCKR = AT91C_PMC_PRES_CLK_2 ;
83 while (!(pPMC->PMC_SR & AT91C_PMC_MCKRDY))
85 pPMC->PMC_MCKR |= AT91C_PMC_CSS_PLL_CLK ;
86 while (!(pPMC->PMC_SR & AT91C_PMC_MCKRDY))
89 /* Enable User Reset and set its minimal assertion to
90 * 960 us = 2^(val+1) / 32768 -> val = 4 */
91 AT91C_BASE_RSTC->RSTC_RMR = AT91C_RSTC_URSTEN | (0x4<<8) |
92 (unsigned int) (0xA5<<24);
94 /* Set up the default interrupt handler vectors */
95 AT91C_BASE_AIC->AIC_SVR[0] = (int) AT91F_Default_FIQ_Handler;
96 for (i=1;i < 31; i++) {
97 AT91C_BASE_AIC->AIC_SVR[i] = (int) AT91F_Default_IRQ_Handler;
99 AT91C_BASE_AIC->AIC_SPU = (int) AT91F_Spurious_Handler;
103 * Configure the microcontroller and the peripherals.
105 * Main oscillator setup is performed by the low level init function
106 * called from the startup asm file.
108 static void SetupHardware(void)
110 /* When using the JTAG debugger the hardware is not always initialised
111 * to the correct default state. This line just ensures that this does
112 * not cause all interrupts to be masked at the start. */
113 AT91C_BASE_AIC->AIC_EOICR = 0;
115 /* Configure the PIO Lines corresponding to LED1 to LEDx
116 * and the Powerled */
117 AT91D_BASE_PIO_LED->PIO_PER = AT91B_LED_MASK | AT91B_POWERLED;
118 AT91D_BASE_PIO_LED->PIO_OER = AT91B_LED_MASK | AT91B_POWERLED;
120 /* Enable the peripheral clock for both PIO's */
121 AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_PIOA) | (1 << AT91C_ID_PIOB);
123 #ifdef INCLUDE_ETHERNET
124 /* Enable the peripheral clock for the EMAC */
125 AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_EMAC);
130 * Trigger the hardware reset line which is connected to several peripheral
131 * chips, including the OLED.
133 static void HardwareReset(void)
135 /* Enable User Reset */
136 /* [8:11] 0-0xF : t = 2^(val+1)/32768 = 2^(2+1)/32768 = 213 us */
137 AT91C_BASE_RSTC->RSTC_RMR = 0xA5000200 | AT91C_RSTC_URSTEN;
138 /* External reset = nRST */
139 AT91C_BASE_RSTC->RSTC_RCR = 0xA5000000 | AT91C_RSTC_EXTRST;
141 /* Wait for hardware reset end. */
142 while( !( AT91C_BASE_RSTC->RSTC_RSR & AT91C_RSTC_NRSTL ) ) {
150 /* Trigger the NRST line to reset the peripherals */
152 /* Configure the processor. */