board/arm/ul_usb1/defines/system_def.h

   1 /*******************************************************************
   2   Components for embedded applications builded for
   3   laboratory and medical instruments firmware
   4
   5   system_def.h - common cover for definition of hardware adresses,
   6                  registers, timing and other hardware dependant
   7                  parts of embedded hardware
   8
   9   Copyright (C) 2001 by Pavel Pisa pisa@cmp.felk.cvut.cz
  10             (C) 2002 by PiKRON Ltd. http://www.pikron.com
  11
  12  *******************************************************************/
  13
  14 #ifndef _SYSTEM_DEF_H_
  15 #define _SYSTEM_DEF_H_
  16
  17 #include <types.h>
  18 #include <system_stub.h>
  19 #include <LPC21xx.h>
  20
  21 #ifndef NULL
  22 #define NULL    0
  23 #endif
  24
  25 #define WITH_SFI_SEL
  26
  27 #define VER_CODE(major,minor,patch) (major*0x10000+minor*0x100+patch)
  28 /* Software version */
  29 #define SW_VER_ID       "MX_USBL"
  30 #define SW_VER_MAJOR    0
  31 #define SW_VER_MINOR    2
  32 #define SW_VER_PATCH    0
  33 #define SW_VER_CODE     VER_CODE(SW_VER_MAJOR,SW_VER_MINOR,SW_VER_PATCH)
  34 /* Hardware version */
  35 #define HW_VER_ID       "MX_CPU"
  36 #define HW_VER_MAJOR    1
  37 #define HW_VER_MINOR    0
  38 #define HW_VER_PATCH    0
  39 #define HW_VER_CODE     VER_CODE(HW_VER_MAJOR,HW_VER_MINOR,HW_VER_PATCH)
  40 /* Version of mechanical  */
  41 #define MECH_VER_ID     "MX_USBL"
  42 #define MECH_VER_MAJOR  0
  43 #define MECH_VER_MINOR  0
  44 #define MECH_VER_PATCH  0
  45 #define MECH_VER_CODE   VER_CODE(MECH_VER_MAJOR,MECH_VER_MINOR,MECH_VER_PATCH)
  46
  47
  48 // PLL setup values are computed within the LPC include file
  49 // It relies upon the following defines
  50 //#define FOSC                (11059200)  // Master Oscillator Freq.
  51 #define FOSC                (12000000)  // Master Oscillator Freq.
  52 #define PLL_MUL             (4)         // PLL Multiplier
  53 #define CCLK                (FOSC * PLL_MUL) // CPU Clock Freq.
  54
  55 // Pheripheral Bus Speed Divider
  56 #define PBSD                1           // MUST BE 1, 2, or 4
  57 #define PCLK                (CCLK / PBSD) // Pheripheal Bus Clock Freq.
  58
  59 #define CPU_SYS_HZ          1000
  60
  61 #ifndef BIT
  62 #define BIT(n)              (1 << (n))
  63 #endif
  64
  65 // Port Bit Definitions & Macros:    Description - initial conditions
  66 #define TXD0_BIT            BIT(0)      // used by UART0
  67 #define RXD0_BIT            BIT(1)      // used by UART0
  68 #define P0_SCL0_PIN         BIT(2)      // I2C 0 SCL
  69 #define P0_SDA0_PIN         BIT(3)      // I2C 0 SDA
  70 #define P0_SCK0_PIN         BIT(4)      // SPI0 clocks
  71 #define P0_MISO0_PIN        BIT(5)      // SPI0 master input
  72 #define P0_MOSI0_PIN        BIT(6)      // SPI0 master output
  73 #define P0_SSEL0_PIN        BIT(7)      // SPI0 external select/ADS1218 DRDY
  74 #define TXD1_BIT            BIT(8)      // used by UART1
  75 #define RXD1_BIT            BIT(9)      // used by UART1
  76 #define RTS1_BIT            BIT(10)     // used by UART1
  77 #define CTS1_BIT            BIT(11)     // used by UART1
  78 #define DSR1_BIT            BIT(12)     // used by UART1
  79 #define LED2_BIT            BIT(13)     // used by LED
  80 #define BOOT_BIT            BIT(14)     // SWITCH
  81 #define LED1_BIT            BIT(15)     // used by LED
  82 #define P0_SWITCH1_PIN      BIT(16)     // pin connected to the switch 1
  83 #define P0_SCK1_PIN         BIT(17)     // SPI1 clocks
  84 #define P0_MISO1_PIN        BIT(18)     // SPI1 master input
  85 #define P0_MOSI1_PIN        BIT(19)     // SPI1 master output
  86 #define P0_SSEL1_PIN        BIT(20)     // SPI1 slave select/25VF016 chipselect
  87 #define P0_21_UNUSED_BIT    BIT(21)     // P0.21 unused - low output
  88 #define P0_22_UNUSED_BIT    BIT(22)     // P0.22 unused - low output
  89 #define P0_SJA1000_ALE_PIN  BIT(23)     // SJA1000 ALE
  90 #define P0_24_UNUSED_BIT    BIT(24)     // P0.24 unused - low output
  91 #define P0_SJA1000_CS_PIN   BIT(25)     // SJA1000 CS
  92 #define P0_26_UNUSED_BIT    BIT(26)     // P0.26 unused - low output
  93 #define P0_27_UNUSED_BIT    BIT(27)     // P0.27 unused - low output
  94 #define P0_SJA1000_RD_PIN   BIT(28)     // SJA1000 RD
  95 #define P0_SJA1000_WR_PIN   BIT(29)     // SJA1000 WR
  96 #define P0_SJA1000_INT_PIN  BIT(30)     // SJA1000 INT
  97 #define P0_USB_CONNECT_PIN  BIT(31)     // USB Connect Control
  98
  99 #define P1_SJA1000_D0_PIN   BIT(16)     // SJA1000 D0
 100 #define P1_SJA1000_D1_PIN   BIT(17)     // SJA1000 D1
 101 #define P1_SJA1000_D2_PIN   BIT(18)     // SJA1000 D2
 102 #define P1_SJA1000_D3_PIN   BIT(19)     // SJA1000 D3
 103 #define P1_SJA1000_D4_PIN   BIT(20)     // SJA1000 D4
 104 #define P1_SJA1000_D5_PIN   BIT(21)     // SJA1000 D5
 105 #define P1_SJA1000_D6_PIN   BIT(22)     // SJA1000 D6
 106 #define P1_SJA1000_D7_PIN   BIT(23)     // SJA1000 D7
 107 #define P1_OUT_PORT_CS_PIN  BIT(24)     // Chip select for 74HC574 chip
 108 #define P1_SJA1000_RST_PIN  BIT(25)     // SJA1000 RST
 109 #define P1_26_UNUSED_BIT    BIT(26)     // used by JTAG
 110 #define P1_27_UNUSED_BIT    BIT(27)     // used by JTAG
 111 #define P1_28_UNUSED_BIT    BIT(28)     // used by JTAG
 112 #define P1_29_UNUSED_BIT    BIT(29)     // used by JTAG
 113 #define P1_30_UNUSED_BIT    BIT(30)     // used by JTAG
 114 #define P1_31_UNUSED_BIT    BIT(31)     // used by JTAG
 115
 116 #define P1_SJA1000_DATA_PINS   (uint32_t) ( \
 117                                          P1_SJA1000_D0_PIN | \
 118                                          P1_SJA1000_D1_PIN | \
 119                                          P1_SJA1000_D2_PIN | \
 120                                          P1_SJA1000_D3_PIN | \
 121                                          P1_SJA1000_D4_PIN | \
 122                                          P1_SJA1000_D5_PIN | \
 123                                          P1_SJA1000_D6_PIN | \
 124                                          P1_SJA1000_D7_PIN | \
 125                                          0 )
 126
 127 #define P0IO_INPUT_BITS      (uint32_t) ( \
 128                                          P0_SCL0_PIN | \
 129                                          P0_SDA0_PIN | \
 130                                          P0_MISO0_PIN | \
 131                                          P0_SSEL0_PIN | \
 132                                          P0_MISO1_PIN | \
 133                                          BOOT_BIT | \
 134                                          P0_SWITCH1_PIN | \
 135                                          P0_SJA1000_INT_PIN | \
 136                                          0 )
 137
 138 #define P1IO_INPUT_BITS      (uint32_t) ( \
 139                                          P1_26_UNUSED_BIT | \
 140                                          P1_27_UNUSED_BIT | \
 141                                          P1_28_UNUSED_BIT | \
 142                                          P1_29_UNUSED_BIT | \
 143                                          P1_30_UNUSED_BIT | \
 144                                          P1_31_UNUSED_BIT | \
 145                                          0 )
 146
 147 #define P0IO_ZERO_BITS       (uint32_t) ( \
 148                                          P0_21_UNUSED_BIT | \
 149                                          P0_22_UNUSED_BIT | \
 150                                          P0_24_UNUSED_BIT | \
 151                                          P0_26_UNUSED_BIT | \
 152                                          P0_27_UNUSED_BIT | \
 153                                          P0_USB_CONNECT_PIN | \
 154                                          0 )
 155
 156 #define P1IO_ZERO_BITS       (uint32_t) ( \
 157                                          P1_SJA1000_DATA_PINS | \
 158                                          P1_SJA1000_RST_PIN | \
 159                                          0 )
 160
 161
 162 #define P0IO_ONE_BITS        (uint32_t) ( \
 163                                          P0_SCK0_PIN | \
 164                                          P0_MOSI0_PIN | \
 165                                          LED1_BIT | \
 166                                          BOOT_BIT | \
 167                                          LED2_BIT | \
 168                                          P0_SCK1_PIN | \
 169                                          P0_MOSI1_PIN | \
 170                                          P0_SSEL1_PIN | \
 171                                          P0_SJA1000_ALE_PIN | \
 172                                          P0_SJA1000_CS_PIN | \
 173                                          P0_SJA1000_RD_PIN | \
 174                                          P0_SJA1000_WR_PIN | \
 175                                          0 )
 176
 177 #define P1IO_ONE_BITS        (uint32_t) ( \
 178                                          P1_OUT_PORT_CS_PIN | \
 179                                          0 )
 180
 181 #define P0IO_OUTPUT_BITS     (uint32_t) ( \
 182                                          P0IO_ZERO_BITS | \
 183                                          P0IO_ONE_BITS )
 184
 185 #define P1IO_OUTPUT_BITS     (uint32_t) ( \
 186                                          P1IO_ZERO_BITS | \
 187                                          P1IO_ONE_BITS )
 188
 189 /***************************************************************************/
 190 /* watchdog */
 191 //#define WATCHDOG_ENABLED
 192 #define WATCHDOG_TIMEOUT_MS     1000
 193
 194 /***************************************************************************/
 195 /* uLan configuration */
 196
 197 #ifdef UL_LOG_ENABLE
 198   #undef UL_LOG_ENABLE
 199 #endif
 200
 201 #ifdef ULD_DEFAULT_BUFFER_SIZE
 202   #undef ULD_DEFAULT_BUFFER_SIZE
 203   #define ULD_DEFAULT_BUFFER_SIZE 0x0800
 204 #endif
 205
 206 #define UL_DRV_SYSLESS_PORT 0xE0010000
 207 #define UL_DRV_SYSLESS_BAUD 19200
 208 #define UL_DRV_SYSLESS_IRQ HAL_INTERRUPT_UART1
 209 #define UL_DRV_SYSLESS_MY_ADR_DEFAULT 1
 210
 211 extern long int uld_jiffies;
 212 #define watchdog_feed lpc_watchdog_feed
 213 #define kvpb_erase lpcisp_kvpb_erase
 214 #define kvpb_copy lpcisp_kvpb_copy
 215 #define kvpb_flush lpcisp_kvpb_flush
 216
 217 #endif /* _SYSTEM_DEF_H_ */