ARM: tegra12: set CPU rate to 2.2GHz for sku 0x87

Set CPU rate to 2.2Ghz for sku 0x87 (CD575M) similar
to its DSC and POP counterparts

Bug 1342499

Change-Id: Ia4d3de1f572f8557f4eead4665c20fd80bea1c6f
Signed-off-by: Ishwarya Balaji Gururajan <igururajan@nvidia.com>
Signed-off-by: Jong Kim <jongk@nvidia.com>
Reviewed-on: http://git-master/r/419049
(cherry picked from commit 999af951da540a4db49d7294e4bec581ee2bd9ae)
Reviewed-on: http://git-master/r/422393
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Tested-by: Bibek Basu <bbasu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
Reviewed-by: Eric Brower <ebrower@nvidia.com>
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>

diff --git a/arch/arm/mach-tegra/tegra12_speedo.c b/arch/arm/mach-tegra/tegra12_speedo.c
index b5862a700d244ff694d4affef49fb45d274d6cac..9ce142e5354ae174750986f39973bd0fd3757327 100644 (file)
--- a/arch/arm/mach-tegra/tegra12_speedo.c
+++ b/arch/arm/mach-tegra/tegra12_speedo.c
@@ -106,7 +106,7 @@ static void rev_sku_to_speedo_ids(int rev, int sku)
        case 0x1F:
        case 0x87:
        case 0x27:
-               cpu_speedo_id = sku == 0x27 ? 5 : 2;
+               cpu_speedo_id = 5;
                soc_speedo_id = 0;
                gpu_speedo_id = 1;
                threshold_index = 0;