]> rtime.felk.cvut.cz Git - sojka/nv-tegra/linux-3.10.git/commitdiff
ARM: tegra: usb: read hot plug only in host mode
authorRakesh Bodla <rbodla@nvidia.com>
Thu, 20 Sep 2012 06:41:39 +0000 (12:11 +0530)
committerDan Willemsen <dwillemsen@nvidia.com>
Sat, 14 Sep 2013 19:34:42 +0000 (12:34 -0700)
Hot plug data is available only in host mode. Guard hotplug
read with host mode.

Bug 1047763
Bug 1050193

Change-Id: I92fccc228db38f0ae0cebffe8a6fc69378f3da83
Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-on: http://git-master/r/133682
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
Rebase-Id: R2ef46e0142d5bb7e164078b6449ba84a4e072dee

arch/arm/mach-tegra/tegra11x_usb_phy.c
arch/arm/mach-tegra/tegra2_usb_phy.c
arch/arm/mach-tegra/tegra3_usb_phy.c
arch/arm/mach-tegra/tegra_usb_phy.h
drivers/usb/phy/phy-tegra-usb.c

index f74e38a7e96194cc4e33b23e065be9a32ca3c8c9..507951764a549bc2eb6f427ab270e47a2c02ed58 100644 (file)
@@ -1229,7 +1229,7 @@ static void utmi_phy_close(struct tegra_usb_phy *phy)
        DBG("%s inst:[%d]\n", __func__, phy->inst);
 
        /* Disable PHY clock valid interrupts while going into suspend*/
-       if (phy->pdata->u_data.host.hot_plug) {
+       if (phy->hot_plug) {
                val = readl(base + USB_SUSP_CTRL);
                val &= ~USB_PHY_CLK_VALID_INT_ENB;
                writel(val, base + USB_SUSP_CTRL);
@@ -1312,7 +1312,7 @@ static int utmi_phy_irq(struct tegra_usb_phy *phy)
                remote_wakeup = true;
        }
 
-       if (phy->pdata->u_data.host.hot_plug) {
+       if (phy->hot_plug) {
                val = readl(base + USB_SUSP_CTRL);
                if ((val  & USB_PHY_CLK_VALID_INT_STS)) {
                        val &= ~USB_PHY_CLK_VALID_INT_ENB |
@@ -1410,7 +1410,7 @@ static int utmi_phy_power_off(struct tegra_usb_phy *phy)
                utmip_setup_pmc_wake_detect(phy);
        }
 
-       if (!phy->pdata->u_data.host.hot_plug) {
+       if (!phy->hot_plug) {
                val = readl(base + UTMIP_XCVR_CFG0);
                val |= (UTMIP_FORCE_PD_POWERDOWN | UTMIP_FORCE_PD2_POWERDOWN |
                         UTMIP_FORCE_PDZI_POWERDOWN);
@@ -1428,7 +1428,7 @@ static int utmi_phy_power_off(struct tegra_usb_phy *phy)
 
        utmi_phy_pad_power_off(phy);
 
-       if (phy->pdata->u_data.host.hot_plug) {
+       if (phy->hot_plug) {
                bool enable_hotplug = true;
                /* if it is OTG port then make sure to enable hot-plug feature
                   only if host adaptor is connected, i.e id is low */
@@ -1461,7 +1461,7 @@ static int utmi_phy_power_off(struct tegra_usb_phy *phy)
        val |= HOSTPC1_DEVLC_PHCD;
        writel(val, base + HOSTPC1_DEVLC);
 
-       if (!phy->pdata->u_data.host.hot_plug) {
+       if (!phy->hot_plug) {
                val = readl(base + USB_SUSP_CTRL);
                val |= UTMIP_RESET;
                writel(val, base + USB_SUSP_CTRL);
index 1befe2b0d0f626ef2e9db5218255775bbfd2ef0a..07bf7ee03b6fa095ba644664db1e630bd578d368 100644 (file)
@@ -610,7 +610,7 @@ static int utmi_phy_irq(struct tegra_usb_phy *phy)
        DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, phy->inst);
 
        usb_phy_fence_read(phy);
-       if (phy->pdata->u_data.host.hot_plug) {
+       if (phy->hot_plug) {
                val = readl(base + USB_SUSP_CTRL);
                if ((val  & USB_PHY_CLK_VALID_INT_STS)) {
                        val &= ~USB_PHY_CLK_VALID_INT_ENB |
@@ -697,7 +697,7 @@ static int utmi_phy_power_off(struct tegra_usb_phy *phy)
                writel(val, base + UTMIP_BAT_CHRG_CFG0);
        }
 
-       if (!phy->pdata->u_data.host.hot_plug) {
+       if (!phy->hot_plug) {
                val = readl(base + UTMIP_XCVR_UHSIC_HSRX_CFG0);
                val |= (UTMIP_FORCE_PD_POWERDOWN | UTMIP_FORCE_PD2_POWERDOWN |
                         UTMIP_FORCE_PDZI_POWERDOWN);
@@ -718,7 +718,7 @@ static int utmi_phy_power_off(struct tegra_usb_phy *phy)
        phy->port_speed = (readl(base + USB_PORTSC) >> 26) &
                        USB_PORTSC_PSPD_MASK;
 
-       if (phy->pdata->u_data.host.hot_plug) {
+       if (phy->hot_plug) {
                bool enable_hotplug = true;
                /* if it is OTG port then make sure to enable hot-plug feature
                   only if host adaptor is connected, i.e id is low */
index 156ecc603a241f5c1f3159b91c0bc1caba40d612..c9b37b8cb4ece5aa06e12667928421b51362e3ca 100644 (file)
@@ -1157,7 +1157,7 @@ static void utmi_phy_close(struct tegra_usb_phy *phy)
        DBG("%s inst:[%d]\n", __func__, phy->inst);
 
        /* Disable PHY clock valid interrupts while going into suspend*/
-       if (phy->pdata->u_data.host.hot_plug) {
+       if (phy->hot_plug) {
                val = readl(base + USB_SUSP_CTRL);
                val &= ~USB_PHY_CLK_VALID_INT_ENB;
                writel(val, base + USB_SUSP_CTRL);
@@ -1241,7 +1241,7 @@ static int utmi_phy_irq(struct tegra_usb_phy *phy)
                remote_wakeup = true;
        }
 
-       if (phy->pdata->u_data.host.hot_plug) {
+       if (phy->hot_plug) {
                val = readl(base + USB_SUSP_CTRL);
                if ((val  & USB_PHY_CLK_VALID_INT_STS)) {
                        val &= ~USB_PHY_CLK_VALID_INT_ENB |
@@ -1472,7 +1472,7 @@ static int utmi_phy_power_off(struct tegra_usb_phy *phy)
                utmip_setup_pmc_wake_detect(phy);
        }
 
-       if (!phy->pdata->u_data.host.hot_plug) {
+       if (!phy->hot_plug) {
                val = readl(base + UTMIP_XCVR_CFG0);
                val |= (UTMIP_FORCE_PD_POWERDOWN | UTMIP_FORCE_PD2_POWERDOWN |
                         UTMIP_FORCE_PDZI_POWERDOWN);
@@ -1490,7 +1490,7 @@ static int utmi_phy_power_off(struct tegra_usb_phy *phy)
 
        utmi_phy_pad_power_off(phy);
 
-       if (phy->pdata->u_data.host.hot_plug) {
+       if (phy->hot_plug) {
                bool enable_hotplug = true;
                /* if it is OTG port then make sure to enable hot-plug feature
                   only if host adaptor is connected, i.e id is low */
@@ -1523,7 +1523,7 @@ static int utmi_phy_power_off(struct tegra_usb_phy *phy)
        val |= HOSTPC1_DEVLC_PHCD;
        writel(val, base + HOSTPC1_DEVLC);
 
-       if (!phy->pdata->u_data.host.hot_plug) {
+       if (!phy->hot_plug) {
                val = readl(base + USB_SUSP_CTRL);
                val |= UTMIP_RESET;
                writel(val, base + USB_SUSP_CTRL);
index 1b62804fd567ebbee28489a550110ef4dfe63767..3331445fb80c35fe2b61e0a590e828857a563c5a 100644 (file)
@@ -100,6 +100,7 @@ struct tegra_usb_phy {
        bool pmc_sleepwalk;
        bool bus_reseting;
        bool linkphy_init;
+       bool hot_plug;
 };
 
 int usb_phy_reg_status_wait(void __iomem *reg, u32 mask,
index 09f14304efc062e2b304c2d306f1077e6e56f1d1..0cd95a131e6b2040c993b02d1a57ff770a2851f2 100644 (file)
@@ -670,6 +670,9 @@ struct tegra_usb_phy *tegra_usb_phy_open(struct platform_device *pdev)
        phy->pdev = pdev;
        phy->inst = pdev->id;
 
+       if (phy->pdata->op_mode == TEGRA_USB_OPMODE_HOST)
+               phy->hot_plug = phy->pdata->u_data.host.hot_plug;
+
        print_usb_plat_data_info(phy);
 
        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);