arm64: tegra210: Align gm20b entry with upstream

Add upstream nvidia,gm20b compatibility, and upstream style interrupt
references.

Change-Id: I2123221182be6646df8a88c2d2625278c659167a
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/740856

diff --git a/arch/arm64/boot/dts/tegra210-soc-base.dtsi b/arch/arm64/boot/dts/tegra210-soc-base.dtsi
index b40876c489d7f451a5c51941ee4014371663387d..05bc99ac8c04c7e64831651af9b1882006767b27 100644 (file)
--- a/arch/arm64/boot/dts/tegra210-soc-base.dtsi
+++ b/arch/arm64/boot/dts/tegra210-soc-base.dtsi
@@ -13,6 +13,7 @@
  * more details.
  */
 
+#include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/memory/tegra-swgroup.h>
 #include "tegra210-platforms/tegra210-thermal.dtsi"
 #include <dt-bindings/gpio/tegra-gpio.h>
@@ -741,14 +742,15 @@
        };
 
        gpu {
-               compatible = "nvidia,tegra210-gm20b";
+               compatible = "nvidia,tegra210-gm20b", "nvidia,gm20b";
                nvidia,host1x = <&host1x>;
                power-domains = <&gpu_pd>;
                reg = <0x0 0x57000000 0x0 0x01000000>,
                    <0x0 0x58000000 0x0 0x01000000>,
                    <0x0 0x538f0000 0x0 0x00001000>;
-                   interrupts = <0 157 0x04
-                           0 158 0x04>;
+               interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-names = "stall", "nonstall";
                iommus = <&smmu TEGRA_SWGROUP_GPUB>;
                access-vpr-phys;
                status = "disabled";