ARM: tegra: remove init uV for the core rail for E1735

The core voltage is configured by BL based on tegra SKU and PMIC maximum
current capacity. This need not to be initialise in the kernel regulator
init. Remove the entry which pass the initial voltage.

bug 1499655

Change-Id: Ia2a51b6dbf9624361ba74fe6b73fc07b8800073d
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/402990
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

diff --git a/arch/arm/boot/dts/tegra124-platforms/tegra124-ardbeg-pmic-e1735-1000-a00.dtsi b/arch/arm/boot/dts/tegra124-platforms/tegra124-ardbeg-pmic-e1735-1000-a00.dtsi
index 7b43454cd09cff3cc61b4e2111aa92b29971585d..6592411059bfa0a54159a173079c7c09d19f405f 100644 (file)
--- a/arch/arm/boot/dts/tegra124-platforms/tegra124-ardbeg-pmic-e1735-1000-a00.dtsi
+++ b/arch/arm/boot/dts/tegra124-platforms/tegra124-ardbeg-pmic-e1735-1000-a00.dtsi
@@ -117,7 +117,6 @@
                                                regulator-name = "vdd-core";
                                                regulator-min-microvolt = <700000>;
                                                regulator-max-microvolt = <1400000>;
-                                               regulator-init-microvolt = <1000000>;
                                                regulator-always-on;
                                                regulator-init-mode = <REGULATOR_MODE_NORMAL>;
                                                regulator-boot-on;