]> rtime.felk.cvut.cz Git - sojka/nv-tegra/linux-3.10.git/commitdiff
gpu: nvgpu: Regenerate HW headers
authorTerje Bergstrom <tbergstrom@nvidia.com>
Wed, 25 Mar 2015 17:50:05 +0000 (10:50 -0700)
committerTerje Bergstrom <tbergstrom@nvidia.com>
Wed, 1 Apr 2015 20:18:55 +0000 (13:18 -0700)
Added fuse for FBP and DS exception register.

Change-Id: Ie38a84eac40ca2d8cf3ac8f19ed6bad0d6bc1dd9
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/722846

drivers/gpu/nvgpu/gm20b/hw_fuse_gm20b.h
drivers/gpu/nvgpu/gm20b/hw_gr_gm20b.h

index 729d6541e6c4befa51aaeb1e2ea345c2eeedb270..a36709e32620b8244bf64f8d6162f9f0991adacf 100644 (file)
@@ -118,4 +118,12 @@ static inline u32 fuse_status_opt_rop_l2_fbp_r(u32 i)
 {
        return 0x00021d70 + i*4;
 }
+static inline u32 fuse_status_opt_fbp_r(void)
+{
+       return 0x00021d38;
+}
+static inline u32 fuse_status_opt_fbp_idx_v(u32 r, u32 i)
+{
+       return (r >> (0 + i*0)) & 0x1;
+}
 #endif
index 11605deb24578c53c33dcc146489866e4688fda1..2fea4e8c6405342e77af4fa0e8990372a3b6a7ac 100644 (file)
@@ -170,6 +170,10 @@ static inline u32 gr_exception_memfmt_m(void)
 {
        return 0x1 << 1;
 }
+static inline u32 gr_exception_ds_m(void)
+{
+       return 0x1 << 4;
+}
 static inline u32 gr_exception1_r(void)
 {
        return 0x00400118;