endif
nvhost-isp-objs = \
+ isp_isr_v1.o \
isp.o
obj-$(CONFIG_TEGRA_GRHOST_ISP) += nvhost-isp.o
/*
- * drivers/video/tegra/host/isp/isp.c
- *
* Tegra Graphics ISP
*
- * Copyright (c) 2012-2014, NVIDIA Corporation. All rights reserved.
+ * Copyright (c) 2012-2015, NVIDIA Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
return;
}
-static irqreturn_t isp_isr(int irq, void *dev_id)
+void nvhost_isp_queue_isr_work(struct isp *tegra_isp)
{
- struct isp *dev = dev_id;
- unsigned long flags;
- u32 reg, enable_reg;
-
- spin_lock_irqsave(&dev->lock, flags);
-
- reg = tegra_isp_read(dev, 0xf8);
-
- if (reg & (1 << 5)) {
- /* Disable */
- enable_reg = tegra_isp_read(dev, 0x14c);
- enable_reg &= ~1;
- tegra_isp_write(dev, 0x14c, enable_reg);
-
- /* Clear */
- reg &= (1 << 5);
- tegra_isp_write(dev, 0xf8, reg);
-
- /* put work into queue */
- queue_work(dev->isp_workqueue,
- (struct work_struct *)dev->my_isr_work);
-
- } else {
- pr_err("Unkown interrupt - ISR status %x\n", reg);
- }
-
- spin_unlock_irqrestore(&dev->lock, flags);
- return IRQ_HANDLED;
+ queue_work(tegra_isp->isp_workqueue, &tegra_isp->my_isr_work->work);
}
static int isp_probe(struct platform_device *dev)
err = -ENOMEM;
}
- tegra_isp->irq = platform_get_irq(dev, 0);
- if (tegra_isp->irq <= 0) {
- dev_err(&dev->dev, "no irq\n");
- err = -ENOENT;
- goto camera_isp_unregister;
- }
-
- err = request_irq(tegra_isp->irq,
- isp_isr, 0, "tegra-isp-isr", tegra_isp);
- if (err) {
- pr_err("%s: request_irq(%d) failed(%d)\n", __func__,
- tegra_isp->irq, err);
- goto camera_isp_unregister;
- }
-
- spin_lock_init(&tegra_isp->lock);
-
/* creating workqueue */
if (dev_id == 0)
tegra_isp->isp_workqueue = alloc_workqueue("ispa_workqueue",
INIT_WORK((struct work_struct *)tegra_isp->my_isr_work, isp_isr_work);
- disable_irq(tegra_isp->irq);
-
nvhost_module_init(dev);
#ifdef CONFIG_PM_GENERIC_DOMAINS
/*
- * drivers/video/tegra/host/vi/vi.h
- *
* Tegra Graphics Host ISP
*
- * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
+ * Copyright (c) 2014-2015, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
typedef void (*callback)(void *);
struct tegra_isp_mfi {
- struct work_struct my_isp_work;
+ struct work_struct work;
};
struct isp {
int nvhost_isp_t124_finalize_poweron(struct platform_device *);
int nvhost_isp_t124_prepare_poweroff(struct platform_device *);
int nvhost_isp_t210_finalize_poweron(struct platform_device *);
+void nvhost_isp_queue_isr_work(struct isp *tegra_isp);
#ifdef CONFIG_TEGRA_GRHOST_ISP
int tegra_isp_register_mfi_cb(callback cb, void *cb_arg);
--- /dev/null
+/*
+ * Tegra Graphics ISP hardware specifics
+ *
+ * Copyright (c) 2015, NVIDIA Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/irq.h>
+
+#include "bus_client.h"
+#include "isp.h"
+#include "dev.h"
+
+static irqreturn_t isp_isr(int irq, void *dev_id)
+{
+ struct isp *tegra_isp = dev_id;
+ struct platform_device *pdev = tegra_isp->ndev;
+ unsigned long flags;
+ u32 reg, enable_reg;
+
+ spin_lock_irqsave(&tegra_isp->lock, flags);
+
+ reg = host1x_readl(pdev, 0xf8);
+
+ if (reg & (1 << 5)) {
+ /* Disable */
+ enable_reg = host1x_readl(pdev, 0x14c);
+ enable_reg &= ~1;
+ host1x_writel(pdev, 0x14c, enable_reg);
+
+ /* Clear */
+ reg &= (1 << 5);
+ host1x_writel(pdev, 0xf8, reg);
+
+ /* Trigger software worker */
+ nvhost_isp_queue_isr_work(tegra_isp);
+
+ } else {
+ pr_err("Unkown interrupt - ISR status %x\n", reg);
+ }
+
+ spin_unlock_irqrestore(&tegra_isp->lock, flags);
+
+ return IRQ_HANDLED;
+}
+
+int nvhost_isp_register_isr_v1(struct platform_device *dev)
+{
+ struct nvhost_device_data *pdata = platform_get_drvdata(dev);
+ struct isp *tegra_isp = pdata->private_data;
+ int err;
+
+ tegra_isp->irq = platform_get_irq(dev, 0);
+
+ if (tegra_isp->irq <= 0) {
+ dev_err(&dev->dev, "no irq\n");
+ return -ENOENT;
+ }
+
+ spin_lock_init(&tegra_isp->lock);
+
+ err = request_irq(tegra_isp->irq, isp_isr, 0,
+ "tegra-isp-isr", tegra_isp);
+ if (err) {
+ pr_err("%s: request_irq(%d) failed(%d)\n", __func__,
+ tegra_isp->irq, err);
+ return err;
+ }
+
+ disable_irq(tegra_isp->irq);
+
+ return 0;
+}
--- /dev/null
+/*
+ * Tegra Graphics ISP hardware specifics
+ *
+ * Copyright (c) 2015, NVIDIA Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef ISP_ISR_V1_H
+#define ISP_ISR_V1_H
+
+struct platform_device;
+
+int nvhost_isp_register_isr_v1(struct platform_device *dev);
+
+#endif
*
* Tegra Graphics Init for T124 Architecture Chips
*
- * Copyright (c) 2011-2014, NVIDIA CORPORATION. All rights reserved.
+ * Copyright (c) 2011-2015, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
#include "flcn/flcn.h"
#include "vi/vi.h"
#include "isp/isp.h"
+#include "isp/isp_isr_v1.h"
#include "scale3d.h"
#include "chip_support.h"
#include "nvhost_scale.h"
{"sclk", 80000000} },
.finalize_poweron = nvhost_isp_t124_finalize_poweron,
.prepare_poweroff = nvhost_isp_t124_prepare_poweroff,
+ .hw_init = nvhost_isp_register_isr_v1,
.ctrl_ops = &tegra_isp_ctrl_ops,
.gather_filter_enabled = true,
};
{"sclk", 80000000} },
.finalize_poweron = nvhost_isp_t124_finalize_poweron,
.prepare_poweroff = nvhost_isp_t124_prepare_poweroff,
+ .hw_init = nvhost_isp_register_isr_v1,
.ctrl_ops = &tegra_isp_ctrl_ops,
.gather_filter_enabled = true,
};
#include "tsec/tsec.h"
#include "vi/vi.h"
#include "isp/isp.h"
+#include "isp/isp_isr_v1.h"
#include "../../../../arch/arm/mach-tegra/iomap.h"
.clocks = {{ "isp", UINT_MAX, 0, TEGRA_MC_CLIENT_ISP }},
.finalize_poweron = nvhost_isp_t210_finalize_poweron,
.prepare_poweroff = nvhost_isp_t124_prepare_poweroff,
+ .hw_init = nvhost_isp_register_isr_v1,
.ctrl_ops = &tegra_isp_ctrl_ops,
.gather_filter_enabled = true,
.bond_out_id = BOND_OUT_ISP,
TEGRA_MC_CLIENT_ISPB } },
.finalize_poweron = nvhost_isp_t210_finalize_poweron,
.prepare_poweroff = nvhost_isp_t124_prepare_poweroff,
+ .hw_init = nvhost_isp_register_isr_v1,
.ctrl_ops = &tegra_isp_ctrl_ops,
.gather_filter_enabled = true,
.bond_out_id = BOND_OUT_ISP,