ARM: tegra: devices: Add PPCS1_ASID for PPCS1

Bug 1380102
Bug 1380855

Change-Id: I3d4da06abed76123b73740dff33a948965837d3b
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/360073
(cherry picked from commit e6cd2c0e986034a9b12a7581bd3bafe5ad0c20b0)
Reviewed-on: http://git-master/r/335092
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Hiroshi Doyu <hdoyu@nvidia.com>

diff --git a/arch/arm/mach-tegra/devices.c b/arch/arm/mach-tegra/devices.c
index 316da8342d79bba42d6b2d9138c8b68c8f1b00c8..1f2e634f7dbba1d5e0cf21bfbc5aaeb62544b2d0 100644 (file)
--- a/arch/arm/mach-tegra/devices.c
+++ b/arch/arm/mach-tegra/devices.c
@@ -5,7 +5,7 @@
  *     Colin Cross <ccross@android.com>
  *     Erik Gilling <ccross@android.com>
  *
- * Copyright (c) 2010-2013, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2010-2014, NVIDIA CORPORATION.  All rights reserved.
  *
  * This software is licensed under the terms of the GNU General Public
  * License version 2, as published by the Free Software Foundation, and
@@ -2290,6 +2290,7 @@ struct tegra_iommu_mapping {
 static struct tegra_iommu_mapping smmu_default_map[] = {
        [SYSTEM_DEFAULT] = {TEGRA_IOMMU_BASE, TEGRA_IOMMU_SIZE},
        [SYSTEM_PROTECTED] = {TEGRA_IOMMU_BASE, TEGRA_IOMMU_SIZE},
+       [PPCS1_ASID] = {TEGRA_IOMMU_BASE, TEGRA_IOMMU_SIZE},
        [SYSTEM_DC] = {0x10000, (u32)~0},
        [SYSTEM_DCB] = {0x10000, (u32)~0},
        /* Non-zero base to account for gk20a driver's assumptions */
@@ -2350,6 +2351,14 @@ static int _tegra_smmu_get_asid(u64 swgids)
 {
        if (swgids & SWGID(PPCS))
                return SYSTEM_PROTECTED;
+#if defined(CONFIG_ARCH_TEGRA_12x_SOC) || \
+       defined(CONFIG_ARCH_TEGRA_11x_SOC)
+       if (swgids & SWGID(PPCS1))
+               return PPCS1_ASID;
+#else
+       if (swgids & SWGID(PPCS1))
+               return SYSTEM_PROTECTED;
+#endif
 
        if (swgids & SWGID(GPUB))
                return SYSTEM_GK20A;

diff --git a/arch/arm/mach-tegra/include/mach/tegra_smmu.h b/arch/arm/mach-tegra/include/mach/tegra_smmu.h
index 2182d64721030bad143188cdb347eaf20ce193bd..964dcb19931fee06e9c6a8757c2d39db747e4957 100644 (file)
--- a/arch/arm/mach-tegra/include/mach/tegra_smmu.h
+++ b/arch/arm/mach-tegra/include/mach/tegra_smmu.h
@@ -1,7 +1,7 @@
 /*
  * arch/arm/mach-tegra/include/mach/tegra_smmu.h
  *
- * Copyright (c) 2011-2013, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2011-2014, NVIDIA CORPORATION.  All rights reserved.
  *
  * This software is licensed under the terms of the GNU General Public
  * License version 2, as published by the Free Software Foundation, and
@@ -34,11 +34,13 @@ struct iommu_linear_map {
 /*
  * ASID[0] for the system default
  * ASID[1] for PPCS, which has SDMMC
+ * ASID[2] for PPCS1
  * ASID[3][4] open for drivers, first come, first served.
  */
 enum {
        SYSTEM_DEFAULT,
        SYSTEM_PROTECTED,
+       PPCS1_ASID,
        SYSTEM_DC,
        SYSTEM_DCB,
        SYSTEM_GK20A,