video: tegra: dc: remove use of GENERAL_UPDATE

Removing GENERAL_UPDATE from much of the mode setting code, because use
of GENERAL_UPDATE is inappropriate for registers that are not triple
buffered.

Change-Id: I9e59dadd1cc866c78217dc1dc5d0e22610caa1b0
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/382582
Reviewed-by: Automatic_Commit_Validation_User

diff --git a/drivers/video/tegra/dc/dc.c b/drivers/video/tegra/dc/dc.c
index d4852f77b347fd860a01f90d85e88f50571ba4ef..0e1a0375ce87e074a1307de7477d0fb9cc019fd8 100644 (file)
--- a/drivers/video/tegra/dc/dc.c
+++ b/drivers/video/tegra/dc/dc.c
@@ -1088,7 +1088,6 @@ void tegra_dc_get_cmu(struct tegra_dc *dc, struct tegra_dc_cmu *cmu)
 
        val &= ~CMU_ENABLE;
        tegra_dc_writel(dc, val, DC_DISP_DISP_COLOR_CONTROL);
-       tegra_dc_writel(dc, GENERAL_UPDATE, DC_CMD_STATE_CONTROL);
        tegra_dc_writel(dc, GENERAL_ACT_REQ, DC_CMD_STATE_CONTROL);
 
        /*TODO: Sync up with frame end */
@@ -1140,8 +1139,6 @@ int _tegra_dc_update_cmu(struct tegra_dc *dc, struct tegra_dc_cmu *cmu)
                if (val & CMU_ENABLE) {
                        val &= ~CMU_ENABLE;
                        tegra_dc_writel(dc, val, DC_DISP_DISP_COLOR_CONTROL);
-                       val = GENERAL_UPDATE;
-                       tegra_dc_writel(dc, val, DC_CMD_STATE_CONTROL);
                        val = GENERAL_ACT_REQ;
                        tegra_dc_writel(dc, val, DC_CMD_STATE_CONTROL);
                        /*TODO: Sync up with vsync */
@@ -1481,7 +1478,6 @@ void tegra_dc_enable_crc(struct tegra_dc *dc)
        val = CRC_ALWAYS_ENABLE | CRC_INPUT_DATA_ACTIVE_DATA |
                CRC_ENABLE_ENABLE;
        tegra_dc_writel(dc, val, DC_COM_CRC_CONTROL);
-       tegra_dc_writel(dc, GENERAL_UPDATE, DC_CMD_STATE_CONTROL);
        tegra_dc_writel(dc, GENERAL_ACT_REQ, DC_CMD_STATE_CONTROL);
        tegra_dc_put(dc);
        mutex_unlock(&dc->lock);
@@ -1498,7 +1494,6 @@ void tegra_dc_disable_crc(struct tegra_dc *dc)
        mutex_lock(&dc->lock);
        tegra_dc_get(dc);
        tegra_dc_writel(dc, 0x0, DC_COM_CRC_CONTROL);
-       tegra_dc_writel(dc, GENERAL_UPDATE, DC_CMD_STATE_CONTROL);
        tegra_dc_writel(dc, GENERAL_ACT_REQ, DC_CMD_STATE_CONTROL);
 
        tegra_dc_put(dc);
@@ -1745,15 +1740,11 @@ static void tegra_dc_underflow_handler(struct tegra_dc *dc)
                                trace_display_reset(dc);
                                tegra_dc_writel(dc, UF_LINE_FLUSH,
                                                DC_DISP_DISP_MISC_CONTROL);
-                               tegra_dc_writel(dc, GENERAL_UPDATE,
-                                               DC_CMD_STATE_CONTROL);
                                tegra_dc_writel(dc, GENERAL_ACT_REQ,
                                                DC_CMD_STATE_CONTROL);
 
                                tegra_dc_writel(dc, 0,
                                                DC_DISP_DISP_MISC_CONTROL);
-                               tegra_dc_writel(dc, GENERAL_UPDATE,
-                                               DC_CMD_STATE_CONTROL);
                                tegra_dc_writel(dc, GENERAL_ACT_REQ,
                                                DC_CMD_STATE_CONTROL);
                        }
@@ -2261,7 +2252,6 @@ static bool _tegra_dc_controller_enable(struct tegra_dc *dc)
 
        trace_display_enable(dc);
 
-       tegra_dc_writel(dc, GENERAL_UPDATE, DC_CMD_STATE_CONTROL);
        tegra_dc_writel(dc, GENERAL_ACT_REQ, DC_CMD_STATE_CONTROL);
 
        if (dc->out->postpoweron)

diff --git a/drivers/video/tegra/dc/dsi.c b/drivers/video/tegra/dc/dsi.c
index 733e24b585fe8eabfd50ce8ac3954ec8a9d1c6eb..708dfe513124298faeb36a016f388644fceec92e 100644 (file)
--- a/drivers/video/tegra/dc/dsi.c
+++ b/drivers/video/tegra/dc/dsi.c
@@ -1679,7 +1679,6 @@ static void tegra_dsi_stop_dc_stream(struct tegra_dc *dc,
 
        tegra_dc_writel(dc, DISP_CTRL_MODE_STOP, DC_CMD_DISPLAY_COMMAND);
        tegra_dc_writel(dc, 0, DC_DISP_DISP_WIN_OPTIONS);
-       tegra_dc_writel(dc, GENERAL_UPDATE, DC_CMD_STATE_CONTROL);
        tegra_dc_writel(dc, GENERAL_ACT_REQ , DC_CMD_STATE_CONTROL);
 
        tegra_dc_put(dc);
@@ -1790,7 +1789,6 @@ static void tegra_dsi_start_dc_stream(struct tegra_dc *dc,
                tegra_dc_writel(dc, DISP_CTRL_MODE_NC_DISPLAY,
                                                DC_CMD_DISPLAY_COMMAND);
 
-               tegra_dc_writel(dc, GENERAL_UPDATE, DC_CMD_STATE_CONTROL);
                tegra_dc_writel(dc, GENERAL_ACT_REQ, DC_CMD_STATE_CONTROL);
 
                if (dsi->info.te_gpio)
@@ -1799,7 +1797,6 @@ static void tegra_dsi_start_dc_stream(struct tegra_dc *dc,
                /* set continuous mode */
                tegra_dc_writel(dc, DISP_CTRL_MODE_C_DISPLAY,
                                                DC_CMD_DISPLAY_COMMAND);
-               tegra_dc_writel(dc, GENERAL_UPDATE, DC_CMD_STATE_CONTROL);
                tegra_dc_writel(dc, GENERAL_ACT_REQ, DC_CMD_STATE_CONTROL);
        }
 
@@ -1836,7 +1833,6 @@ static void tegra_dsi_set_dc_clk(struct tegra_dc *dc,
         * After 2us delay, write the target values to it. */
 #if defined(CONFIG_ARCH_TEGRA_14x_SOC) || defined(CONFIG_ARCH_11x_SOC)
        tegra_dc_writel(dc, val, DC_DISP_DISP_CLOCK_CONTROL);
-       tegra_dc_writel(dc, GENERAL_UPDATE, DC_CMD_STATE_CONTROL);
        tegra_dc_writel(dc, GENERAL_ACT_REQ, DC_CMD_STATE_CONTROL);
 
        udelay(2);

diff --git a/drivers/video/tegra/dc/mode.c b/drivers/video/tegra/dc/mode.c
index 27520287639df8e53f1b8ac619e9a9d6a4cda160..de57c9477d442a9409568d9eecd22f9005d81985 100644 (file)
--- a/drivers/video/tegra/dc/mode.c
+++ b/drivers/video/tegra/dc/mode.c
@@ -327,7 +327,6 @@ int tegra_dc_program_mode(struct tegra_dc *dc, struct tegra_dc_mode *mode)
 #if defined(CONFIG_ARCH_TEGRA_14x_SOC)
        tegra_dc_writel(dc, PIXEL_CLK_DIVIDER_PCD1 | SHIFT_CLK_DIVIDER(div + 2),
                        DC_DISP_DISP_CLOCK_CONTROL);
-       tegra_dc_writel(dc, GENERAL_UPDATE, DC_CMD_STATE_CONTROL);
        tegra_dc_writel(dc, GENERAL_ACT_REQ, DC_CMD_STATE_CONTROL);
 
        udelay(2);
@@ -347,7 +346,6 @@ int tegra_dc_program_mode(struct tegra_dc *dc, struct tegra_dc_mode *mode)
                         (mode->h_active << 16) | mode->v_active);
 #endif
 
-       tegra_dc_writel(dc, GENERAL_UPDATE, DC_CMD_STATE_CONTROL);
        tegra_dc_writel(dc, GENERAL_ACT_REQ, DC_CMD_STATE_CONTROL);
 
        if (dc->out_ops && dc->out_ops->modeset_notifier)

diff --git a/drivers/video/tegra/dc/nvsr.c b/drivers/video/tegra/dc/nvsr.c
index 725b20eb11f52297598ab5838b5cdfeb3572f820..29138b07663104935158d54f7fb37ff15d7b71a4 100644 (file)
--- a/drivers/video/tegra/dc/nvsr.c
+++ b/drivers/video/tegra/dc/nvsr.c
@@ -602,7 +602,6 @@ static int tegra_dc_nvsr_enter_idle(struct tegra_dc_nvsr_data *nvsr)
                /* set non-continuous mode */
                tegra_dc_writel(dc, DISP_CTRL_MODE_NC_DISPLAY,
                                DC_CMD_DISPLAY_COMMAND);
-               tegra_dc_writel(dc, GENERAL_UPDATE, DC_CMD_STATE_CONTROL);
                tegra_dc_writel(dc, GENERAL_ACT_REQ, DC_CMD_STATE_CONTROL);
 
                dc->out->flags |= TEGRA_DC_OUT_ONE_SHOT_MODE;

diff --git a/drivers/video/tegra/dc/rgb.c b/drivers/video/tegra/dc/rgb.c
index c5035b46dae88789abcb24e897812664ef293917..1958aa6c0915bb86633926c601da2acf8cc6fd51 100644 (file)
--- a/drivers/video/tegra/dc/rgb.c
+++ b/drivers/video/tegra/dc/rgb.c
@@ -4,7 +4,7 @@
  * Copyright (C) 2010 Google, Inc.
  * Author: Erik Gilling <konkers@android.com>
  *
- * Copyright (c) 2010-2012, NVIDIA CORPORATION, All rights reserved.
+ * Copyright (c) 2010-2014, NVIDIA CORPORATION, All rights reserved.
  *
  * This software is licensed under the terms of the GNU General Public
  * License version 2, as published by the Free Software Foundation, and
@@ -148,7 +148,6 @@ static void tegra_dc_rgb_enable(struct tegra_dc *dc)
        tegra_dc_write_table(dc, out_sel_pintable);
 
        /* Inform DC register updated */
-       tegra_dc_writel(dc, GENERAL_UPDATE, DC_CMD_STATE_CONTROL);
        tegra_dc_writel(dc, GENERAL_ACT_REQ, DC_CMD_STATE_CONTROL);
        tegra_dc_io_end(dc);
 }