ARM: tegra: loki: Enable UHS modes

Enable following modes for SDIO
 - SDR104 mode maximum clock as 204MHz
   per characterization data.
 - SDR12 and SDR25 UHS modes are enabled

Bug 1344631

Change-Id: I9829bd95c9f8307dbde13902128a0cc4e28b268b
Signed-off-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-on: http://git-master/r/301719
Reviewed-by: Automatic_Commit_Validation_User

diff --git a/arch/arm/mach-tegra/board-loki-sdhci.c b/arch/arm/mach-tegra/board-loki-sdhci.c
index b0306b20e4b606c1e9d3c1bbae179ecb2581cd5e..18bc76aa7ee96efbb5c61fa669151f6a88cdb202 100644 (file)
--- a/arch/arm/mach-tegra/board-loki-sdhci.c
+++ b/arch/arm/mach-tegra/board-loki-sdhci.c
@@ -150,10 +150,7 @@ static struct tegra_sdhci_platform_data tegra_sdhci_platform_data0 = {
        .tap_delay = 0,
        .trim_delay = 0x2,
        .ddr_clk_limit = 41000000,
-       .uhs_mask = MMC_UHS_MASK_SDR104 |
-               /* FIXME: Enable UHS mode */
-               MMC_UHS_MASK_SDR12 | MMC_UHS_MASK_SDR25 |
-               MMC_UHS_MASK_DDR50 | MMC_UHS_MASK_SDR50,
+       .uhs_mask = MMC_UHS_MASK_DDR50 | MMC_UHS_MASK_SDR50,
        .calib_3v3_offsets = 0x7676,
        .calib_1v8_offsets = 0x7676,
 };
@@ -483,6 +480,8 @@ int __init loki_sdhci_init(void)
                tegra_sdhci_platform_data3.boot_vcore_mv = boot_vcore_mv;
        }
 
+       tegra_sdhci_platform_data0.max_clk_limit = 204000000;
+
        platform_device_register(&tegra_sdhci_device3);
        platform_device_register(&tegra_sdhci_device2);
        platform_device_register(&tegra_sdhci_device0);