net: wireless: bcmdhd: fix alignment fault

[   23.704327] Unhandled fault: alignment fault (0x96000021) at 0xffffff800c05f03c
[   23.711641] Internal error: : 96000021 [#1] PREEMPT SMP
[   23.738781] Modules linked in:
[   23.741849] CPU: 2 PID: 975 Comm: wpa_supplicant Not tainted 3.10.67-tegra #15
[   23.749062] task: ffffffc08bb0c840 ti: ffffffc087990000 task.ti: ffffffc087990000
[   23.756540] PC is at dhdpcie_bus_membytes+0x68/0xb4
[   23.761414] LR is at dhdpcie_readshared+0x130/0x6c4
[   23.766285] pc : [<ffffffc0005eb1ac>] lr : [<ffffffc0005ebd14>] pstate: 20000145

Bug 1642069

Change-Id: Id74018f3aa234bb0de39752179d830afa6f4e196
Signed-off-by: David Yu <davyu@nvidia.com>
Reviewed-on: http://git-master/r/782783
(cherry picked from commit dba8f5d738fad2d4f46bdd7fed981df2f30f2004)
Reviewed-on: http://git-master/r/825148
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
Reviewed-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
Tested-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Kamal Balagopalan <kbalagopalan@nvidia.com>

diff --git a/drivers/net/wireless/bcmdhd/dhd_pcie.c b/drivers/net/wireless/bcmdhd/dhd_pcie.c
index f82c72b136e609e6cfd5275b2eb3ef7bfd04367e..b30c001c8331f4f424f2e747cacb95b92da53f8c 100644 (file)
--- a/drivers/net/wireless/bcmdhd/dhd_pcie.c
+++ b/drivers/net/wireless/bcmdhd/dhd_pcie.c
@@ -1622,14 +1622,14 @@ dhdpcie_bus_membytes(dhd_bus_t *bus, bool write, ulong address, uint8 *data, uin
        uint dsize;
        int detect_endian_flag = 0x01;
        bool little_endian;
-#ifdef CONFIG_ARCH_MSM8994
+#if defined (CONFIG_ARCH_MSM8994) || defined (CONFIG_ARCH_TEGRA)
        bool is_64bit_unaligned;
 #endif
 
        /* Detect endianness. */
        little_endian = *(char *)&detect_endian_flag;
 
-#ifdef CONFIG_ARCH_MSM8994
+#if defined (CONFIG_ARCH_MSM8994) || defined (CONFIG_ARCH_TEGRA)
        /* Check 64bit aligned or not. */
        is_64bit_unaligned = (address & 0x7);
 #endif
@@ -1645,7 +1645,7 @@ dhdpcie_bus_membytes(dhd_bus_t *bus, bool write, ulong address, uint8 *data, uin
        if (write) {
                while (size) {
                        if (size >= sizeof(uint64) && little_endian) {
-#ifdef CONFIG_ARCH_MSM8994
+#if defined (CONFIG_ARCH_MSM8994) || defined (CONFIG_ARCH_TEGRA)
                                if (is_64bit_unaligned) {
                                        DHD_INFO(("%s: write unaligned %lx\n",
                                            __FUNCTION__, address));
@@ -1673,7 +1673,7 @@ dhdpcie_bus_membytes(dhd_bus_t *bus, bool write, ulong address, uint8 *data, uin
        } else {
                while (size) {
                        if (size >= sizeof(uint64) && little_endian) {
-#ifdef CONFIG_ARCH_MSM8994
+#if defined (CONFIG_ARCH_MSM8994) || defined (CONFIG_ARCH_TEGRA)
                                if (is_64bit_unaligned) {
                                        DHD_INFO(("%s: read unaligned %lx\n",
                                            __FUNCTION__, address));