]> rtime.felk.cvut.cz Git - sojka/nv-tegra/linux-3.10.git/commitdiff
video: tegra: gk20a: do not set error notifier during debugging
authorKirill Artamonov <kartamonov@nvidia.com>
Thu, 27 Feb 2014 12:02:06 +0000 (14:02 +0200)
committerMatthew Pedro <mapedro@nvidia.com>
Wed, 19 Mar 2014 02:21:25 +0000 (19:21 -0700)
Do not set error notifier on exceptions handled by attached
SM debugger.

bug 1468586
bug 1470992

Change-Id: I9c35b098ade022df7c2745a4f974ef0d1a7fad58
Signed-off-by: Kirill Artamonov <kartamonov@nvidia.com>
Signed-off-by: Matt Pedro <mapedro@nvidia.com>
Reviewed-on: http://git-master/r/377866
(cherry picked from commit e30f88aa7fbb56a703a50a445ae6761bcb0d5e99)
Reviewed-on: http://git-master/r/383228
GVS: Gerrit_Virtual_Submit

drivers/video/tegra/host/gk20a/fifo_gk20a.c
drivers/video/tegra/host/gk20a/gr_gk20a.c

index f7123da91a44fc0dcfdfef58099b9a7ee1b23e07..0367b5d7880a9f600cd707ccd6c3ce44f5e2167c 100644 (file)
@@ -1028,7 +1028,6 @@ static bool gk20a_fifo_handle_mmu_fault(struct gk20a *g)
                }
 
                if (ch) {
-                       verbose = gk20a_fifo_set_ctx_mmu_error(g, ch);
                        if (ch->in_use) {
                                /* disable the channel from hw and increment
                                 * syncpoints */
@@ -1045,7 +1044,9 @@ static bool gk20a_fifo_handle_mmu_fault(struct gk20a *g)
 
                                /* handled during channel free */
                                g->fifo.deferred_reset_pending = true;
-                       }
+                       } else
+                               verbose = gk20a_fifo_set_ctx_mmu_error(g, ch);
+
                } else if (f.inst_ptr ==
                                g->mm.bar1.inst_block.cpu_pa) {
                        nvhost_err(dev_from_gk20a(g), "mmu fault from bar1");
index 6b2e9283da1aab8bc48551729e2d0e1f3b8f23bb..67ce9b29a75fd0e0f3387ed723d42f9182cad2b6 100644 (file)
@@ -5388,9 +5388,6 @@ int gk20a_gr_isr(struct gk20a *g)
                struct fifo_gk20a *f = &g->fifo;
                struct channel_gk20a *ch = &f->channel[isr_data.chid];
 
-               gk20a_set_error_notifier(ch->hwctx,
-                                       NVHOST_CHANNEL_GR_ERROR_SW_NOTIFY);
-
                nvhost_dbg(dbg_intr | dbg_gpu_dbg, "exception %08x\n", exception);
 
                if (exception & gr_exception_fe_m()) {
@@ -5421,6 +5418,9 @@ int gk20a_gr_isr(struct gk20a *g)
                                gk20a_gr_clear_sm_hww(g, global_esr);
                        }
 
+                       if (need_reset)
+                               gk20a_set_error_notifier(ch,
+                                       NVHOST_CHANNEL_GR_ERROR_SW_NOTIFY);
                }
 
                gk20a_writel(g, gr_intr_r(), gr_intr_exception_reset_f());