ctrl_gk20a.o \
fifo_gk20a.o \
channel_gk20a.o \
- cdma_gk20a.o \
debug_gk20a.o \
dbg_gpu_gk20a.o \
regops_gk20a.o \
+++ /dev/null
-/*
- * drivers/video/tegra/host/gk20a/cdma_gk20a.c
- *
- * Tegra Graphics Host Command DMA
- *
- * Copyright (c) 2011, NVIDIA CORPORATION. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
- */
-
-#include "../nvhost_cdma.h"
-#include "../dev.h"
-
-#include "cdma_gk20a.h"
-
-/*
- * push_buffer
- *
- * The push buffer is a circular array of words to be fetched by command DMA.
- * Note that it works slightly differently to the sync queue; fence == cur
- * means that the push buffer is full, not empty.
- */
-
-
-/**
- * Reset to empty push buffer
- */
-void gk20a_push_buffer_reset(struct push_buffer *pb)
-{
-}
-
-/**
- * Init push buffer resources
- */
-int gk20a_push_buffer_init(struct push_buffer *pb)
-{
- return 0;
-}
-
-/**
- * Clean up push buffer resources
- */
-void gk20a_push_buffer_destroy(struct push_buffer *pb)
-{
-}
-
-/**
- * Push two words to the push buffer
- * Caller must ensure push buffer is not full
- */
-void gk20a_push_buffer_push_to(struct push_buffer *pb,
- struct mem_mgr *client,
- struct mem_handle *handle, u32 op1, u32 op2)
-{
-}
-
-/**
- * Pop a number of two word slots from the push buffer
- * Caller must ensure push buffer is not empty
- */
-void gk20a_push_buffer_pop_from(struct push_buffer *pb, unsigned int slots)
-{
-}
-
-/**
- * Return the number of two word slots free in the push buffer
- */
-u32 gk20a_push_buffer_space(struct push_buffer *pb)
-{
- return 0;
-}
-
-u32 gk20a_push_buffer_putptr(struct push_buffer *pb)
-{
- return 0;
-}
-
-
-/**
- * Start channel DMA
- */
-void gk20a_cdma_start(struct nvhost_cdma *cdma)
-{
-}
-
-/**
- * Kick channel DMA into action by writing its PUT offset (if it has changed)
- */
-void gk20a_cdma_kick(struct nvhost_cdma *cdma)
-{
-}
-
-void gk20a_cdma_stop(struct nvhost_cdma *cdma)
-{
-}
+++ /dev/null
-/*
- * drivers/video/tegra/host/gk20a/cdma_gk20a.h
- *
- * Tegra Graphics Host Command DMA
- *
- * Copyright (c) 2011-2013, NVIDIA CORPORATION. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
- */
-#ifndef __CDMA_GK20A_H__
-#define __CDMA_GK20A_H__
-
-#include "mm_gk20a.h"
-
-struct priv_cmd_entry {
- u32 *ptr;
- u64 gva;
- u16 get; /* start of entry in queue */
- u16 size; /* in words */
- u32 gp_get; /* gp_get when submitting last priv cmd */
- u32 gp_put; /* gp_put when submitting last priv cmd */
- u32 gp_wrap; /* wrap when submitting last priv cmd */
- bool pre_alloc; /* prealloc entry, free to free list */
- struct list_head list; /* node for lists */
-};
-
-struct priv_cmd_queue {
- struct priv_cmd_queue_mem_desc mem;
- u64 base_gpuva; /* gpu_va base */
- u16 size; /* num of entries in words */
- u16 put; /* put for priv cmd queue */
- u16 get; /* get for priv cmd queue */
- struct list_head free; /* list of pre-allocated free entries */
- struct list_head head; /* list of used entries */
-};
-
-void gk20a_push_buffer_reset(struct push_buffer *pb);
-int gk20a_push_buffer_init(struct push_buffer *pb);
-void gk20a_push_buffer_destroy(struct push_buffer *pb);
-void gk20a_push_buffer_push_to(struct push_buffer *pb,
- struct mem_mgr *memmgr,
- struct mem_handle *handle, u32 op1, u32 op2);
-void gk20a_push_buffer_pop_from(struct push_buffer *pb, unsigned int slots);
-u32 gk20a_push_buffer_space(struct push_buffer *pb);
-u32 gk20a_push_buffer_putptr(struct push_buffer *pb);
-void gk20a_cdma_start(struct nvhost_cdma *cdma);
-void gk20a_cdma_kick(struct nvhost_cdma *cdma);
-void gk20a_cdma_stop(struct nvhost_cdma *cdma);
-
-#endif
return __gk20a_channel_open(g, filp);
}
-#if 0
-/* move to debug_gk20a.c ... */
-static void dump_gpfifo(struct channel_gk20a *c)
-{
- void *inst_ptr;
- u32 chid = c->hw_chid;
-
- nvhost_dbg_fn("");
-
- inst_ptr = nvhost_memmgr_mmap(c->inst_block.mem.ref);
- if (!inst_ptr)
- return;
-
- nvhost_dbg_info("ramfc for channel %d:\n"
- "ramfc: gp_base 0x%08x, gp_base_hi 0x%08x, "
- "gp_fetch 0x%08x, gp_get 0x%08x, gp_put 0x%08x, "
- "pb_fetch 0x%08x, pb_fetch_hi 0x%08x, "
- "pb_get 0x%08x, pb_get_hi 0x%08x, "
- "pb_put 0x%08x, pb_put_hi 0x%08x\n"
- "userd: gp_put 0x%08x, gp_get 0x%08x, "
- "get 0x%08x, get_hi 0x%08x, "
- "put 0x%08x, put_hi 0x%08x\n"
- "pbdma: status 0x%08x, channel 0x%08x, userd 0x%08x, "
- "gp_base 0x%08x, gp_base_hi 0x%08x, "
- "gp_fetch 0x%08x, gp_get 0x%08x, gp_put 0x%08x, "
- "pb_fetch 0x%08x, pb_fetch_hi 0x%08x, "
- "get 0x%08x, get_hi 0x%08x, put 0x%08x, put_hi 0x%08x\n"
- "channel: ccsr_channel 0x%08x",
- chid,
- mem_rd32(inst_ptr, ram_fc_gp_base_w()),
- mem_rd32(inst_ptr, ram_fc_gp_base_hi_w()),
- mem_rd32(inst_ptr, ram_fc_gp_fetch_w()),
- mem_rd32(inst_ptr, ram_fc_gp_get_w()),
- mem_rd32(inst_ptr, ram_fc_gp_put_w()),
- mem_rd32(inst_ptr, ram_fc_pb_fetch_w()),
- mem_rd32(inst_ptr, ram_fc_pb_fetch_hi_w()),
- mem_rd32(inst_ptr, ram_fc_pb_get_w()),
- mem_rd32(inst_ptr, ram_fc_pb_get_hi_w()),
- mem_rd32(inst_ptr, ram_fc_pb_put_w()),
- mem_rd32(inst_ptr, ram_fc_pb_put_hi_w()),
- mem_rd32(c->userd_cpu_va, ram_userd_gp_put_w()),
- mem_rd32(c->userd_cpu_va, ram_userd_gp_get_w()),
- mem_rd32(c->userd_cpu_va, ram_userd_get_w()),
- mem_rd32(c->userd_cpu_va, ram_userd_get_hi_w()),
- mem_rd32(c->userd_cpu_va, ram_userd_put_w()),
- mem_rd32(c->userd_cpu_va, ram_userd_put_hi_w()),
- gk20a_readl(c->g, pbdma_status_r(0)),
- gk20a_readl(c->g, pbdma_channel_r(0)),
- gk20a_readl(c->g, pbdma_userd_r(0)),
- gk20a_readl(c->g, pbdma_gp_base_r(0)),
- gk20a_readl(c->g, pbdma_gp_base_hi_r(0)),
- gk20a_readl(c->g, pbdma_gp_fetch_r(0)),
- gk20a_readl(c->g, pbdma_gp_get_r(0)),
- gk20a_readl(c->g, pbdma_gp_put_r(0)),
- gk20a_readl(c->g, pbdma_pb_fetch_r(0)),
- gk20a_readl(c->g, pbdma_pb_fetch_hi_r(0)),
- gk20a_readl(c->g, pbdma_get_r(0)),
- gk20a_readl(c->g, pbdma_get_hi_r(0)),
- gk20a_readl(c->g, pbdma_put_r(0)),
- gk20a_readl(c->g, pbdma_put_hi_r(0)),
- gk20a_readl(c->g, ccsr_channel_r(chid)));
-
- nvhost_memmgr_munmap(c->inst_block.mem.ref, inst_ptr);
- gk20a_mm_l2_invalidate(c->g);
-}
-#endif
-
/* allocate private cmd buffer.
used for inserting commands before/after user submitted buffers. */
static int channel_gk20a_alloc_priv_cmdbuf(struct channel_gk20a *c)
#include "nvhost_channel.h"
#include "channel_gk20a.h"
-#include "cdma_gk20a.h"
#include "mm_gk20a.h"
#include "gr_gk20a.h"
mutex_unlock(&mm->tlb_lock);
}
-#if 0 /* VM DEBUG */
-
-/* print pdes/ptes for a gpu virtual address range under a vm */
-void gk20a_mm_dump_vm(struct vm_gk20a *vm,
- u64 va_begin, u64 va_end, char *label)
-{
- struct mem_mgr *client = mem_mgr_from_vm(vm);
- struct mm_gk20a *mm = vm->mm;
- struct page_table_gk20a *pte_s;
- u64 pde_va, pte_va;
- u32 pde_i, pde_lo, pde_hi;
- u32 pte_i, pte_lo, pte_hi;
- u32 pte_space_page_cur, pte_space_offset_cur;
- u32 pte_space_page_offset;
- u32 num_ptes, page_size;
- void *pde, *pte;
- phys_addr_t pte_addr;
- int err;
-
- pde_range_from_vaddr_range(vm, va_begin, va_end,
- &pde_lo, &pde_hi);
-
- nvhost_err(dev_from_vm(vm),
- "%s page table entries for gpu va 0x%016llx -> 0x%016llx\n",
- label, va_begin, va_end);
-
- for (pde_i = pde_lo; pde_i <= pde_hi; pde_i++) {
- pde = pde_from_index(vm, pde_i);
- pde_va = pde_i * mm->pde_stride;
- nvhost_err(dev_from_vm(vm),
- "\t[0x%016llx -> 0x%016llx] pde @ 0x%08x: 0x%08x, 0x%08x\n",
- pde_va, pde_va + mm->pde_stride - 1,
- gk20a_mm_iova_addr(vm->pdes.sgt->sgl)
- + pde_i * gmmu_pde__size_v(),
- mem_rd32(pde, 0), mem_rd32(pde, 1));
-
- pte_s = vm->pdes.ptes[pte_s->pgsz_idx] + pde_i;
-
- num_ptes = mm->page_table_sizing[pte_s->pgsz_idx].num_ptes;
- page_size = mm->pde_stride / num_ptes;
- pte_lo = 0;
- pte_hi = num_ptes - 1;
-
- pte_space_page_offset_from_index(pte_lo,
- &pte_space_page_cur,
- &pte_space_offset_cur);
-
- err = map_gmmu_pages(pte_s->ref, pte_s->sgt, &pte);
- pte_s->sgt = nvhost_memmgr_sg_table(client, pte_s->ref);
- if (WARN_ON(IS_ERR(pte_s->sgt)))
- return;
- pte_addr = gk20a_mm_iova_addr(pte_s->sgt->sgl);
-
- for (pte_i = pte_lo; pte_i <= pte_hi; pte_i++) {
-
- pte_va = pde_va + pte_i * page_size;
-
- if (pte_va < va_begin)
- continue;
- if (pte_va > va_end)
- break;
-
- pte_space_page_offset = pte_i;
-
- nvhost_err(dev_from_vm(vm),
- "\t\t[0x%016llx -> 0x%016llx] pte @ 0x%08x : 0x%08x, 0x%08x\n",
- pte_va, pte_va + page_size - 1,
- pte_addr + pte_i * gmmu_pte__size_v(),
- mem_rd32(pte + pte_space_page_offset * 8, 0),
- mem_rd32(pte + pte_space_page_offset * 8, 1));
- }
-
- unmap_gmmu_pages(pte_s->ref, pte_s->sgt, pte);
- }
-}
-#endif /* VM DEBUG */
-
int gk20a_mm_suspend(struct gk20a *g)
{
nvhost_dbg_fn("");
struct page_table_gk20a *ptes[gmmu_nr_page_sizes];
};
+struct priv_cmd_queue {
+ struct priv_cmd_queue_mem_desc mem;
+ u64 base_gpuva; /* gpu_va base */
+ u16 size; /* num of entries in words */
+ u16 put; /* put for priv cmd queue */
+ u16 get; /* get for priv cmd queue */
+ struct list_head free; /* list of pre-allocated free entries */
+ struct list_head head; /* list of used entries */
+};
+
+struct priv_cmd_entry {
+ u32 *ptr;
+ u64 gva;
+ u16 get; /* start of entry in queue */
+ u16 size; /* in words */
+ u32 gp_get; /* gp_get when submitting last priv cmd */
+ u32 gp_put; /* gp_put when submitting last priv cmd */
+ u32 gp_wrap; /* wrap when submitting last priv cmd */
+ bool pre_alloc; /* prealloc entry, free to free list */
+ struct list_head list; /* node for lists */
+};
+
struct mapped_buffer_node {
struct vm_gk20a *vm;
struct rb_node node;
projects / sojka / nv-tegra / linux-3.10.git / commitdiff