xhci: tegra: Clear SMI INTR status register

Clear SMI INTR status bits in smi irq handler.

Bug 1481790

Change-Id: I7b5e37ece1996ab2e2d97d561cff05fc6652b2d5
Signed-off-by: Joy Wang <joyw@nvidia.com>
Reviewed-on: http://git-master/r/385512
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-tegra.c
index 0bb391b8001e09ccecf24d0e85c26f847abe0512..3834882320b3763489d431ec5681b7eaae46e570 100644 (file)
--- a/drivers/usb/host/xhci-tegra.c
+++ b/drivers/usb/host/xhci-tegra.c
@@ -3385,12 +3385,13 @@ static irqreturn_t tegra_xhci_smi_irq(int irq, void *ptrdev)
         */
 
        temp = readl(tegra->fpci_base + XUSB_CFG_ARU_SMI_INTR);
-
-       /* write 1 to clear SMI INTR en bit ( bit 3 ) */
-       temp = MBOX_SMI_INTR_EN;
        writel(temp, tegra->fpci_base + XUSB_CFG_ARU_SMI_INTR);
 
-       schedule_work(&tegra->mbox_work);
+       xhci_dbg(tegra->xhci, "SMI INTR status 0x%x\n", temp);
+       if (temp & SMI_INTR_STATUS_FW_REINIT)
+               xhci_err(tegra->xhci, "Firmware reinit.\n");
+       if (temp & SMI_INTR_STATUS_MBOX)
+               schedule_work(&tegra->mbox_work);
 
        spin_unlock(&tegra->lock);
        return IRQ_HANDLED;

diff --git a/drivers/usb/host/xhci-tegra.h b/drivers/usb/host/xhci-tegra.h
index 5d57130cd2023e9bf8059cfeb84a5567eed291fa..91a85e224f1be14cb05704e2da1d7daa75ab141f 100644 (file)
--- a/drivers/usb/host/xhci-tegra.h
+++ b/drivers/usb/host/xhci-tegra.h
@@ -1,7 +1,7 @@
 /*
  * xhci-tegra.h - Nvidia xHCI host controller related data
  *
- * Copyright (c) 2013, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2013-2014, NVIDIA CORPORATION.  All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -229,7 +229,8 @@
 #define MBOX_OWNER_SW                                          2
 #define MBOX_OWNER_ID_MASK                                     0xFF
 
-#define MBOX_SMI_INTR_EN                                       (1 << 3)
+#define SMI_INTR_STATUS_MBOX                           (1 << 3)
+#define SMI_INTR_STATUS_FW_REINIT                      (1 << 1)
 
 /* PMC Register */
 #define PMC_SCRATCH34                                          0x124