arm:tegra: updated fuse support for Jetson TK1

Non negative value of cp_rev should be treated as
a newer properly fused chip

Bug 1610806

Change-Id: I7da1bec91996bbd5a522e2f043147b48272e0500
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/721053
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

diff --git a/arch/arm/mach-tegra/board-norrin-power.c b/arch/arm/mach-tegra/board-norrin-power.c
index 3b734b566db5de90d24a79ea57d9bdc3b53d5fae..3599dc2ce179d5276bd1120fe5b8953756a53ecf 100644 (file)
--- a/arch/arm/mach-tegra/board-norrin-power.c
+++ b/arch/arm/mach-tegra/board-norrin-power.c
@@ -338,13 +338,15 @@ int __init norrin_soctherm_init(void)
        cp_rev = tegra_fuse_calib_base_get_cp(NULL, NULL);
        ft_rev = tegra_fuse_calib_base_get_ft(NULL, NULL);
 
-       if (cp_rev) {
+       pr_info("FUSE: cp_rev %d ft_rev %d\n", cp_rev, ft_rev);
+       if (cp_rev && board_info.board_id != BOARD_PM375) {
                /* ATE rev is Old or Mid - use PLLx sensor only */
                norrin_soctherm_data.therm[THERM_CPU] =
                        norrin_v1_soctherm_data.therm[THERM_CPU];
                norrin_soctherm_data.therm[THERM_PLL] =
                        norrin_v1_soctherm_data.therm[THERM_PLL];
-               therm_cpu = THERM_PLL; /* override CPU with PLL zone */
+               therm_cpu = THERM_PLL;
+               /* override CPU with PLL zone */
        }
 
        /* do this only for supported CP,FT fuses */