ARM: Tegra: Pluto: adjust SMPS123 and SMPS45 tstep

Changing SMPS123 & SMPS45 tstep slew rate from 5mV/us to 2.5mV/us

Bug 1277313

Change-Id: I50390f6214d8e8d71148de5f36a6f22b9fec2cc2
Signed-off-by: Ming Wong <miwong@nvidia.com>
Reviewed-on: http://git-master/r/229036
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

diff --git a/arch/arm/mach-tegra/board-pluto-power.c b/arch/arm/mach-tegra/board-pluto-power.c
index bc978a9c94c4e593dcfa5bc47d8d827f329c28ea..42062e7a1d27551258f348e018b36a59f6f70c2d 100644 (file)
--- a/arch/arm/mach-tegra/board-pluto-power.c
+++ b/arch/arm/mach-tegra/board-pluto-power.c
@@ -301,9 +301,9 @@ static struct regulator_init_data *pluto_reg_data[PALMAS_NUM_REGS] = {
        }
 
 PALMAS_REG_INIT(smps12, 0, 0, 0, 0, 0);
-PALMAS_REG_INIT(smps123, 0, PALMAS_EXT_CONTROL_ENABLE1, 0, 0, 0);
+PALMAS_REG_INIT(smps123, 0, PALMAS_EXT_CONTROL_ENABLE1, 0, 3, 0);
 PALMAS_REG_INIT(smps3, 0, 0, 0, 0, 0);
-PALMAS_REG_INIT(smps45, 0, PALMAS_EXT_CONTROL_NSLEEP, 0, 0, 0);
+PALMAS_REG_INIT(smps45, 0, PALMAS_EXT_CONTROL_NSLEEP, 0, 3, 0);
 PALMAS_REG_INIT(smps457, 0, 0, 0, 0, 0);
 PALMAS_REG_INIT(smps6, 0, 0, 0, 0, 0);
 PALMAS_REG_INIT(smps7, 0, 0, 0, 0, 0);
@@ -546,7 +546,7 @@ static struct platform_device *pfixed_reg_devs[] = {
 #ifdef CONFIG_ARCH_TEGRA_HAS_CL_DVFS
 /* board parameters for cpu dfll */
 static struct tegra_cl_dvfs_cfg_param pluto_cl_dvfs_param = {
-       .sample_rate = 12500,
+       .sample_rate = 11500,
 
        .force_mode = TEGRA_CL_DVFS_FORCE_FIXED,
        .cf = 10,