]> rtime.felk.cvut.cz Git - sojka/nv-tegra/linux-3.10.git/commitdiff
arm: tegra: hawkeye: add AUO 19x12 display
authorDaniel Solomon <daniels@nvidia.com>
Sun, 8 Feb 2015 03:42:07 +0000 (19:42 -0800)
committerMitch Luban <mluban@nvidia.com>
Fri, 20 Feb 2015 18:56:33 +0000 (10:56 -0800)
Bug 1608900

Change-Id: I602daf333c9335b72bffd60eb6e50c0e6e3c5a2d
Signed-off-by: Daniel Solomon <daniels@nvidia.com>
Reviewed-on: http://git-master/r/682209
(cherry picked from commit 97c8a1f45b886bfb7421746b308dc8ed460a4957)
Reviewed-on: http://git-master/r/708113
Reviewed-by: Mitch Luban <mluban@nvidia.com>
arch/arm/mach-tegra/panel-a-1200-1920-8-0.c
arch/arm64/boot/dts/tegra210-hawkeye-p2290-common.dtsi
arch/arm64/boot/dts/tegra210-platforms/tegra210-hawkeye-power-tree-p2290-1100-a00.dtsi

index 99bc5063e2911a50e5c7216f38f758ea14671bc4..6c36425396d164d3d5b3f539e08cac4a7d2c6dfe 100644 (file)
@@ -61,10 +61,9 @@ static int dsi_a_1200_1920_8_0_regulator_get(struct device *dev)
 
        vdd_lcd_bl_en = regulator_get(dev, "vdd_lcd_bl_en");
        if (IS_ERR_OR_NULL(vdd_lcd_bl_en)) {
-               pr_err("vdd_lcd_bl_en regulator get failed\n");
                err = PTR_ERR(vdd_lcd_bl_en);
+               pr_warn("warning: vdd_lcd_bl_en regulator get failed, err = %d\n", err);
                vdd_lcd_bl_en = NULL;
-               goto fail;
        }
 
        reg_requested = true;
index f9c96d2cb77a0917645c24f8c1a2615ab74ecb3c..3665c3d101e0407e207aed4786dc9d8c5919d8d2 100644 (file)
                status = "okay";
                nvidia,edp_limit = <12000>;
        };
+
        thermal-zones {
                CPU-therm {
                        thermal-zone-params {
                        status = "okay";
                };
        };
+
+       host1x {
+               /* tegradc.0 */
+               dc@54200000 {
+                       status = "okay";
+                       /* TODO: Needed? */
+                       /* dvdd_lcd-supply = <&vdd_disp_3v3>; */
+                       nvidia,dc-flags = <TEGRA_DC_FLAG_ENABLED>;
+                       nvidia,emc-clk-rate = <204000000>;
+                       nvidia,cmu-enable = <1>;
+                       nvidia,fb-bpp = <32>; /* bits per pixel */
+                       nvidia,fb-flags = <TEGRA_FB_FLIP_ON_PROBE>;
+               };
+               /* tegradc.1 */
+               dc@54240000 {
+                       status = "okay";
+                       nvidia,dc-flags = <TEGRA_DC_FLAG_ENABLED>;
+                       nvidia,emc-clk-rate = <300000000>;
+                       nvidia,fb-bpp = <32>; /* bits per pixel */
+                       nvidia,fb-flags = <TEGRA_FB_FLIP_ON_PROBE>;
+               };
+               dsi {
+                       nvidia,dsi-controller-vs = <DSI_VS_1>;
+                       status = "okay";
+                       panel-a-wuxga-8-0 {
+                               nvidia,dsi-dpd-pads = <DSIC_DPD_EN DSID_DPD_EN>;
+                               nvidia,panel-rst-gpio = <&gpio TEGRA_GPIO(V, 2) 0>; /* PV2 */
+                               nvidia,panel-bl-pwm-gpio = <&gpio TEGRA_GPIO(V, 0) 0>; /* PV0 */
+                               /* TODO: Needed? */
+                               nvidia,panel-en-gpio = <&gpio TEGRA_GPIO(V, 1) 0>; /* PV1 */
+                       };
+               };
+       };
 };
index 326116ad88d130a3f7b83f1875774e1d98ddd2b0..27246e0d0aa8f66906f6c49aff8b3419a19856f5 100644 (file)
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2014, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2014-2015, NVIDIA CORPORATION.  All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
                vddio_sdmmc-supply = <&max77620_sd3>; /* SDMMC1 for 2nd Wifi on hawkeye */
                vddio_sd_slot-supply = <&vdd_3v3>;
        };
+
+       host1x {
+               /* tegradc.0 */
+               dc@54200000 {
+                       avdd_dsi_csi-supply = <&mipi_1v2>;
+                       avdd_lcd-supply = <&vdd_lcd_3v0>;
+                       dvdd_lcd-supply = <&max77620_sd3>;
+               };
+
+               /* tegradc.1 */
+               dc@54240000 {
+                       avdd_hdmi-supply = <&max77620_ldo8>;
+                       avdd_hdmi_pll-supply = <&max77620_sd3>;
+                       vdd_hdmi_5v0-supply = <&vdd_hdmi>;
+               };
+
+               vi {
+                       avdd_dsi_csi-supply = <&mipi_1v2>;
+               };
+
+               vii2c {
+                       avdd_dsi_csi-supply = <&mipi_1v2>;
+               };
+       };
 };