vdd_lcd_bl_en = regulator_get(dev, "vdd_lcd_bl_en");
if (IS_ERR_OR_NULL(vdd_lcd_bl_en)) {
- pr_err("vdd_lcd_bl_en regulator get failed\n");
err = PTR_ERR(vdd_lcd_bl_en);
+ pr_warn("warning: vdd_lcd_bl_en regulator get failed, err = %d\n", err);
vdd_lcd_bl_en = NULL;
- goto fail;
}
reg_requested = true;
status = "okay";
nvidia,edp_limit = <12000>;
};
+
thermal-zones {
CPU-therm {
thermal-zone-params {
status = "okay";
};
};
+
+ host1x {
+ /* tegradc.0 */
+ dc@54200000 {
+ status = "okay";
+ /* TODO: Needed? */
+ /* dvdd_lcd-supply = <&vdd_disp_3v3>; */
+ nvidia,dc-flags = <TEGRA_DC_FLAG_ENABLED>;
+ nvidia,emc-clk-rate = <204000000>;
+ nvidia,cmu-enable = <1>;
+ nvidia,fb-bpp = <32>; /* bits per pixel */
+ nvidia,fb-flags = <TEGRA_FB_FLIP_ON_PROBE>;
+ };
+ /* tegradc.1 */
+ dc@54240000 {
+ status = "okay";
+ nvidia,dc-flags = <TEGRA_DC_FLAG_ENABLED>;
+ nvidia,emc-clk-rate = <300000000>;
+ nvidia,fb-bpp = <32>; /* bits per pixel */
+ nvidia,fb-flags = <TEGRA_FB_FLIP_ON_PROBE>;
+ };
+ dsi {
+ nvidia,dsi-controller-vs = <DSI_VS_1>;
+ status = "okay";
+ panel-a-wuxga-8-0 {
+ nvidia,dsi-dpd-pads = <DSIC_DPD_EN DSID_DPD_EN>;
+ nvidia,panel-rst-gpio = <&gpio TEGRA_GPIO(V, 2) 0>; /* PV2 */
+ nvidia,panel-bl-pwm-gpio = <&gpio TEGRA_GPIO(V, 0) 0>; /* PV0 */
+ /* TODO: Needed? */
+ nvidia,panel-en-gpio = <&gpio TEGRA_GPIO(V, 1) 0>; /* PV1 */
+ };
+ };
+ };
};
/*
- * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
+ * Copyright (c) 2014-2015, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
vddio_sdmmc-supply = <&max77620_sd3>; /* SDMMC1 for 2nd Wifi on hawkeye */
vddio_sd_slot-supply = <&vdd_3v3>;
};
+
+ host1x {
+ /* tegradc.0 */
+ dc@54200000 {
+ avdd_dsi_csi-supply = <&mipi_1v2>;
+ avdd_lcd-supply = <&vdd_lcd_3v0>;
+ dvdd_lcd-supply = <&max77620_sd3>;
+ };
+
+ /* tegradc.1 */
+ dc@54240000 {
+ avdd_hdmi-supply = <&max77620_ldo8>;
+ avdd_hdmi_pll-supply = <&max77620_sd3>;
+ vdd_hdmi_5v0-supply = <&vdd_hdmi>;
+ };
+
+ vi {
+ avdd_dsi_csi-supply = <&mipi_1v2>;
+ };
+
+ vii2c {
+ avdd_dsi_csi-supply = <&mipi_1v2>;
+ };
+ };
};