video: tegra: nvmap: treat writecombine requests as dmacoherent

NvMap always allocates DRAM or IRAM memory. It never allocates real
Device memory. From Arm v8 onwards writecombine memory is real
writecombine, which is of less performace for DRAM accesses and
unnecessary for DRAM.
Treat writecombine requests as dmacoherent, which is normal memory
non-cacheable.

Change-Id: I5c19a5f0f033eec3680bf6b9db1cbbfb02090f3d
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/379702
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sri Krishna Chowdary <schowdary@nvidia.com>

diff --git a/drivers/video/tegra/nvmap/nvmap_priv.h b/drivers/video/tegra/nvmap/nvmap_priv.h
index ece1b3f72c3b78cc4950521a473691b780793687..c493884d12abb1aba316a1daea7c53f21db0003e 100644 (file)
--- a/drivers/video/tegra/nvmap/nvmap_priv.h
+++ b/drivers/video/tegra/nvmap/nvmap_priv.h
@@ -288,7 +288,7 @@ static inline pgprot_t nvmap_pgprot(struct nvmap_handle *h, pgprot_t prot)
        if (h->flags == NVMAP_HANDLE_UNCACHEABLE)
                return pgprot_noncached(prot);
        else if (h->flags == NVMAP_HANDLE_WRITE_COMBINE)
-               return pgprot_writecombine(prot);
+               return pgprot_dmacoherent(prot);
        return prot;
 }