arm64: boot: dts: Update E2220 prod settings

These are the final HDMI prod settings for E2220 from HW.

Bug 200032740

Change-Id: Ic747f5ee6b6379a872a7ce1ad4aace9d9d835f22
Signed-off-by: Aly Hirani <ahirani@nvidia.com>
Reviewed-on: http://git-master/r/729160
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mitch Luban <mluban@nvidia.com>

diff --git a/arch/arm64/boot/dts/tegra210-platforms/tegra210-prods.dtsi b/arch/arm64/boot/dts/tegra210-platforms/tegra210-prods.dtsi
index 0168f2c28e774471b6e296e1db2064d4d4b471e2..024551975c37cf2e385e2e2bc18033348bd85c51 100644 (file)
--- a/arch/arm64/boot/dts/tegra210-platforms/tegra210-prods.dtsi
+++ b/arch/arm64/boot/dts/tegra210-platforms/tegra210-prods.dtsi
@@ -25,15 +25,15 @@
                                        0x000003a0 0xfffffffe 0x00000001        // SOR_NV_PDISP_INPUT_CONTROL   00:00=HDMI_SRC_SELECT   0x1
                                        0x0000005c 0xf0fff8ff 0x01000000        // SOR_NV_PDISP_SOR_PLL0_0      11:08=VCOCAP            0x0
                                                                                //                              27:24=ICHPMP            0x1
-                                       0x00000060 0xff0fe0ff 0x00300f80        // SOR_NV_PDISP_SOR_PLL1_0      08:08=TMDS_TERM         0x1
-                                                                               //                              12:09=TMDS_TERMADJ      0xf
+                                       0x00000060 0xff0fe0ff 0x00301380        // SOR_NV_PDISP_SOR_PLL1_0      08:08=TMDS_TERM         0x1
+                                                                               //                              12:09=TMDS_TERMADJ      0x9
                                                                                //                              23:20=LOADADJ           0x3
-                                       0x00000068 0xf0ffffff 0x09000000        // SOR_NV_PSIDP_SOR_PLL3_0      27:24=BG_VREF_LEVEL     0x9
-                                       0x00000138 0x00000000 0x373f3f3f        // SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0_0
-                                                                               //                              31:24=LANE3_DP_LANE3    0x37
-                                                                               //                              23:16=LANE2_DP_LANE0    0x3f
-                                                                               //                              15:08=LANE1_DP_LANE1    0x3f
-                                                                               //                              07:00=LANE0_DP_LANE2    0x3f
+                                       0x00000068 0xf0ffffff 0x08000000        // SOR_NV_PSIDP_SOR_PLL3_0      27:24=BG_VREF_LEVEL     0x8
+                                       0x00000138 0x00000000 0x333A3A3A        // SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0_0
+                                                                               //                              31:24=LANE3_DP_LANE3    0x33
+                                                                               //                              23:16=LANE2_DP_LANE0    0x3A
+                                                                               //                              15:08=LANE1_DP_LANE1    0x3A
+                                                                               //                              07:00=LANE0_DP_LANE2    0x3A
                                        0x00000148 0x00000000 0x00000000        // SOR_NV_PDISP_SOR_LANE_PREEMPHASIS0_0
                                                                                //                              31:24=LANE3_DP_LANE3    0x00
                                                                                //                              23:16=LANE2_DP_LANE0    0x00
@@ -49,15 +49,15 @@
                                        0x000003a0 0xfffffffd 0x00000002        // SOR_NV_PDISP_INPUT_CONTROL   01:01=ARM_VIDEO_RANGE   0x1
                                        0x0000005c 0xf0fff8ff 0x01000000        // SOR_NV_PDISP_SOR_PLL0_0      11:08=VCOCAP            0x0
                                                                                //                              27:24=ICHPMP            0x1
-                                       0x00000060 0xff0fe0ff 0x00300f80        // SOR_NV_PDISP_SOR_PLL1_0      08:08=TMDS_TERM         0x1
-                                                                               //                              12:09=TMDS_TERMADJ      0xf
+                                       0x00000060 0xff0fe0ff 0x00301380        // SOR_NV_PDISP_SOR_PLL1_0      08:08=TMDS_TERM         0x1
+                                                                               //                              12:09=TMDS_TERMADJ      0x9
                                                                                //                              23:20=LOADADJ           0x3
-                                       0x00000068 0xf0ffffff 0x09000000        // SOR_NV_PSIDP_SOR_PLL3_0      27:24=BG_VREF_LEVEL     0x9
-                                       0x00000138 0x00000000 0x373f3f3f        // SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0_0
-                                                                               //                              31:24=LANE3_DP_LANE3    0x37
-                                                                               //                              23:16=LANE2_DP_LANE0    0x3f
-                                                                               //                              15:08=LANE1_DP_LANE1    0x3f
-                                                                               //                              07:00=LANE0_DP_LANE2    0x3f
+                                       0x00000068 0xf0ffffff 0x08000000        // SOR_NV_PSIDP_SOR_PLL3_0      27:24=BG_VREF_LEVEL     0x8
+                                       0x00000138 0x00000000 0x333A3A3A        // SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0_0
+                                                                               //                              31:24=LANE3_DP_LANE3    0x33
+                                                                               //                              23:16=LANE2_DP_LANE0    0x3A
+                                                                               //                              15:08=LANE1_DP_LANE1    0x3A
+                                                                               //                              07:00=LANE0_DP_LANE2    0x3A
                                        0x00000148 0x00000000 0x00000000        // SOR_NV_PDISP_SOR_LANE_PREEMPHASIS0_0
                                                                                //                              31:24=LANE3_DP_LANE3    0x00
                                                                                //                              23:16=LANE2_DP_LANE0    0x00
@@ -73,15 +73,15 @@
                                        0x000003a0 0xfffffffd 0x00000002        // SOR_NV_PDISP_INPUT_CONTROL   01:01=ARM_VIDEO_RANGE   0x1
                                        0x0000005c 0xf0fff8ff 0x01000100        // SOR_NV_PDISP_SOR_PLL0_0      11:08=VCOCAP            0x1
                                                                                //                              27:24=ICHPMP            0x1
-                                       0x00000060 0xff0fe0ff 0x00300f80        // SOR_NV_PDISP_SOR_PLL1_0      08:08=TMDS_TERM         0x1
+                                       0x00000060 0xff0fe0ff 0x00301380        // SOR_NV_PDISP_SOR_PLL1_0      08:08=TMDS_TERM         0x1
                                                                                //                              12:09=TMDS_TERMADJ      0x9
                                                                                //                              23:20=LOADADJ           0x3
-                                       0x00000068 0xf0ffffff 0x09000000        // SOR_NV_PSIDP_SOR_PLL3_0      27:24=BG_VREF_LEVEL     0x9
-                                       0x00000138 0x00000000 0x33373737        // SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0_0
+                                       0x00000068 0xf0ffffff 0x08000000        // SOR_NV_PSIDP_SOR_PLL3_0      27:24=BG_VREF_LEVEL     0x8
+                                       0x00000138 0x00000000 0x333A3A3A        // SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0_0
                                                                                //                              31:24=LANE3_DP_LANE3    0x33
-                                                                               //                              23:16=LANE2_DP_LANE0    0x37
-                                                                               //                              15:08=LANE1_DP_LANE1    0x37
-                                                                               //                              07:00=LANE0_DP_LANE2    0x37
+                                                                               //                              23:16=LANE2_DP_LANE0    0x3A
+                                                                               //                              15:08=LANE1_DP_LANE1    0x3A
+                                                                               //                              07:00=LANE0_DP_LANE2    0x3A
                                        0x00000148 0x00000000 0x00000000        // SOR_NV_PDISP_SOR_LANE_PREEMPHASIS0_0
                                                                                //                              31:24=LANE3_DP_LANE3    0x00
                                                                                //                              23:16=LANE2_DP_LANE0    0x00
@@ -98,15 +98,15 @@
                                        0x000003a0 0xfffffffd 0x00000000        // SOR_NV_PDISP_INPUT_CONTROL   01:01=ARM_VIDEO_RANGE   0x0
                                        0x0000005c 0xf0fff8ff 0x01000300        // SOR_NV_PDISP_SOR_PLL0_0      11:08=VCOCAP            0x3
                                                                                //                              27:24=ICHPMP            0x1
-                                       0x00000060 0xff0fe0ff 0x00300980        // SOR_NV_PDISP_SOR_PLL1_0      08:08=TMDS_TERM         0x1
+                                       0x00000060 0xff0fe0ff 0x00301380        // SOR_NV_PDISP_SOR_PLL1_0      08:08=TMDS_TERM         0x1
                                                                                //                              12:09=TMDS_TERMADJ      0x9
                                                                                //                              23:20=LOADADJ           0x3
                                        0x00000068 0xf0ffffff 0x08000000        // SOR_NV_PSIDP_SOR_PLL3_0      27:24=BG_VREF_LEVEL     0x8
-                                       0x00000138 0x00000000 0x33373737        // SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0_0
+                                       0x00000138 0x00000000 0x333A3A3A        // SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0_0
                                                                                //                              31:24=LANE3_DP_LANE3    0x33
-                                                                               //                              23:16=LANE2_DP_LANE0    0x3f
-                                                                               //                              15:08=LANE1_DP_LANE1    0x3f
-                                                                               //                              07:00=LANE0_DP_LANE2    0x3f
+                                                                               //                              23:16=LANE2_DP_LANE0    0x3A
+                                                                               //                              15:08=LANE1_DP_LANE1    0x3A
+                                                                               //                              07:00=LANE0_DP_LANE2    0x3A
                                        0x00000148 0x00000000 0x00000000        // SOR_NV_PDISP_SOR_LANE_PREEMPHASIS0_0
                                                                                //                              31:24=LANE3_DP_LANE3    0x00
                                                                                //                              23:16=LANE2_DP_LANE0    0x00
@@ -122,15 +122,15 @@
                                        0x000003a0 0xfffffffd 0x00000000        // SOR_NV_PDISP_INPUT_CONTROL   01:01=ARM_VIDEO_RANGE   0x0
                                        0x0000005c 0xf0fff8ff 0x01000300        // SOR_NV_PDISP_SOR_PLL0_0      11:08=VCOCAP            0x3
                                                                                //                              27:24=ICHPMP            0x1
-                                       0x00000060 0xff0fe0ff 0x00300980        // SOR_NV_PDISP_SOR_PLL1_0      08:08=TMDS_TERM         0x1
+                                       0x00000060 0xff0fe0ff 0x00301380        // SOR_NV_PDISP_SOR_PLL1_0      08:08=TMDS_TERM         0x1
                                                                                //                              12:09=TMDS_TERMADJ      0x9
                                                                                //                              23:20=LOADADJ           0x3
-                                       0x00000068 0xf0ffffff 0x08000000        // SOR_NV_PSIDP_SOR_PLL3_0      27:24=BG_VREF_LEVEL     0x8
-                                       0x00000138 0x00000000 0x33373737        // SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0_0
+                                       0x00000068 0xf0ffffff 0x0A000000        // SOR_NV_PSIDP_SOR_PLL3_0      27:24=BG_VREF_LEVEL     0xA
+                                       0x00000138 0x00000000 0x333F3F3F        // SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0_0
                                                                                //                              31:24=LANE3_DP_LANE3    0x33
-                                                                               //                              23:16=LANE2_DP_LANE0    0x37
-                                                                               //                              15:08=LANE1_DP_LANE1    0x37
-                                                                               //                              07:00=LANE0_DP_LANE2    0x37
+                                                                               //                              23:16=LANE2_DP_LANE0    0x3F
+                                                                               //                              15:08=LANE1_DP_LANE1    0x3F
+                                                                               //                              07:00=LANE0_DP_LANE2    0x3F
                                        0x00000148 0x00000000 0x00171717        // SOR_NV_PDISP_SOR_LANE_PREEMPHASIS0_0
                                                                                //                              31:24=LANE3_DP_LANE3    0x00
                                                                                //                              23:16=LANE2_DP_LANE0    0x17
@@ -146,11 +146,11 @@
                                        0x000003a0 0xfffffffd 0x00000002        // SOR_NV_PDISP_INPUT_CONTROL   01:01=ARM_VIDEO_RANGE   0x1
                                        0x0000005c 0xf0fff8ff 0x01000300        // SOR_NV_PDISP_SOR_PLL0_0      11:08=VCOCAP            0x3
                                                                                //                              27:24=ICHPMP            0x1
-                                       0x00000060 0xff0fe0ff 0x00300980        // SOR_NV_PDISP_SOR_PLL1_0      08:08=TMDS_TERM         0x1
+                                       0x00000060 0xff0fe0ff 0x00301380        // SOR_NV_PDISP_SOR_PLL1_0      08:08=TMDS_TERM         0x1
                                                                                //                              12:09=TMDS_TERMADJ      0x9
                                                                                //                              23:20=LOADADJ           0x3
                                        0x00000068 0xf0ffffff 0x08000000        // SOR_NV_PSIDP_SOR_PLL3_0      27:24=BG_VREF_LEVEL     0x8
-                                       0x00000138 0x00000000 0x33373737        // SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0_0
+                                       0x00000138 0x00000000 0x333F3F3F        // SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0_0
                                                                                //                              31:24=LANE3_DP_LANE3    0x33
                                                                                //                              23:16=LANE2_DP_LANE0    0x3f
                                                                                //                              15:08=LANE1_DP_LANE1    0x3f