gpu: nvgpu: cancel all wdt timeouts while handling SCHED errors

A SCHED error might cause multiple channels' watchdogs to trigger
simultaneously

Hence, to avoid this conflict cancel watchdog timeout on all
channels before recovering from SCHED errors

Also, define API gk20a_channel_timeout_stop_all_channels()
to cancel wdt timeout on all channels

Bug 200133289

Change-Id: I8324c397891f0a711327b77d0677cd6718af6d01
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/810959
(cherry picked from commit 1501d972d4ab1546737472d0469faacb6ed9eb18)
Reviewed-on: http://git-master/r/814255
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: http://git-master/r/825506
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

diff --git a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c
index 550e84fe7833e1b279701afdc9496870ec0d63f3..46698a17fea6abbcb9c6a37bbb94ae31545778e0 100644 (file)
--- a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c
@@ -1587,6 +1587,21 @@ static void gk20a_channel_timeout_stop(struct channel_gk20a *ch)
        mutex_unlock(&ch->timeout.lock);
 }
 
+void gk20a_channel_timeout_stop_all_channels(struct gk20a *g)
+{
+       u32 chid;
+       struct fifo_gk20a *f = &g->fifo;
+
+       for (chid = 0; chid < f->num_channels; chid++) {
+               struct channel_gk20a *ch = &f->channel[chid];
+
+               if (gk20a_channel_get(ch)) {
+                       gk20a_channel_timeout_stop(ch);
+                       gk20a_channel_put(ch);
+               }
+       }
+}
+
 static void gk20a_channel_timeout_handler(struct work_struct *work)
 {
        struct channel_gk20a_job *job;

diff --git a/drivers/gpu/nvgpu/gk20a/channel_gk20a.h b/drivers/gpu/nvgpu/gk20a/channel_gk20a.h
index 365cfe2d1b212537bd4e89aa9f11d5083a4eec02..261fc74fd10aa687b94e0dfef713b0ecbe1c63d3 100644 (file)
--- a/drivers/gpu/nvgpu/gk20a/channel_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/channel_gk20a.h
@@ -259,4 +259,5 @@ void channel_gk20a_free_inst(struct gk20a *g, struct channel_gk20a *ch);
 int channel_gk20a_setup_ramfc(struct channel_gk20a *c,
                        u64 gpfifo_base, u32 gpfifo_entries);
 void channel_gk20a_enable(struct channel_gk20a *ch);
+void gk20a_channel_timeout_stop_all_channels(struct gk20a *g);
 #endif /* CHANNEL_GK20A_H */

diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
index 5dbbe9f8a92f62ea9391b29a20e6e7f1cb9b533c..0c8e9d06e10744954151c231007091664c372b62 100644 (file)
--- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
@@ -1412,6 +1412,7 @@ static bool gk20a_fifo_handle_sched_error(struct gk20a *g)
                struct channel_gk20a *ch = &f->channel[id];
 
                if (is_tsg) {
+                       gk20a_channel_timeout_stop_all_channels(g);
                        gk20a_fifo_recover(g, BIT(engine_id), id, true, true);
                        ret = true;
                        goto err;
@@ -1428,6 +1429,11 @@ static bool gk20a_fifo_handle_sched_error(struct gk20a *g)
                                "fifo sched ctxsw timeout error:"
                                "engine = %u, ch = %d", engine_id, id);
                        gk20a_gr_debug_dump(g->dev);
+                       /*
+                        * Cancel all channels' timeout since SCHED error might
+                        * trigger multiple watchdogs at a time
+                        */
+                       gk20a_channel_timeout_stop_all_channels(g);
                        gk20a_fifo_recover(g, BIT(engine_id), id, false,
                                ch->timeout_debug_dump);
                        ret = true;