0x00000000, /* Mode Register 4 */
1180, /* expected dvfs latency (ns) */
},
- {
- 0x16, /* NoRegCalcVersion */
- "05_1056000_01_NoRegCalcVersion_V0.4", /* DVFS table version */
- 1056000, /* SDRAM frequency */
- 1100, /* min voltage */
- 1100, /* gpu min voltage */
- "pllm_ud", /* clock source id */
- 0x80000000, /* CLK_SOURCE_EMC */
- 168, /* number of burst_regs */
- 31, /* number of up_down_regs */
- {
- 0x0000002f, /* EMC_RC */
- 0x00000111, /* EMC_RFC */
- 0x00000000, /* EMC_RFC_SLR */
- 0x00000021, /* EMC_RAS */
- 0x0000000c, /* EMC_RP */
- 0x0000000a, /* EMC_R2W */
- 0x00000011, /* EMC_W2R */
- 0x00000006, /* EMC_R2P */
- 0x00000019, /* EMC_W2P */
- 0x0000000c, /* EMC_RD_RCD */
- 0x0000000c, /* EMC_WR_RCD */
- 0x00000004, /* EMC_RRD */
- 0x00000002, /* EMC_REXT */
- 0x00000000, /* EMC_WEXT */
- 0x00000007, /* EMC_WDV */
- 0x00000007, /* EMC_WDV_MASK */
- 0x0000000e, /* EMC_QUSE */
- 0x00000002, /* EMC_QUSE_WIDTH */
- 0x00000000, /* EMC_IBDLY */
- 0x00000002, /* EMC_EINPUT */
- 0x00000010, /* EMC_EINPUT_DURATION */
- 0x000b0000, /* EMC_PUTERM_EXTRA */
- 0x00000004, /* EMC_PUTERM_WIDTH */
- 0x00000000, /* EMC_BGBIAS_CTL0 */
- 0x00000000, /* EMC_PUTERM_ADJ */
- 0x00000000, /* EMC_CDB_CNTL_1 */
- 0x00000000, /* EMC_CDB_CNTL_2 */
- 0x00000000, /* EMC_CDB_CNTL_3 */
- 0x00000001, /* EMC_QRST */
- 0x00000017, /* EMC_QSAFE */
- 0x0000001d, /* EMC_RDV */
- 0x0000001f, /* EMC_RDV_MASK */
- 0x00001fed, /* EMC_REFRESH */
- 0x00000000, /* EMC_BURST_REFRESH_NUM */
- 0x000007fb, /* EMC_PRE_REFRESH_REQ_CNT */
- 0x00000005, /* EMC_PDEX2WR */
- 0x00000018, /* EMC_PDEX2RD */
- 0x00000002, /* EMC_PCHG2PDEN */
- 0x00000000, /* EMC_ACT2PDEN */
- 0x00000106, /* EMC_AR2PDEN */
- 0x0000001e, /* EMC_RW2PDEN */
- 0x0000011e, /* EMC_TXSR */
- 0x00000200, /* EMC_TXSRDLL */
- 0x00000007, /* EMC_TCKE */
- 0x00000008, /* EMC_TCKESR */
- 0x00000007, /* EMC_TPD */
- 0x00000018, /* EMC_TFAW */
- 0x00000000, /* EMC_TRPAB */
- 0x0000000b, /* EMC_TCLKSTABLE */
- 0x0000000b, /* EMC_TCLKSTOP */
- 0x0000202d, /* EMC_TREFBW */
- 0x00000000, /* EMC_FBIO_CFG6 */
- 0x00000000, /* EMC_ODT_WRITE */
- 0x00000000, /* EMC_ODT_READ */
- 0x1040b8d8, /* EMC_FBIO_CFG5 */
- 0xd00100b1, /* EMC_CFG_DIG_DLL */
- 0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
- 0x0000000a, /* EMC_DLL_XFORM_DQS0 */
- 0x0000000a, /* EMC_DLL_XFORM_DQS1 */
- 0x0000000a, /* EMC_DLL_XFORM_DQS2 */
- 0x0000000a, /* EMC_DLL_XFORM_DQS3 */
- 0x0000000a, /* EMC_DLL_XFORM_DQS4 */
- 0x0000000a, /* EMC_DLL_XFORM_DQS5 */
- 0x0000000a, /* EMC_DLL_XFORM_DQS6 */
- 0x0000000a, /* EMC_DLL_XFORM_DQS7 */
- 0x0000000a, /* EMC_DLL_XFORM_DQS8 */
- 0x0000000a, /* EMC_DLL_XFORM_DQS9 */
- 0x0000000a, /* EMC_DLL_XFORM_DQS10 */
- 0x0000000a, /* EMC_DLL_XFORM_DQS11 */
- 0x0000000a, /* EMC_DLL_XFORM_DQS12 */
- 0x0000000a, /* EMC_DLL_XFORM_DQS13 */
- 0x0000000a, /* EMC_DLL_XFORM_DQS14 */
- 0x0000000a, /* EMC_DLL_XFORM_DQS15 */
- 0x00000000, /* EMC_DLL_XFORM_QUSE0 */
- 0x00000000, /* EMC_DLL_XFORM_QUSE1 */
- 0x00000000, /* EMC_DLL_XFORM_QUSE2 */
- 0x00000000, /* EMC_DLL_XFORM_QUSE3 */
- 0x00000000, /* EMC_DLL_XFORM_QUSE4 */
- 0x00000000, /* EMC_DLL_XFORM_QUSE5 */
- 0x00000000, /* EMC_DLL_XFORM_QUSE6 */
- 0x00000000, /* EMC_DLL_XFORM_QUSE7 */
- 0x0002c000, /* EMC_DLL_XFORM_ADDR0 */
- 0x0002c000, /* EMC_DLL_XFORM_ADDR1 */
- 0x00000000, /* EMC_DLL_XFORM_ADDR2 */
- 0x0002c000, /* EMC_DLL_XFORM_ADDR3 */
- 0x0002c000, /* EMC_DLL_XFORM_ADDR4 */
- 0x00000000, /* EMC_DLL_XFORM_ADDR5 */
- 0x00000000, /* EMC_DLL_XFORM_QUSE8 */
- 0x00000000, /* EMC_DLL_XFORM_QUSE9 */
- 0x00000000, /* EMC_DLL_XFORM_QUSE10 */
- 0x00000000, /* EMC_DLL_XFORM_QUSE11 */
- 0x00000000, /* EMC_DLL_XFORM_QUSE12 */
- 0x00000000, /* EMC_DLL_XFORM_QUSE13 */
- 0x00000000, /* EMC_DLL_XFORM_QUSE14 */
- 0x00000000, /* EMC_DLL_XFORM_QUSE15 */
- 0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
- 0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
- 0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
- 0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
- 0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
- 0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
- 0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
- 0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
- 0x00000000, /* EMC_DLI_TRIM_TXDQS8 */
- 0x00000000, /* EMC_DLI_TRIM_TXDQS9 */
- 0x00000000, /* EMC_DLI_TRIM_TXDQS10 */
- 0x00000000, /* EMC_DLI_TRIM_TXDQS11 */
- 0x00000000, /* EMC_DLI_TRIM_TXDQS12 */
- 0x00000000, /* EMC_DLI_TRIM_TXDQS13 */
- 0x00000000, /* EMC_DLI_TRIM_TXDQS14 */
- 0x00000000, /* EMC_DLI_TRIM_TXDQS15 */
- 0x0000000c, /* EMC_DLL_XFORM_DQ0 */
- 0x0000000c, /* EMC_DLL_XFORM_DQ1 */
- 0x0000000c, /* EMC_DLL_XFORM_DQ2 */
- 0x0000000c, /* EMC_DLL_XFORM_DQ3 */
- 0x0000000c, /* EMC_DLL_XFORM_DQ4 */
- 0x0000000c, /* EMC_DLL_XFORM_DQ5 */
- 0x0000000c, /* EMC_DLL_XFORM_DQ6 */
- 0x0000000c, /* EMC_DLL_XFORM_DQ7 */
- 0x100002a0, /* EMC_XM2CMDPADCTRL */
- 0x00000000, /* EMC_XM2CMDPADCTRL4 */
- 0x00111111, /* EMC_XM2CMDPADCTRL5 */
- 0x0120113d, /* EMC_XM2DQSPADCTRL2 */
- 0x00000000, /* EMC_XM2DQPADCTRL2 */
- 0x00000000, /* EMC_XM2DQPADCTRL3 */
- 0x77ffc085, /* EMC_XM2CLKPADCTRL */
- 0x00000606, /* EMC_XM2CLKPADCTRL2 */
- 0x81f1f108, /* EMC_XM2COMPPADCTRL */
- 0x07070004, /* EMC_XM2VTTGENPADCTRL */
- 0x00000000, /* EMC_XM2VTTGENPADCTRL2 */
- 0x016eeeee, /* EMC_XM2VTTGENPADCTRL3 */
- 0x65965920, /* EMC_XM2DQSPADCTRL3 */
- 0x005d75d7, /* EMC_XM2DQSPADCTRL4 */
- 0x005d75d7, /* EMC_XM2DQSPADCTRL5 */
- 0x65965900, /* EMC_XM2DQSPADCTRL6 */
- 0x0606003f, /* EMC_DSR_VTTGEN_DRV */
- 0x00000000, /* EMC_TXDSRVTTGEN */
- 0x00000000, /* EMC_FBIO_SPARE */
- 0x00020000, /* EMC_ZCAL_INTERVAL */
- 0x00000152, /* EMC_ZCAL_WAIT_CNT */
- 0x00a30010, /* EMC_MRS_WAIT_CNT */
- 0x00a30010, /* EMC_MRS_WAIT_CNT2 */
- 0x00000000, /* EMC_AUTO_CAL_CONFIG2 */
- 0x00000000, /* EMC_AUTO_CAL_CONFIG3 */
- 0xa1430000, /* EMC_AUTO_CAL_CONFIG */
- 0x0000000a, /* EMC_CTT */
- 0x00000004, /* EMC_CTT_DURATION */
- 0x00000000, /* EMC_CFG_PIPE */
- 0x80003fc1, /* EMC_DYN_SELF_REF_CONTROL */
- 0x00000012, /* EMC_QPOP */
- 0x0d00000f, /* MC_EMEM_ARB_CFG */
- 0x80000040, /* MC_EMEM_ARB_OUTSTANDING_REQ */
- 0x00000005, /* MC_EMEM_ARB_TIMING_RCD */
- 0x00000006, /* MC_EMEM_ARB_TIMING_RP */
- 0x00000018, /* MC_EMEM_ARB_TIMING_RC */
- 0x00000010, /* MC_EMEM_ARB_TIMING_RAS */
- 0x0000000c, /* MC_EMEM_ARB_TIMING_FAW */
- 0x00000002, /* MC_EMEM_ARB_TIMING_RRD */
- 0x00000004, /* MC_EMEM_ARB_TIMING_RAP2PRE */
- 0x0000000f, /* MC_EMEM_ARB_TIMING_WAP2PRE */
- 0x00000002, /* MC_EMEM_ARB_TIMING_R2R */
- 0x00000002, /* MC_EMEM_ARB_TIMING_W2W */
- 0x00000007, /* MC_EMEM_ARB_TIMING_R2W */
- 0x0000000a, /* MC_EMEM_ARB_TIMING_W2R */
- 0x0a070202, /* MC_EMEM_ARB_DA_TURNS */
- 0x001c1118, /* MC_EMEM_ARB_DA_COVERS */
- 0x73503019, /* MC_EMEM_ARB_MISC0 */
- 0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
- },
- {
- 0x0000001a, /* MC_MLL_MPCORER_PTSA_RATE */
- 0x000001fa, /* MC_PTSA_GRANT_DECREMENT */
- 0x00600038, /* MC_LATENCY_ALLOWANCE_XUSB_0 */
- 0x00600038, /* MC_LATENCY_ALLOWANCE_XUSB_1 */
- 0x0060003c, /* MC_LATENCY_ALLOWANCE_TSEC_0 */
- 0x00600090, /* MC_LATENCY_ALLOWANCE_SDMMCA_0 */
- 0x00600041, /* MC_LATENCY_ALLOWANCE_SDMMCAA_0 */
- 0x00600090, /* MC_LATENCY_ALLOWANCE_SDMMC_0 */
- 0x00600041, /* MC_LATENCY_ALLOWANCE_SDMMCAB_0 */
- 0x00270049, /* MC_LATENCY_ALLOWANCE_PPCS_0 */
- 0x00600080, /* MC_LATENCY_ALLOWANCE_PPCS_1 */
- 0x00600004, /* MC_LATENCY_ALLOWANCE_MPCORE_0 */
- 0x00600004, /* MC_LATENCY_ALLOWANCE_MPCORELP_0 */
- 0x00080016, /* MC_LATENCY_ALLOWANCE_HC_0 */
- 0x00000060, /* MC_LATENCY_ALLOWANCE_HC_1 */
- 0x00600004, /* MC_LATENCY_ALLOWANCE_AVPC_0 */
- 0x00600019, /* MC_LATENCY_ALLOWANCE_GPU_0 */
- 0x00600018, /* MC_LATENCY_ALLOWANCE_MSENC_0 */
- 0x00600024, /* MC_LATENCY_ALLOWANCE_HDA_0 */
- 0x0060001b, /* MC_LATENCY_ALLOWANCE_VIC_0 */
- 0x00000060, /* MC_LATENCY_ALLOWANCE_VI2_0 */
- 0x00000036, /* MC_LATENCY_ALLOWANCE_ISP2_0 */
- 0x00600060, /* MC_LATENCY_ALLOWANCE_ISP2_1 */
- 0x00000036, /* MC_LATENCY_ALLOWANCE_ISP2B_0 */
- 0x00600060, /* MC_LATENCY_ALLOWANCE_ISP2B_1 */
- 0x00d400ff, /* MC_LATENCY_ALLOWANCE_VDE_0 */
- 0x00510029, /* MC_LATENCY_ALLOWANCE_VDE_1 */
- 0x00600060, /* MC_LATENCY_ALLOWANCE_VDE_2 */
- 0x00600060, /* MC_LATENCY_ALLOWANCE_VDE_3 */
- 0x00600065, /* MC_LATENCY_ALLOWANCE_SATA_0 */
- 0x0060001c, /* MC_LATENCY_ALLOWANCE_AFI_0 */
- },
- 0x00000057, /* EMC_ZCAL_WAIT_CNT after clock change */
- 0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
- 0x00000802, /* EMC_CTT_TERM_CTRL */
- 0x73300000, /* EMC_CFG */
- 0x000008a5, /* EMC_CFG_2 */
- 0x00040000, /* EMC_SEL_DPD_CTRL */
- 0xd0010069, /* EMC_CFG_DIG_DLL */
- 0x80000125, /* Mode Register 0 */
- 0x80100002, /* Mode Register 1 */
- 0x80200028, /* Mode Register 2 */
- 0x00000000, /* Mode Register 4 */
- 1180, /* expected dvfs latency (ns) */
- },
-
};
static struct tegra12_emc_table thor_195_b00_emc_table[] = {
{
0x16, /* NoRegCalcVersion */
- "02_12750_01_NoRegCalcVersion_V0.4", /* DVFS table version */
+ "01_12750_01_NoRegCalcVersion_V0.4", /* DVFS table version */
12750, /* SDRAM frequency */
800, /* min voltage */
800, /* gpu min voltage */
0x00000000, /* EMC_DLI_TRIM_TXDQS13 */
0x00000000, /* EMC_DLI_TRIM_TXDQS14 */
0x00000000, /* EMC_DLI_TRIM_TXDQS15 */
- 0x00078000, /* EMC_DLL_XFORM_DQ0 */
- 0x00078000, /* EMC_DLL_XFORM_DQ1 */
- 0x00078000, /* EMC_DLL_XFORM_DQ2 */
- 0x00078000, /* EMC_DLL_XFORM_DQ3 */
- 0x00007800, /* EMC_DLL_XFORM_DQ4 */
- 0x00007800, /* EMC_DLL_XFORM_DQ5 */
- 0x00007800, /* EMC_DLL_XFORM_DQ6 */
- 0x00007800, /* EMC_DLL_XFORM_DQ7 */
+ 0x00080000, /* EMC_DLL_XFORM_DQ0 */
+ 0x00080000, /* EMC_DLL_XFORM_DQ1 */
+ 0x00080000, /* EMC_DLL_XFORM_DQ2 */
+ 0x00080000, /* EMC_DLL_XFORM_DQ3 */
+ 0x00008000, /* EMC_DLL_XFORM_DQ4 */
+ 0x00008000, /* EMC_DLL_XFORM_DQ5 */
+ 0x00008000, /* EMC_DLL_XFORM_DQ6 */
+ 0x00008000, /* EMC_DLL_XFORM_DQ7 */
0x10000280, /* EMC_XM2CMDPADCTRL */
0x00000000, /* EMC_XM2CMDPADCTRL4 */
0x00111111, /* EMC_XM2CMDPADCTRL5 */
},
{
0x16, /* NoRegCalcVersion */
- "02_20400_01_NoRegCalcVersion_V0.4", /* DVFS table version */
+ "01_20400_01_NoRegCalcVersion_V0.4", /* DVFS table version */
20400, /* SDRAM frequency */
800, /* min voltage */
800, /* gpu min voltage */
0x00000000, /* EMC_DLI_TRIM_TXDQS13 */
0x00000000, /* EMC_DLI_TRIM_TXDQS14 */
0x00000000, /* EMC_DLI_TRIM_TXDQS15 */
- 0x00078000, /* EMC_DLL_XFORM_DQ0 */
- 0x00078000, /* EMC_DLL_XFORM_DQ1 */
- 0x00078000, /* EMC_DLL_XFORM_DQ2 */
- 0x00078000, /* EMC_DLL_XFORM_DQ3 */
- 0x00007800, /* EMC_DLL_XFORM_DQ4 */
- 0x00007800, /* EMC_DLL_XFORM_DQ5 */
- 0x00007800, /* EMC_DLL_XFORM_DQ6 */
- 0x00007800, /* EMC_DLL_XFORM_DQ7 */
+ 0x00080000, /* EMC_DLL_XFORM_DQ0 */
+ 0x00080000, /* EMC_DLL_XFORM_DQ1 */
+ 0x00080000, /* EMC_DLL_XFORM_DQ2 */
+ 0x00080000, /* EMC_DLL_XFORM_DQ3 */
+ 0x00008000, /* EMC_DLL_XFORM_DQ4 */
+ 0x00008000, /* EMC_DLL_XFORM_DQ5 */
+ 0x00008000, /* EMC_DLL_XFORM_DQ6 */
+ 0x00008000, /* EMC_DLL_XFORM_DQ7 */
0x10000280, /* EMC_XM2CMDPADCTRL */
0x00000000, /* EMC_XM2CMDPADCTRL4 */
0x00111111, /* EMC_XM2CMDPADCTRL5 */
},
{
0x16, /* NoRegCalcVersion */
- "02_40800_01_NoRegCalcVersion_V0.4", /* DVFS table version */
+ "01_40800_01_NoRegCalcVersion_V0.4", /* DVFS table version */
40800, /* SDRAM frequency */
800, /* min voltage */
800, /* gpu min voltage */
0x00000000, /* EMC_DLI_TRIM_TXDQS13 */
0x00000000, /* EMC_DLI_TRIM_TXDQS14 */
0x00000000, /* EMC_DLI_TRIM_TXDQS15 */
- 0x00078000, /* EMC_DLL_XFORM_DQ0 */
- 0x00078000, /* EMC_DLL_XFORM_DQ1 */
- 0x00078000, /* EMC_DLL_XFORM_DQ2 */
- 0x00078000, /* EMC_DLL_XFORM_DQ3 */
- 0x00007800, /* EMC_DLL_XFORM_DQ4 */
- 0x00007800, /* EMC_DLL_XFORM_DQ5 */
- 0x00007800, /* EMC_DLL_XFORM_DQ6 */
- 0x00007800, /* EMC_DLL_XFORM_DQ7 */
+ 0x00080000, /* EMC_DLL_XFORM_DQ0 */
+ 0x00080000, /* EMC_DLL_XFORM_DQ1 */
+ 0x00080000, /* EMC_DLL_XFORM_DQ2 */
+ 0x00080000, /* EMC_DLL_XFORM_DQ3 */
+ 0x00008000, /* EMC_DLL_XFORM_DQ4 */
+ 0x00008000, /* EMC_DLL_XFORM_DQ5 */
+ 0x00008000, /* EMC_DLL_XFORM_DQ6 */
+ 0x00008000, /* EMC_DLL_XFORM_DQ7 */
0x10000280, /* EMC_XM2CMDPADCTRL */
0x00000000, /* EMC_XM2CMDPADCTRL4 */
0x00111111, /* EMC_XM2CMDPADCTRL5 */
},
{
0x16, /* NoRegCalcVersion */
- "02_68000_01_NoRegCalcVersion_V0.4", /* DVFS table version */
+ "01_68000_01_NoRegCalcVersion_V0.4", /* DVFS table version */
68000, /* SDRAM frequency */
800, /* min voltage */
800, /* gpu min voltage */
0x00000000, /* EMC_DLI_TRIM_TXDQS13 */
0x00000000, /* EMC_DLI_TRIM_TXDQS14 */
0x00000000, /* EMC_DLI_TRIM_TXDQS15 */
- 0x00078000, /* EMC_DLL_XFORM_DQ0 */
- 0x00078000, /* EMC_DLL_XFORM_DQ1 */
- 0x00078000, /* EMC_DLL_XFORM_DQ2 */
- 0x00078000, /* EMC_DLL_XFORM_DQ3 */
- 0x00007800, /* EMC_DLL_XFORM_DQ4 */
- 0x00007800, /* EMC_DLL_XFORM_DQ5 */
- 0x00007800, /* EMC_DLL_XFORM_DQ6 */
- 0x00007800, /* EMC_DLL_XFORM_DQ7 */
+ 0x00080000, /* EMC_DLL_XFORM_DQ0 */
+ 0x00080000, /* EMC_DLL_XFORM_DQ1 */
+ 0x00080000, /* EMC_DLL_XFORM_DQ2 */
+ 0x00080000, /* EMC_DLL_XFORM_DQ3 */
+ 0x00008000, /* EMC_DLL_XFORM_DQ4 */
+ 0x00008000, /* EMC_DLL_XFORM_DQ5 */
+ 0x00008000, /* EMC_DLL_XFORM_DQ6 */
+ 0x00008000, /* EMC_DLL_XFORM_DQ7 */
0x10000280, /* EMC_XM2CMDPADCTRL */
0x00000000, /* EMC_XM2CMDPADCTRL4 */
0x00111111, /* EMC_XM2CMDPADCTRL5 */
},
{
0x16, /* NoRegCalcVersion */
- "02_102000_01_NoRegCalcVersion_V0.4", /* DVFS table version */
+ "01_102000_01_NoRegCalcVersion_V0.4", /* DVFS table version */
102000, /* SDRAM frequency */
800, /* min voltage */
800, /* gpu min voltage */
0x00000000, /* EMC_DLI_TRIM_TXDQS13 */
0x00000000, /* EMC_DLI_TRIM_TXDQS14 */
0x00000000, /* EMC_DLI_TRIM_TXDQS15 */
- 0x00078000, /* EMC_DLL_XFORM_DQ0 */
- 0x00078000, /* EMC_DLL_XFORM_DQ1 */
- 0x00078000, /* EMC_DLL_XFORM_DQ2 */
- 0x00078000, /* EMC_DLL_XFORM_DQ3 */
- 0x00007800, /* EMC_DLL_XFORM_DQ4 */
- 0x00007800, /* EMC_DLL_XFORM_DQ5 */
- 0x00007800, /* EMC_DLL_XFORM_DQ6 */
- 0x00007800, /* EMC_DLL_XFORM_DQ7 */
+ 0x00080000, /* EMC_DLL_XFORM_DQ0 */
+ 0x00080000, /* EMC_DLL_XFORM_DQ1 */
+ 0x00080000, /* EMC_DLL_XFORM_DQ2 */
+ 0x00080000, /* EMC_DLL_XFORM_DQ3 */
+ 0x00008000, /* EMC_DLL_XFORM_DQ4 */
+ 0x00008000, /* EMC_DLL_XFORM_DQ5 */
+ 0x00008000, /* EMC_DLL_XFORM_DQ6 */
+ 0x00008000, /* EMC_DLL_XFORM_DQ7 */
0x10000280, /* EMC_XM2CMDPADCTRL */
0x00000000, /* EMC_XM2CMDPADCTRL4 */
0x00111111, /* EMC_XM2CMDPADCTRL5 */
},
{
0x16, /* NoRegCalcVersion */
- "02_204000_01_NoRegCalcVersion_V0.4", /* DVFS table version */
+ "01_204000_01_NoRegCalcVersion_V0.4", /* DVFS table version */
204000, /* SDRAM frequency */
800, /* min voltage */
800, /* gpu min voltage */
0x00000005, /* EMC_TCLKSTABLE */
0x00000005, /* EMC_TCLKSTOP */
0x00000638, /* EMC_TREFBW */
- 0x00000002, /* EMC_FBIO_CFG6 */
+ 0x00000000, /* EMC_FBIO_CFG6 */
0x00000000, /* EMC_ODT_WRITE */
0x00000000, /* EMC_ODT_READ */
0x10604098, /* EMC_FBIO_CFG5 */
},
{
0x16, /* NoRegCalcVersion */
- "02_300000_01_NoRegCalcVersion_V0.4", /* DVFS table version */
+ "01_300000_01_NoRegCalcVersion_V0.4", /* DVFS table version */
300000, /* SDRAM frequency */
800, /* min voltage */
800, /* gpu min voltage */
0x00000000, /* EMC_DLI_TRIM_TXDQS13 */
0x00000000, /* EMC_DLI_TRIM_TXDQS14 */
0x00000000, /* EMC_DLI_TRIM_TXDQS15 */
- 0x00080000, /* EMC_DLL_XFORM_DQ0 */
- 0x00080000, /* EMC_DLL_XFORM_DQ1 */
- 0x00080000, /* EMC_DLL_XFORM_DQ2 */
- 0x00080000, /* EMC_DLL_XFORM_DQ3 */
- 0x00008000, /* EMC_DLL_XFORM_DQ4 */
- 0x00008000, /* EMC_DLL_XFORM_DQ5 */
- 0x00008000, /* EMC_DLL_XFORM_DQ6 */
- 0x00008000, /* EMC_DLL_XFORM_DQ7 */
+ 0x00060000, /* EMC_DLL_XFORM_DQ0 */
+ 0x00060000, /* EMC_DLL_XFORM_DQ1 */
+ 0x00060000, /* EMC_DLL_XFORM_DQ2 */
+ 0x00060000, /* EMC_DLL_XFORM_DQ3 */
+ 0x00006000, /* EMC_DLL_XFORM_DQ4 */
+ 0x00006000, /* EMC_DLL_XFORM_DQ5 */
+ 0x00006000, /* EMC_DLL_XFORM_DQ6 */
+ 0x00006000, /* EMC_DLL_XFORM_DQ7 */
0x10000280, /* EMC_XM2CMDPADCTRL */
0x00000000, /* EMC_XM2CMDPADCTRL4 */
0x00111111, /* EMC_XM2CMDPADCTRL5 */
},
{
0x16, /* NoRegCalcVersion */
- "02_396000_01_NoRegCalcVersion_V0.4", /* DVFS table version */
+ "01_396000_01_NoRegCalcVersion_V0.4", /* DVFS table version */
396000, /* SDRAM frequency */
870, /* min voltage */
900, /* gpu min voltage */
0x00000000, /* EMC_DLI_TRIM_TXDQS13 */
0x00000000, /* EMC_DLI_TRIM_TXDQS14 */
0x00000000, /* EMC_DLI_TRIM_TXDQS15 */
- 0x00058000, /* EMC_DLL_XFORM_DQ0 */
- 0x00058000, /* EMC_DLL_XFORM_DQ1 */
- 0x00058000, /* EMC_DLL_XFORM_DQ2 */
- 0x00058000, /* EMC_DLL_XFORM_DQ3 */
- 0x00005800, /* EMC_DLL_XFORM_DQ4 */
- 0x00005800, /* EMC_DLL_XFORM_DQ5 */
- 0x00005800, /* EMC_DLL_XFORM_DQ6 */
- 0x00005800, /* EMC_DLL_XFORM_DQ7 */
+ 0x00050000, /* EMC_DLL_XFORM_DQ0 */
+ 0x00050000, /* EMC_DLL_XFORM_DQ1 */
+ 0x00050000, /* EMC_DLL_XFORM_DQ2 */
+ 0x00050000, /* EMC_DLL_XFORM_DQ3 */
+ 0x00005000, /* EMC_DLL_XFORM_DQ4 */
+ 0x00005000, /* EMC_DLL_XFORM_DQ5 */
+ 0x00005000, /* EMC_DLL_XFORM_DQ6 */
+ 0x00005000, /* EMC_DLL_XFORM_DQ7 */
0x10000280, /* EMC_XM2CMDPADCTRL */
0x00000000, /* EMC_XM2CMDPADCTRL4 */
0x00111111, /* EMC_XM2CMDPADCTRL5 */
},
{
0x16, /* NoRegCalcVersion */
- "02_528000_01_NoRegCalcVersion_V0.4", /* DVFS table version */
+ "01_528000_01_NoRegCalcVersion_V0.4", /* DVFS table version */
528000, /* SDRAM frequency */
900, /* min voltage */
900, /* gpu min voltage */
},
{
0x16, /* NoRegCalcVersion */
- "02_600000_01_NoRegCalcVersion_V0.4", /* DVFS table version */
+ "01_600000_01_NoRegCalcVersion_V0.4", /* DVFS table version */
600000, /* SDRAM frequency */
910, /* min voltage */
900, /* gpu min voltage */
0x80200010, /* Mode Register 2 */
0x00000000, /* Mode Register 4 */
1440, /* expected dvfs latency (ns) */
+
},
{
0x16, /* NoRegCalcVersion */
- "02_792000_01_NoRegCalcVersion_V0.4", /* DVFS table version */
+ "01_792000_01_NoRegCalcVersion_V0.4", /* DVFS table version */
792000, /* SDRAM frequency */
1000, /* min voltage */
1100, /* gpu min voltage */
0x00000000, /* EMC_DLI_TRIM_TXDQS13 */
0x00000000, /* EMC_DLI_TRIM_TXDQS14 */
0x00000000, /* EMC_DLI_TRIM_TXDQS15 */
- 0x0000000d, /* EMC_DLL_XFORM_DQ0 */
- 0x0000000d, /* EMC_DLL_XFORM_DQ1 */
- 0x0000000d, /* EMC_DLL_XFORM_DQ2 */
- 0x0000000d, /* EMC_DLL_XFORM_DQ3 */
- 0x0000000d, /* EMC_DLL_XFORM_DQ4 */
- 0x0000000d, /* EMC_DLL_XFORM_DQ5 */
- 0x0000000d, /* EMC_DLL_XFORM_DQ6 */
- 0x0000000d, /* EMC_DLL_XFORM_DQ7 */
+ 0x0000000b, /* EMC_DLL_XFORM_DQ0 */
+ 0x0000000b, /* EMC_DLL_XFORM_DQ1 */
+ 0x0000000b, /* EMC_DLL_XFORM_DQ2 */
+ 0x0000000b, /* EMC_DLL_XFORM_DQ3 */
+ 0x0000000b, /* EMC_DLL_XFORM_DQ4 */
+ 0x0000000b, /* EMC_DLL_XFORM_DQ5 */
+ 0x0000000b, /* EMC_DLL_XFORM_DQ6 */
+ 0x0000000b, /* EMC_DLL_XFORM_DQ7 */
0x100002a0, /* EMC_XM2CMDPADCTRL */
0x00000000, /* EMC_XM2CMDPADCTRL4 */
0x00111111, /* EMC_XM2CMDPADCTRL5 */
},
{
0x16, /* NoRegCalcVersion */
- "02_924000_01_NoRegCalcVersion_V0.4", /* DVFS table version */
+ "01_924000_01_NoRegCalcVersion_V0.4", /* DVFS table version */
924000, /* SDRAM frequency */
1100, /* min voltage */
1100, /* gpu min voltage */
0x1040b898, /* EMC_FBIO_CFG5 */
0xe00400b1, /* EMC_CFG_DIG_DLL */
0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
- 0x007f800a, /* EMC_DLL_XFORM_DQS0 */
- 0x007f800a, /* EMC_DLL_XFORM_DQS1 */
- 0x007f800a, /* EMC_DLL_XFORM_DQS2 */
- 0x007f800a, /* EMC_DLL_XFORM_DQS3 */
- 0x007f800a, /* EMC_DLL_XFORM_DQS4 */
- 0x007f800a, /* EMC_DLL_XFORM_DQS5 */
- 0x007f800a, /* EMC_DLL_XFORM_DQS6 */
- 0x007f800a, /* EMC_DLL_XFORM_DQS7 */
- 0x007f800a, /* EMC_DLL_XFORM_DQS8 */
- 0x007f800a, /* EMC_DLL_XFORM_DQS9 */
- 0x007f800a, /* EMC_DLL_XFORM_DQS10 */
- 0x007f800a, /* EMC_DLL_XFORM_DQS11 */
- 0x007f800a, /* EMC_DLL_XFORM_DQS12 */
- 0x007f800a, /* EMC_DLL_XFORM_DQS13 */
- 0x007f800a, /* EMC_DLL_XFORM_DQS14 */
- 0x007f800a, /* EMC_DLL_XFORM_DQS15 */
+ 0x007fc00a, /* EMC_DLL_XFORM_DQS0 */
+ 0x007fc00a, /* EMC_DLL_XFORM_DQS1 */
+ 0x007fc00a, /* EMC_DLL_XFORM_DQS2 */
+ 0x007fc00a, /* EMC_DLL_XFORM_DQS3 */
+ 0x007fc00a, /* EMC_DLL_XFORM_DQS4 */
+ 0x007fc00a, /* EMC_DLL_XFORM_DQS5 */
+ 0x007fc00a, /* EMC_DLL_XFORM_DQS6 */
+ 0x007fc00a, /* EMC_DLL_XFORM_DQS7 */
+ 0x007fc00a, /* EMC_DLL_XFORM_DQS8 */
+ 0x007fc00a, /* EMC_DLL_XFORM_DQS9 */
+ 0x007fc00a, /* EMC_DLL_XFORM_DQS10 */
+ 0x007fc00a, /* EMC_DLL_XFORM_DQS11 */
+ 0x007fc00a, /* EMC_DLL_XFORM_DQS12 */
+ 0x007fc00a, /* EMC_DLL_XFORM_DQS13 */
+ 0x007fc00a, /* EMC_DLL_XFORM_DQS14 */
+ 0x007fc00a, /* EMC_DLL_XFORM_DQS15 */
0x00000000, /* EMC_DLL_XFORM_QUSE0 */
0x00000000, /* EMC_DLL_XFORM_QUSE1 */
0x00000000, /* EMC_DLL_XFORM_QUSE2 */
0x00000000, /* Mode Register 4 */
1180, /* expected dvfs latency (ns) */
},
+ {
+ 0x16, /* NoRegCalcVersion */
+ "01_1056000_01_NoRegCalcVersion_V0.4", /* DVFS table version */
+ 1056000, /* SDRAM frequency */
+ 1100, /* min voltage */
+ 1100, /* gpu min voltage */
+ "pllm_ud", /* clock source id */
+ 0x80000000, /* CLK_SOURCE_EMC */
+ 168, /* number of burst_regs */
+ 31, /* number of up_down_regs */
+ {
+ 0x0000002f, /* EMC_RC */
+ 0x00000111, /* EMC_RFC */
+ 0x00000000, /* EMC_RFC_SLR */
+ 0x00000021, /* EMC_RAS */
+ 0x0000000c, /* EMC_RP */
+ 0x0000000a, /* EMC_R2W */
+ 0x00000011, /* EMC_W2R */
+ 0x00000006, /* EMC_R2P */
+ 0x00000019, /* EMC_W2P */
+ 0x0000000c, /* EMC_RD_RCD */
+ 0x0000000c, /* EMC_WR_RCD */
+ 0x00000004, /* EMC_RRD */
+ 0x00000002, /* EMC_REXT */
+ 0x00000000, /* EMC_WEXT */
+ 0x00000007, /* EMC_WDV */
+ 0x00000007, /* EMC_WDV_MASK */
+ 0x0000000e, /* EMC_QUSE */
+ 0x00000002, /* EMC_QUSE_WIDTH */
+ 0x00000000, /* EMC_IBDLY */
+ 0x00000002, /* EMC_EINPUT */
+ 0x00000010, /* EMC_EINPUT_DURATION */
+ 0x000b0000, /* EMC_PUTERM_EXTRA */
+ 0x00000004, /* EMC_PUTERM_WIDTH */
+ 0x00000000, /* EMC_BGBIAS_CTL0 */
+ 0x00000000, /* EMC_PUTERM_ADJ */
+ 0x00000000, /* EMC_CDB_CNTL_1 */
+ 0x00000000, /* EMC_CDB_CNTL_2 */
+ 0x00000000, /* EMC_CDB_CNTL_3 */
+ 0x00000001, /* EMC_QRST */
+ 0x00000017, /* EMC_QSAFE */
+ 0x0000001d, /* EMC_RDV */
+ 0x0000001f, /* EMC_RDV_MASK */
+ 0x00001fed, /* EMC_REFRESH */
+ 0x00000000, /* EMC_BURST_REFRESH_NUM */
+ 0x000007fb, /* EMC_PRE_REFRESH_REQ_CNT */
+ 0x00000005, /* EMC_PDEX2WR */
+ 0x00000018, /* EMC_PDEX2RD */
+ 0x00000002, /* EMC_PCHG2PDEN */
+ 0x00000000, /* EMC_ACT2PDEN */
+ 0x00000106, /* EMC_AR2PDEN */
+ 0x0000001e, /* EMC_RW2PDEN */
+ 0x0000011e, /* EMC_TXSR */
+ 0x00000200, /* EMC_TXSRDLL */
+ 0x00000007, /* EMC_TCKE */
+ 0x00000008, /* EMC_TCKESR */
+ 0x00000007, /* EMC_TPD */
+ 0x00000018, /* EMC_TFAW */
+ 0x00000000, /* EMC_TRPAB */
+ 0x0000000b, /* EMC_TCLKSTABLE */
+ 0x0000000b, /* EMC_TCLKSTOP */
+ 0x0000202d, /* EMC_TREFBW */
+ 0x00000000, /* EMC_FBIO_CFG6 */
+ 0x00000000, /* EMC_ODT_WRITE */
+ 0x00000000, /* EMC_ODT_READ */
+ 0x1040b8d8, /* EMC_FBIO_CFG5 */
+ 0xd00100b1, /* EMC_CFG_DIG_DLL */
+ 0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
+ 0x007f400a, /* EMC_DLL_XFORM_DQS0 */
+ 0x007f400a, /* EMC_DLL_XFORM_DQS1 */
+ 0x007f400a, /* EMC_DLL_XFORM_DQS2 */
+ 0x007f400a, /* EMC_DLL_XFORM_DQS3 */
+ 0x007f400a, /* EMC_DLL_XFORM_DQS4 */
+ 0x007f400a, /* EMC_DLL_XFORM_DQS5 */
+ 0x007f400a, /* EMC_DLL_XFORM_DQS6 */
+ 0x007f400a, /* EMC_DLL_XFORM_DQS7 */
+ 0x007f400a, /* EMC_DLL_XFORM_DQS8 */
+ 0x007f400a, /* EMC_DLL_XFORM_DQS9 */
+ 0x007f400a, /* EMC_DLL_XFORM_DQS10 */
+ 0x007f400a, /* EMC_DLL_XFORM_DQS11 */
+ 0x007f400a, /* EMC_DLL_XFORM_DQS12 */
+ 0x007f400a, /* EMC_DLL_XFORM_DQS13 */
+ 0x007f400a, /* EMC_DLL_XFORM_DQS14 */
+ 0x007f400a, /* EMC_DLL_XFORM_DQS15 */
+ 0x00000000, /* EMC_DLL_XFORM_QUSE0 */
+ 0x00000000, /* EMC_DLL_XFORM_QUSE1 */
+ 0x00000000, /* EMC_DLL_XFORM_QUSE2 */
+ 0x00000000, /* EMC_DLL_XFORM_QUSE3 */
+ 0x00000000, /* EMC_DLL_XFORM_QUSE4 */
+ 0x00000000, /* EMC_DLL_XFORM_QUSE5 */
+ 0x00000000, /* EMC_DLL_XFORM_QUSE6 */
+ 0x00000000, /* EMC_DLL_XFORM_QUSE7 */
+ 0x0002c000, /* EMC_DLL_XFORM_ADDR0 */
+ 0x0002c000, /* EMC_DLL_XFORM_ADDR1 */
+ 0x00000000, /* EMC_DLL_XFORM_ADDR2 */
+ 0x0002c000, /* EMC_DLL_XFORM_ADDR3 */
+ 0x0002c000, /* EMC_DLL_XFORM_ADDR4 */
+ 0x00000000, /* EMC_DLL_XFORM_ADDR5 */
+ 0x00000000, /* EMC_DLL_XFORM_QUSE8 */
+ 0x00000000, /* EMC_DLL_XFORM_QUSE9 */
+ 0x00000000, /* EMC_DLL_XFORM_QUSE10 */
+ 0x00000000, /* EMC_DLL_XFORM_QUSE11 */
+ 0x00000000, /* EMC_DLL_XFORM_QUSE12 */
+ 0x00000000, /* EMC_DLL_XFORM_QUSE13 */
+ 0x00000000, /* EMC_DLL_XFORM_QUSE14 */
+ 0x00000000, /* EMC_DLL_XFORM_QUSE15 */
+ 0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
+ 0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
+ 0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
+ 0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
+ 0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
+ 0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
+ 0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
+ 0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
+ 0x00000000, /* EMC_DLI_TRIM_TXDQS8 */
+ 0x00000000, /* EMC_DLI_TRIM_TXDQS9 */
+ 0x00000000, /* EMC_DLI_TRIM_TXDQS10 */
+ 0x00000000, /* EMC_DLI_TRIM_TXDQS11 */
+ 0x00000000, /* EMC_DLI_TRIM_TXDQS12 */
+ 0x00000000, /* EMC_DLI_TRIM_TXDQS13 */
+ 0x00000000, /* EMC_DLI_TRIM_TXDQS14 */
+ 0x00000000, /* EMC_DLI_TRIM_TXDQS15 */
+ 0x007fc00c, /* EMC_DLL_XFORM_DQ0 */
+ 0x007fc00c, /* EMC_DLL_XFORM_DQ1 */
+ 0x007fc00c, /* EMC_DLL_XFORM_DQ2 */
+ 0x007fc00c, /* EMC_DLL_XFORM_DQ3 */
+ 0x0007fc0c, /* EMC_DLL_XFORM_DQ4 */
+ 0x0007fc0c, /* EMC_DLL_XFORM_DQ5 */
+ 0x0007fc0c, /* EMC_DLL_XFORM_DQ6 */
+ 0x0007fc0c, /* EMC_DLL_XFORM_DQ7 */
+ 0x100002a0, /* EMC_XM2CMDPADCTRL */
+ 0x00000000, /* EMC_XM2CMDPADCTRL4 */
+ 0x00111111, /* EMC_XM2CMDPADCTRL5 */
+ 0x0120113d, /* EMC_XM2DQSPADCTRL2 */
+ 0x00000000, /* EMC_XM2DQPADCTRL2 */
+ 0x00000000, /* EMC_XM2DQPADCTRL3 */
+ 0x77ffc085, /* EMC_XM2CLKPADCTRL */
+ 0x00000808, /* EMC_XM2CLKPADCTRL2 */
+ 0x81f1f108, /* EMC_XM2COMPPADCTRL */
+ 0x07070004, /* EMC_XM2VTTGENPADCTRL */
+ 0x00000000, /* EMC_XM2VTTGENPADCTRL2 */
+ 0x016eeeee, /* EMC_XM2VTTGENPADCTRL3 */
+ 0x5d75d720, /* EMC_XM2DQSPADCTRL3 */
+ 0x00555555, /* EMC_XM2DQSPADCTRL4 */
+ 0x00555555, /* EMC_XM2DQSPADCTRL5 */
+ 0x5d75d700, /* EMC_XM2DQSPADCTRL6 */
+ 0x0606003f, /* EMC_DSR_VTTGEN_DRV */
+ 0x00000000, /* EMC_TXDSRVTTGEN */
+ 0x00000000, /* EMC_FBIO_SPARE */
+ 0x00020000, /* EMC_ZCAL_INTERVAL */
+ 0x00000152, /* EMC_ZCAL_WAIT_CNT */
+ 0x00a30010, /* EMC_MRS_WAIT_CNT */
+ 0x00a30010, /* EMC_MRS_WAIT_CNT2 */
+ 0x00000000, /* EMC_AUTO_CAL_CONFIG2 */
+ 0x00000000, /* EMC_AUTO_CAL_CONFIG3 */
+ 0xa1430606, /* EMC_AUTO_CAL_CONFIG */
+ 0x0000000a, /* EMC_CTT */
+ 0x00000004, /* EMC_CTT_DURATION */
+ 0x00000000, /* EMC_CFG_PIPE */
+ 0x80003fc1, /* EMC_DYN_SELF_REF_CONTROL */
+ 0x00000012, /* EMC_QPOP */
+ 0x0d00000f, /* MC_EMEM_ARB_CFG */
+ 0x80000040, /* MC_EMEM_ARB_OUTSTANDING_REQ */
+ 0x00000005, /* MC_EMEM_ARB_TIMING_RCD */
+ 0x00000006, /* MC_EMEM_ARB_TIMING_RP */
+ 0x00000018, /* MC_EMEM_ARB_TIMING_RC */
+ 0x00000010, /* MC_EMEM_ARB_TIMING_RAS */
+ 0x0000000c, /* MC_EMEM_ARB_TIMING_FAW */
+ 0x00000002, /* MC_EMEM_ARB_TIMING_RRD */
+ 0x00000004, /* MC_EMEM_ARB_TIMING_RAP2PRE */
+ 0x0000000f, /* MC_EMEM_ARB_TIMING_WAP2PRE */
+ 0x00000002, /* MC_EMEM_ARB_TIMING_R2R */
+ 0x00000002, /* MC_EMEM_ARB_TIMING_W2W */
+ 0x00000007, /* MC_EMEM_ARB_TIMING_R2W */
+ 0x0000000a, /* MC_EMEM_ARB_TIMING_W2R */
+ 0x0a070202, /* MC_EMEM_ARB_DA_TURNS */
+ 0x001c1118, /* MC_EMEM_ARB_DA_COVERS */
+ 0x73503019, /* MC_EMEM_ARB_MISC0 */
+ 0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
+ },
+ {
+ 0x0000001a, /* MC_MLL_MPCORER_PTSA_RATE */
+ 0x000001fa, /* MC_PTSA_GRANT_DECREMENT */
+ 0x00600038, /* MC_LATENCY_ALLOWANCE_XUSB_0 */
+ 0x00600038, /* MC_LATENCY_ALLOWANCE_XUSB_1 */
+ 0x0060003c, /* MC_LATENCY_ALLOWANCE_TSEC_0 */
+ 0x00600090, /* MC_LATENCY_ALLOWANCE_SDMMCA_0 */
+ 0x00600041, /* MC_LATENCY_ALLOWANCE_SDMMCAA_0 */
+ 0x00600090, /* MC_LATENCY_ALLOWANCE_SDMMC_0 */
+ 0x00600041, /* MC_LATENCY_ALLOWANCE_SDMMCAB_0 */
+ 0x00270049, /* MC_LATENCY_ALLOWANCE_PPCS_0 */
+ 0x00600080, /* MC_LATENCY_ALLOWANCE_PPCS_1 */
+ 0x00600004, /* MC_LATENCY_ALLOWANCE_MPCORE_0 */
+ 0x00600004, /* MC_LATENCY_ALLOWANCE_MPCORELP_0 */
+ 0x00080016, /* MC_LATENCY_ALLOWANCE_HC_0 */
+ 0x00000060, /* MC_LATENCY_ALLOWANCE_HC_1 */
+ 0x00600004, /* MC_LATENCY_ALLOWANCE_AVPC_0 */
+ 0x00600019, /* MC_LATENCY_ALLOWANCE_GPU_0 */
+ 0x00600018, /* MC_LATENCY_ALLOWANCE_MSENC_0 */
+ 0x00600024, /* MC_LATENCY_ALLOWANCE_HDA_0 */
+ 0x0060001b, /* MC_LATENCY_ALLOWANCE_VIC_0 */
+ 0x00000060, /* MC_LATENCY_ALLOWANCE_VI2_0 */
+ 0x00000036, /* MC_LATENCY_ALLOWANCE_ISP2_0 */
+ 0x00600060, /* MC_LATENCY_ALLOWANCE_ISP2_1 */
+ 0x00000036, /* MC_LATENCY_ALLOWANCE_ISP2B_0 */
+ 0x00600060, /* MC_LATENCY_ALLOWANCE_ISP2B_1 */
+ 0x00d400ff, /* MC_LATENCY_ALLOWANCE_VDE_0 */
+ 0x00510029, /* MC_LATENCY_ALLOWANCE_VDE_1 */
+ 0x00600060, /* MC_LATENCY_ALLOWANCE_VDE_2 */
+ 0x00600060, /* MC_LATENCY_ALLOWANCE_VDE_3 */
+ 0x00600065, /* MC_LATENCY_ALLOWANCE_SATA_0 */
+ 0x0060001c, /* MC_LATENCY_ALLOWANCE_AFI_0 */
+ },
+ 0x00000057, /* EMC_ZCAL_WAIT_CNT after clock change */
+ 0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
+ 0x00000802, /* EMC_CTT_TERM_CTRL */
+ 0x73300000, /* EMC_CFG */
+ 0x000008a5, /* EMC_CFG_2 */
+ 0x00040000, /* EMC_SEL_DPD_CTRL */
+ 0xd0010069, /* EMC_CFG_DIG_DLL */
+ 0x80000125, /* Mode Register 0 */
+ 0x80100002, /* Mode Register 1 */
+ 0x80200028, /* Mode Register 2 */
+ 0x00000000, /* Mode Register 4 */
+ 1180, /* expected dvfs latency (ns) */
+ },
};
-
+
static struct tegra12_emc_pdata loki_a02_emc_pdata = {
.description = "loki_a02_emc_tables",
.tables = loki_a02_emc_table,
projects / sojka / nv-tegra / linux-3.10.git / commitdiff