]> rtime.felk.cvut.cz Git - sojka/nv-tegra/linux-3.10.git/commitdiff
arm: tegra: sata: set SATA clock to 272MHz
authorsreenivasulu velpula <svelpula@nvidia.com>
Thu, 7 Feb 2013 09:13:43 +0000 (14:43 +0530)
committerDan Willemsen <dwillemsen@nvidia.com>
Sat, 14 Sep 2013 20:00:11 +0000 (13:00 -0700)
Bug 1221686
Bug 1170169

Reviewed-on: http://git-master/r/198306
(cherry picked from commit 02f85c2a866df1ae47a7f51707dba88b214b9b83)

Change-Id: I90470d7f11436671db7f7f2af85fbf9de85adaf7
Signed-off-by: sreenivasulu velpula <svelpula@nvidia.com>
Reviewed-on: http://git-master/r/201614
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sumeet Gupta <sumeetg@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
drivers/ata/ahci-tegra.c

index af4c9505478e092fcc1453d6214b93564376a10b..399293a291c60b94ae32b7deeea0caa1b2ae8500 100644 (file)
@@ -1,7 +1,7 @@
 /*
  * ahci-tegra.c - AHCI SATA support for TEGRA AHCI device
  *
- * Copyright (c) 2011-2012, NVIDIA Corporation.  All rights reserved.
+ * Copyright (c) 2011-2013, NVIDIA Corporation.  All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -132,8 +132,8 @@ static u32 tegra_ahci_idle_time = TEGRA_AHCI_DEFAULT_IDLE_TIME;
 #define TEGRA_SATA_ENABLE_BUS_MASTER           (1 << 2)
 #define TEGRA_SATA_ENABLE_SERR                 (1 << 8)
 
-#define TEGRA_SATA_CORE_CLOCK_FREQ_HZ          (108*1000*1000)
-#define TEGRA_SATA_OOB_CLOCK_FREQ_HZ           (216*1000*1000)
+#define TEGRA_SATA_CORE_CLOCK_FREQ_HZ          (272*1000*1000)
+#define TEGRA_SATA_OOB_CLOCK_FREQ_HZ           (272*1000*1000)
 
 #define APB_PMC_SATA_PWRGT_0_REG               0x1ac
 #define CLK_RST_SATA_PLL_CFG0_REG              0x490