This far EDP was informed about changed load as part of postscale
callback when we changed the frequency. The theory behind this idea
has been that we need to inform EDP due to changed constraint.
However, we have seen cases where updating load information for EDP
would be beneficial more often. This patch modifies the call sequence
so that we inform EDP each time we submit work to GPU.
Bug
1441874
Change-Id: I07a804e0a07ea7efc6024a273437c33a02a8939d
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/362631
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
unsigned long freq)
{
struct gk20a *g = get_gk20a(profile->pdev);
- struct nvhost_device_data *pdata = platform_get_drvdata(profile->pdev);
struct nvhost_emc_params *emc_params = profile->private_data;
long after = gk20a_clk_get_rate(g);
long emc_target = nvhost_scale3d_get_emc_rate(emc_params, after);
nvhost_module_set_devfreq_rate(profile->pdev, 2, emc_target);
-
- if (pdata->gpu_edp_device) {
- u32 avg = 0;
- gk20a_pmu_load_norm(g, &avg);
- tegra_edp_notify_gpu_load(avg);
- }
}
/*
struct nvhost_device_data *pdata = platform_get_drvdata(pdev);
struct nvhost_device_profile *profile = pdata->power_profile;
struct devfreq *devfreq = pdata->power_manager;
+ struct gk20a *g = get_gk20a(pdev);
+
+ /* inform edp about new constraint */
+ if (pdata->gpu_edp_device) {
+ u32 avg = 0;
+ gk20a_pmu_load_norm(g, &avg);
+ tegra_edp_notify_gpu_load(avg);
+ }
/* Is the device profile initialised? */
if (!(profile && devfreq))
*
* Tegra Graphics Host 3D clock scaling
*
- * Copyright (c) 2010-2013, NVIDIA Corporation. All rights reserved.
+ * Copyright (c) 2010-2014, NVIDIA Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
#include <linux/export.h>
#include <linux/slab.h>
#include <linux/ftrace.h>
-#include <linux/platform_data/tegra_edp.h>
#include <linux/tegra-soc.h>
#include "chip_support.h"
unsigned long freq)
{
struct nvhost_gr3d_params *gr3d_params = profile->private_data;
- struct nvhost_device_data *pdata = platform_get_drvdata(profile->pdev);
struct nvhost_emc_params *emc_params = &gr3d_params->emc_params;
long hz;
long after;
hz = nvhost_scale3d_get_emc_rate(emc_params, after);
nvhost_module_set_devfreq_rate(profile->pdev, gr3d_params->clk_3d_emc,
hz);
-
- if (pdata->gpu_edp_device) {
- u32 avg = 0;
- actmon_op().read_avg_norm(profile->actmon, &avg);
- tegra_edp_notify_gpu_load(avg);
- }
}
/*
#include <linux/export.h>
#include <linux/slab.h>
#include <linux/clk/tegra.h>
+#include <linux/platform_data/tegra_edp.h>
#include <linux/tegra-soc.h>
#include <governor.h>
if (!profile)
return;
+ /* inform edp about new constraint */
+ if (pdata->gpu_edp_device) {
+ u32 avg = 0;
+ actmon_op().read_avg_norm(profile->actmon, &avg);
+ tegra_edp_notify_gpu_load(avg);
+ }
+
/* If defreq is disabled, set the freq to max or min */
if (!devfreq) {
unsigned long freq = busy ? UINT_MAX : 0;