arm: tegra: sysedp: 3rd update of AP+DRAM table for T132

Bug 1469388

Change-Id: If81cf0f73f10dc490c9bed3cbbb7e1875a9eff41
Signed-off-by: Timo Alho <talho@nvidia.com>
Reviewed-on: http://git-master/r/415618
(cherry picked from commit ef7f10628f8ae56a7a2c63400b286afe70f46a07)
Reviewed-on: http://git-master/r/415622

diff --git a/drivers/platform/tegra/tegra13_edp.c b/drivers/platform/tegra/tegra13_edp.c
index 1785523ef96d5a7810a1d893b795d41be2fb57e6..9360ac5a8e4c8a7cceba733d2cc8427ee3890935 100644 (file)
--- a/drivers/platform/tegra/tegra13_edp.c
+++ b/drivers/platform/tegra/tegra13_edp.c
@@ -22,19 +22,19 @@
 static struct tegra_sysedp_corecap t132_sysedp_corecap[] = {
        /*mW     CPU intensive load        GPU intensive load    */
        /*mW     budget  gpu(khz) mem(khz)  budget  gpu(khz) mem(khz) pthrot(mW)*/
-       {5000,  {3000,  180000, 933000}, {3000,  180000, 933000}, 2603 },
+       {5000,  {3000,  180000, 933000}, {3000,  180000, 933000}, 2604 },
        {6000,  {4000,  180000, 933000}, {3500,  252000, 933000}, 3374 },
-       {7000,  {5000,  180000, 933000}, {3500,  324000, 933000}, 3839 },
+       {7000,  {5000,  180000, 933000}, {3500,  324000, 933000}, 3840 },
        {8000,  {5000,  252000, 933000}, {3500,  396000, 933000}, 4265 },
-       {9000,  {5000,  396000, 933000}, {3500,  468000, 933000}, 4848 },
-       {10000, {6000,  324000, 933000}, {6000,  324000, 933000}, 5765 },
-       {11000, {7000,  252000, 933000}, {6000,  396000, 933000}, 6158 },
-       {12000, {7000,  396000, 933000}, {6000,  468000, 933000}, 6774 },
+       {9000,  {5000,  396000, 933000}, {3500,  468000, 933000}, 4849 },
+       {10000, {6000,  324000, 933000}, {3500,  540000, 933000}, 5710 },
+       {11000, {7000,  252000, 933000}, {4500,  540000, 933000}, 6159 },
+       {12000, {7000,  396000, 933000}, {5500,  540000, 933000}, 7009 },
        {13000, {8000,  252000, 933000}, {6000,  540000, 933000}, 6765 },
-       {14000, {10000, 252000, 933000}, {6000,  612000, 933000}, 8490 },
-       {15000, {10000, 324000, 933000}, {6000,  684000, 933000}, 9184 },
-       {16000, {11000, 252000, 933000}, {6000,  708000, 933000}, 9639 },
-       {17000, {11000, 396000, 933000}, {6000,  756000, 933000}, 10507 },
+       {14000, {10000, 252000, 933000}, {6000,  612000, 933000}, 8491 },
+       {15000, {10000, 324000, 933000}, {6000,  684000, 933000}, 9185 },
+       {16000, {11000, 252000, 933000}, {6000,  708000, 933000}, 9640 },
+       {17000, {11000, 396000, 933000}, {6000,  756000, 933000}, 10508 },
        {18000, {12000, 324000, 933000}, {7000,  756000, 933000}, 11149 },
        {19000, {13000, 252000, 933000}, {7000,  804000, 933000}, 11745 },
        {20000, {13000, 324000, 933000}, {7500,  804000, 933000}, 12170 },