gpu: nvgpu: print intr code for class error

Print interrupt code and channel id for unhandled gr class error.

Bug 200010403

Change-Id: Iedceaf4b8b6363b26f1836256875fb9b5c43eded
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/419566
(cherry picked from commit 080b9a9e7ea5365ed3ace05d4f117095a8416d19)
Reviewed-on: http://git-master/r/419990
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
index 5cadc5745bfeb2021a8884dc04d1df93d7f8c24f..d0e80ef0a2f0f321b5d7fc12b20ede6346501ac0 100644 (file)
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
@@ -4912,13 +4912,16 @@ static int gk20a_gr_handle_class_error(struct gk20a *g,
 {
        struct fifo_gk20a *f = &g->fifo;
        struct channel_gk20a *ch = &f->channel[isr_data->chid];
+       u32 gr_class_error =
+               gr_class_error_code_v(gk20a_readl(g, gr_class_error_r()));
        gk20a_dbg_fn("");
 
        gk20a_set_error_notifier(ch,
                        NVHOST_CHANNEL_GR_ERROR_SW_NOTIFY);
        gk20a_err(dev_from_gk20a(g),
-                  "class error 0x%08x, offset 0x%08x",
-                  isr_data->class_num, isr_data->offset);
+                  "class error 0x%08x, offset 0x%08x, unhandled intr 0x%08x for channel %u\n",
+                  isr_data->class_num, isr_data->offset,
+                  gr_class_error, ch->hw_chid);
        return -EINVAL;
 }