This patch modifies GPU capability IOCTL so that it exports
1) big page size.
2) compression page size
Bug
1456570
Change-Id: I11ec56968fa78bafd9714cdc755b9c060956d96e
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/368134
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Hiroshi Doyu <hdoyu@nvidia.com>
Tested-by: Hiroshi Doyu <hdoyu@nvidia.com>
gpu->bus_type = NVHOST_GPU_BUS_TYPE_AXI; /* always AXI for now */
+ gpu->big_page_size = g->mm.big_page_size;
+ gpu->compression_page_size = g->mm.compression_page_size;
+
return 0;
}
mutex_init(&mm->tlb_lock);
mutex_init(&mm->l2_op_lock);
mm->big_page_size = gmmu_page_sizes[gmmu_page_size_big];
+ mm->compression_page_size = gmmu_page_sizes[gmmu_page_size_big];
mm->pde_stride = mm->big_page_size << 10;
mm->pde_stride_shift = ilog2(mm->pde_stride);
BUG_ON(mm->pde_stride_shift > 31); /* we have assumptions about this */
struct mm_gk20a {
struct gk20a *g;
+ u32 compression_page_size;
u32 big_page_size;
u32 pde_stride;
u32 pde_stride_shift;
__u32 num_tpc_per_gpc;
__u32 bus_type;
+ __u32 big_page_size;
+ __u32 compression_page_size;
+
/* Notes:
- This struct can be safely appended with new fields. However, always
keep the structure size multiple of 8 and make sure that the binary