#echo 10 > nvs
#cat nvs
The results will be something like:
- IQS driver v. 19
+ IQS driver v. 20
ATI redo count=0
os_options=0
stream_mode=2
i2c_ss_delay_ns=1000000
i2c_retry=10
gpio_rdy_retry=25
+ gpio_rdy_delay_count=2000
+ gpio_rdy_delay_us_min=100
+ gpio_rdy_delay_us_max=1000
gpio_rdy 1=1
gpio_sar 173=0
gpio_sar_assert_polarity=0
then repeat above steps. This is done i2c_retry times before exiting as
a failure.
BTW, this is all done according to the Azotec spec.
+- gpio_rdy_delay_count: The delay loop count of polling for the GPIO RDY signal
+ to go low.
+- gpio_rdy_delay_us_min: The minimum delay in microseconds of the delay in the
+ loop of polling for the GPIO RDY signal to go low.
+- gpio_rdy_delay_us_max: The maximum delay in microseconds of the delay in the
+ loop of polling for the GPIO RDY signal to go low.
+ Note: The gpio_rdy_delay_* variables are used in the function that checks for
+ the gpio_rdy GPIO low level in a loop. If the level is high a sleep is
+ done using the gpio_rdy_delay_us_min/max and the loop continues for
+ gpio_rdy_delay_count interations.
- i2c_ss_delay_ns: The I2C bus must be idle for 100us after an I2C transaction
with the IQS device or it will hold the I2C clock low. This
WAR is already accounted for in the driver but the delay can
#include <asm/atomic.h>
-#define IQS_DRIVER_VERSION (19)
+#define IQS_DRIVER_VERSION (20)
#define IQS_VENDOR "Azoteq"
#define IQS_NAME "iqs2x3"
#define IQS_NAME_IQS253 "iqs253"
#define IQS_I2C_STOP_DLY_NS (1000000) /* must be >= 1ms */
#define IQS_I2C_RETRY_N (10)
#define IQS_RDY_RETRY_N (25)
+#define IQS_RDY_DELAY_N (2000)
+#define IQS_RDY_DELAY_US_MIN (100)
+#define IQS_RDY_DELAY_US_MAX (110)
/* proximity defines */
#define IQS_PROX_VERSION (1)
/* binary proximity when max_range and resolution are 1.0 */
unsigned int dbnc_hi_n[IQS_DEV_HW_N]; /* binary high debounce count */
unsigned int ati_redo_n; /* ATI redo count */
unsigned int wd_to_ms; /* watchdog timeout ms */
+ unsigned int gpio_rdy_dly_n; /* GPIO RDY delay loop count */
+ unsigned int gpio_rdy_dly_min; /* GPIO RDY delay us min */
+ unsigned int gpio_rdy_dly_max; /* GPIO RDY delay us max */
unsigned int gpio_rdy_retry; /* GPIO RDY assert loop limit */
unsigned int i2c_retry; /* I2C transaction loop limit */
s64 i2c_ss_war_ns; /* I2C stop/start delay WAR */
static int iqs_gpio_rdy_poll(struct iqs_state *st)
{
unsigned int i;
- int ret;
+ int ret = 0;
- for (i = 0; i < 2000; i++) {
+ for (i = 0; i < st->gpio_rdy_dly_n; i++) {
ret = gpio_get_value_cansleep(st->gpio_rdy);
if (st->susrsm || !ret)
break;
- usleep_range(500, 1000);
+ usleep_range((unsigned long)st->gpio_rdy_dly_min,
+ (unsigned long)st->gpio_rdy_dly_max);
}
return ret;
}
t += sprintf(buf + t, "i2c_retry=%u\n", st->i2c_retry);
t += sprintf(buf + t, "gpio_rdy_retry=%u\n",
st->gpio_rdy_retry);
+ t += sprintf(buf + t, "gpio_rdy_delay_count=%u\n",
+ st->gpio_rdy_dly_n);
+ t += sprintf(buf + t, "gpio_rdy_delay_us_min=%u\n",
+ st->gpio_rdy_dly_min);
+ t += sprintf(buf + t, "gpio_rdy_delay_us_max=%u\n",
+ st->gpio_rdy_dly_max);
if (st->gpio_rdy < 0)
t += sprintf(buf + t, "NO gpio_rdy\n");
else
st->i2c_ss_war_ns = IQS_I2C_STOP_DLY_NS;
st->i2c_retry = IQS_I2C_RETRY_N;
st->gpio_rdy_retry = IQS_RDY_RETRY_N;
+ st->gpio_rdy_dly_n = IQS_RDY_DELAY_N;
+ st->gpio_rdy_dly_min = IQS_RDY_DELAY_US_MIN;
+ st->gpio_rdy_dly_max = IQS_RDY_DELAY_US_MAX;
st->gpio_rdy = -1;
st->gpio_sar = -1;
st->gpio_sar_sus_asrt = -1;
of_property_read_u32(dn, "i2c_retry", &st->i2c_retry);
of_property_read_u32(dn, "gpio_rdy_retry",
&st->gpio_rdy_retry);
+ of_property_read_u32(dn, "gpio_rdy_delay_count",
+ &st->gpio_rdy_dly_n);
+ of_property_read_u32(dn, "gpio_rdy_delay_us_min",
+ &st->gpio_rdy_dly_min);
+ of_property_read_u32(dn, "gpio_rdy_delay_us_max",
+ &st->gpio_rdy_dly_max);
if (!of_property_read_u32(dn, "gpio_sar_assert_polarity",
&st->gpio_sar_asrt_pol))
st->gpio_sar_asrt_pol = !!st->gpio_sar_asrt_pol;