select GENERIC_STRNCPY_FROM_USER
select GENERIC_STRNLEN_USER
select HARDIRQS_SW_RESEND
- select HAVE_AOUT
select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL
select HAVE_ARCH_KGDB
- select HAVE_ARCH_SECCOMP_FILTER if (AEABI && !OABI_COMPAT)
+ select HAVE_ARCH_SECCOMP_FILTER
select HAVE_ARCH_TRACEHOOK
select HAVE_BPF_JIT
select HAVE_C_RECORDMCOUNT
select ARM_AMBA
select ARM_ARCH_TIMER
select ARM_GIC
+ select BUILDTIME_EXTABLE_SORT
+ select AUDIT_ARCH_COMPAT_GENERIC
select CLONE_BACKWARDS
- select COMMON_CLK
+# select COMMON_CLK
+ select CPU_PM if (SUSPEND || CPU_IDLE)
+ select DCACHE_WORD_ACCESS
select GENERIC_CLOCKEVENTS
select GENERIC_CLOCKEVENTS_BROADCAST if SMP
select GENERIC_CPU_AUTOPROBE
select GENERIC_IOMAP
select GENERIC_IRQ_PROBE
select GENERIC_IRQ_SHOW
+ select GENERIC_SCHED_CLOCK
select GENERIC_SMP_IDLE_THREAD
+ select GENERIC_STRNCPY_FROM_USER
+ select GENERIC_STRNLEN_USER
select GENERIC_TIME_VSYSCALL
select HARDIRQS_SW_RESEND
+ select GENERIC_PCI_IOMAP
+ select HAVE_ARCH_JUMP_LABEL
+ select HAVE_ARCH_KGDB
+ select HAVE_ARCH_AUDITSYSCALL
select HAVE_ARCH_TRACEHOOK
+ select HAVE_C_RECORDMCOUNT
select HAVE_DEBUG_BUGVERBOSE
select HAVE_DEBUG_KMEMLEAK
select HAVE_DMA_API_DEBUG
int "Maximum number of CPUs (2-32)"
range 2 32
depends on SMP
- default "4"
+ # These have to remain sorted largest to smallest
+ default "8"
+
+config HOTPLUG_CPU
+ bool "Support for hot-pluggable CPUs"
+ depends on SMP && HOTPLUG
+ help
+ Say Y here to experiment with turning CPUs off and on. CPUs
+ can be controlled through /sys/devices/system/cpu.
+
+ If you don't know what to do here, say N.
+
+config HOTPLUG_CPU0
+ bool "Support for CPU0 hotplug"
+ depends on HOTPLUG_CPU
+ default n
+ help
+ CPU0 hotplug is not supported on all arm64 platforms. Select Y to
+ enable CPU0 hotplug. If you're unsure, leave CPU0 hotplug disabled.
+
++config SWP_EMULATE
++ bool "Emulate SWP/SWPB instructions"
++ help
++ ARMv6 architecture deprecates use of the SWP/SWPB instructions. ARMv8
++ oblosetes the use of SWP/SWPB instructions. ARMv7 multiprocessing
++ extensions introduce the ability to disable these instructions,
++ triggering an undefined instruction exception when executed. Say Y
++ here to enable software emulation of these instructions for userspace
++ (not kernel) using LDREX/STREX. Also creates /proc/cpu/swp_emulation
++ for statistics.
++
++ In some older versions of glibc [<=2.8] SWP is used during futex
++ trylock() operations with the assumption that the code will not
++ be preempted. This invalid assumption may be more likely to fail
++ with SWP emulation enabled, leading to deadlock of the user
++ application.
++
++ NOTE: when accessing uncached shared regions, LDREX/STREX rely
++ on an external transaction monitoring block called a global
++ monitor to maintain update atomicity. If your system does not
++ implement a global monitor, this option can cause programs that
++ perform SWP operations to uncached memory to deadlock.
++
++ If unsure, say Y.
+
config SWP_EMULATE
bool "Emulate SWP/SWPB instructions"
help
* This is the really slow path. We're going to be doing context
* switches, and waiting for our parent to respond.
*/
+ni_sys_systrace:
+ mov x0, sp
+ bl do_ni_syscall
+ b __sys_trace_return
+
__sys_trace:
- mov x1, sp
- mov w0, #0 // trace entry
- bl syscall_trace
+ mov x0, sp
+ bl syscall_trace_enter
- adr lr, __sys_trace_return // return address
uxtw scno, w0 // syscall number (possibly new)
mov x1, sp // pointer to regs
cmp scno, sc_nr // check upper syscall limit
#define pr_fmt(fmt) "hw-breakpoint: " fmt
+#include <linux/cpu_pm.h>
+ #include <linux/compat.h>
#include <linux/errno.h>
#include <linux/hw_breakpoint.h>
#include <linux/perf_event.h>
* See Documentation/arm/kernel_user_helpers.txt for formal definitions.
*/
+#include <asm/unistd32.h>
+ #include <asm/unistd.h>
.align 5
.globl __kuser_helper_start
while (1);
}
+ /*
+ * dump a block of kernel memory from around the given address
+ */
+ static void show_data(unsigned long addr, int nbytes, const char *name)
+ {
+ int i, j;
+ int nlines;
+ u32 *p;
+
+ /*
+ * don't attempt to dump non-kernel addresses or
+ * values that are probably just small negative numbers
+ */
+ if (addr < PAGE_OFFSET || addr > -256UL)
+ return;
+
+ printk("\n%s: %#lx:\n", name, addr);
+
+ /*
+ * round address down to a 32 bit boundary
+ * and always dump a multiple of 32 bytes
+ */
+ p = (u32 *)(addr & ~(sizeof(u32) - 1));
+ nbytes += (addr & (sizeof(u32) - 1));
+ nlines = (nbytes + 31) / 32;
+
+
+ for (i = 0; i < nlines; i++) {
+ /*
+ * just display low 16 bits of address to keep
+ * each line of the dump < 80 characters
+ */
+ printk("%04lx ", (unsigned long)p & 0xffff);
+ for (j = 0; j < 8; j++) {
+ u32 data;
+ if (probe_kernel_address(p, data)) {
+ printk(" ********");
+ } else {
+ printk(" %08x", data);
+ }
+ ++p;
+ }
+ printk("\n");
+ }
+ }
+
+ static void show_extra_register_data(struct pt_regs *regs, int nbytes)
+ {
+ mm_segment_t fs;
+ unsigned int i;
+
+ fs = get_fs();
+ set_fs(KERNEL_DS);
+ show_data(regs->pc - nbytes, nbytes * 2, "PC");
+ show_data(regs->regs[30] - nbytes, nbytes * 2, "LR");
+ show_data(regs->sp - nbytes, nbytes * 2, "SP");
+ for (i = 0; i < 30; i++) {
+ char name[4];
+ snprintf(name, sizeof(name), "X%u", i);
+ show_data(regs->regs[i] - nbytes, nbytes * 2, name);
+ }
+ set_fs(fs);
+ }
+
void __show_regs(struct pt_regs *regs)
{
- int i;
+ int i, top_reg;
+ u64 lr, sp;
+
+ if (compat_user_mode(regs)) {
+ lr = regs->compat_lr;
+ sp = regs->compat_sp;
+ top_reg = 12;
+ } else {
+ lr = regs->regs[30];
+ sp = regs->sp;
+ top_reg = 29;
+ }
show_regs_print_info(KERN_DEFAULT);
print_symbol("PC is at %s\n", instruction_pointer(regs));
COMPAT_HWCAP_VFPv3|COMPAT_HWCAP_VFPv4|\
COMPAT_HWCAP_NEON|COMPAT_HWCAP_IDIV)
unsigned int compat_elf_hwcap __read_mostly = COMPAT_ELF_HWCAP_DEFAULT;
+ unsigned int compat_elf_hwcap2 __read_mostly;
#endif
-static const char *cpu_name;
static const char *machine_name;
+
+unsigned int system_rev;
+EXPORT_SYMBOL(system_rev);
+
+unsigned int system_serial_low;
+EXPORT_SYMBOL(system_serial_low);
+
+unsigned int system_serial_high;
+EXPORT_SYMBOL(system_serial_high);
+
+#ifdef CONFIG_ARM64_MACH_FRAMEWORK
+struct machine_desc *machine_desc __initdata;
+#endif
phys_addr_t __fdt_pointer __initdata;
/*
block = (features >> 16) & 0xf;
if (block && !(block & 0x8))
elf_hwcap |= HWCAP_CRC32;
+
+ #ifdef CONFIG_COMPAT
+ /*
+ * ID_ISAR5_EL1 carries similar information as above, but pertaining to
+ * the Aarch32 32-bit execution state.
+ */
+ features = read_cpuid(ID_ISAR5_EL1);
+ block = (features >> 4) & 0xf;
+ if (!(block & 0x8)) {
+ switch (block) {
+ default:
+ case 2:
+ compat_elf_hwcap2 |= COMPAT_HWCAP2_PMULL;
+ case 1:
+ compat_elf_hwcap2 |= COMPAT_HWCAP2_AES;
+ case 0:
+ break;
+ }
+ }
+
+ block = (features >> 8) & 0xf;
+ if (block && !(block & 0x8))
+ compat_elf_hwcap2 |= COMPAT_HWCAP2_SHA1;
+
+ block = (features >> 12) & 0xf;
+ if (block && !(block & 0x8))
+ compat_elf_hwcap2 |= COMPAT_HWCAP2_SHA2;
+
+ block = (features >> 16) & 0xf;
+ if (block && !(block & 0x8))
+ compat_elf_hwcap2 |= COMPAT_HWCAP2_CRC32;
+ #endif
}
+#ifdef CONFIG_ARM64_MACH_FRAMEWORK
+static struct machine_desc * __init setup_machine_fdt(phys_addr_t dt_phys)
+#else
static void __init setup_machine_fdt(phys_addr_t dt_phys)
+#endif
{
struct boot_param_header *devtree;
unsigned long dt_root;
#include <linux/syscalls.h>
#include <linux/uaccess.h>
+#include <asm/cachetype.h>
#include <asm/cacheflush.h>
- #include <asm/unistd32.h>
+ #include <asm/unistd.h>
static inline void
do_compat_cache_op(unsigned long start, unsigned long end, int flags)
dev->port_usb = NULL;
spin_unlock(&dev->lock);
}
-module_init(gether_init);
+
+ static int __init gether_init(void)
+ {
+ uether_wq = create_singlethread_workqueue("uether");
+ if (!uether_wq) {
+ pr_err("%s: Unable to create workqueue: uether\n", __func__);
+ return -ENOMEM;
+ }
+ return 0;
+ }
-module_exit(gether_exit);
++__initcall(gether_init);
+
+ static void __exit gether_exit(void)
+ {
+ destroy_workqueue(uether_wq);
+
+ }
++__exitcall(gether_exit);
+ MODULE_DESCRIPTION("ethernet over USB driver");
+ MODULE_LICENSE("GPL v2");