]> rtime.felk.cvut.cz Git - sojka/nv-tegra/linux-3.10.git/commitdiff
ARM: tegra: use pmc interface for setting PMU interrupt polarity
authorLaxman Dewangan <ldewangan@nvidia.com>
Fri, 4 Apr 2014 15:51:44 +0000 (21:21 +0530)
committerLaxman Dewangan <ldewangan@nvidia.com>
Sat, 5 Apr 2014 11:47:18 +0000 (04:47 -0700)
use pmc interface for setting PMU interrupt polarity on PMC register
instead of manipulating the PMC control register locally.

Change-Id: I348e9dc8c2dc86a2ca4910b87219667f02853fee
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/392402

arch/arm/mach-tegra/board-loki-power.c

index d3e251decd22ab1013a6b8f331d86132272f3f57..798207414553afad0be445ed5f2a31d0e1765ae1 100644 (file)
@@ -52,8 +52,6 @@
 #include "tegra_cl_dvfs.h"
 #include "tegra11_soctherm.h"
 
-#define PMC_CTRL                0x0
-#define PMC_CTRL_INTR_LOW       (1 << 17)
 void tegra13x_vdd_cpu_align(int step_uv, int offset_uv);
 
 static struct regulator_consumer_supply palmas_smps123_supply[] = {
@@ -774,17 +772,11 @@ int __init loki_rail_alignment_init(void)
 
 int __init loki_regulator_init(void)
 {
-       void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);
-       u32 pmc_ctrl;
        int i;
        struct board_info bi;
 
-       /* TPS65913: Normal state of INT request line is LOW.
-        * configure the power management controller to trigger PMU
-        * interrupts when HIGH.
-        */
-       pmc_ctrl = readl(pmc + PMC_CTRL);
-       writel(pmc_ctrl | PMC_CTRL_INTR_LOW, pmc + PMC_CTRL);
+       tegra_pmc_pmu_interrupt_polarity(true);
+
        for (i = 0; i < PALMAS_NUM_REGS ; i++) {
                pmic_platform.reg_data[i] = loki_reg_data[i];
                pmic_platform.reg_init[i] = loki_reg_init[i];